- 15 May, 2019 40 commits
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Emulate MMX ssse3_pmaddubsw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation. From-SVN: r271243
H.J. Lu committed -
Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3): Changed to define_insn_and_split to support SSE emulation. From-SVN: r271242
H.J. Lu committed -
Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3): Changed to define_insn_and_split to support SSE emulation. From-SVN: r271241
H.J. Lu committed -
With SSE emulation of MMX intrinsics, we should make _mm_empty () as NOP without MMX. PR target/89021 * config/i386/mmx.md (mmx_<emms>): Renamed to ... (*mmx_<emms>): This. (mmx_<emms>): New expander. From-SVN: r271240
H.J. Lu committed -
Emulate MMX umulv1siv1di3 with SSE2. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation support. (*sse2_umulv1siv1di3): Add SSE2 emulation. From-SVN: r271239
H.J. Lu committed -
Emulate MMX movntq with SSE2 movntidi. Only register source operand is allowed. PR target/89021 * config/i386/mmx.md (sse_movntq): Add SSE2 emulation. From-SVN: r271238
H.J. Lu committed -
Emulate MMX mmx_psadbw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_psadbw): Add SSE emulation. From-SVN: r271237
H.J. Lu committed -
Emulate MMX mmx_uavgv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_uavgv4hi3): Add SSE emulation. From-SVN: r271236
H.J. Lu committed -
Emulate MMX mmx_uavgv8qi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_uavgv8qi3): Add SSE emulation. From-SVN: r271235
H.J. Lu committed -
Emulate MMX maskmovq with SSE2 maskmovdqu for TARGET_MMX_WITH_SSE by zero-extending source and mask operands to 128 bits. Handle unmapped bits 64:127 at memory address by adjusting source and mask operands together with memory address. PR target/89021 * config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2 maskmovdqu for __MMX_WITH_SSE__. From-SVN: r271234
H.J. Lu committed -
Emulate MMX mmx_umulv4hi3_highpart with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_umulv4hi3_highpart): Add SSE emulation. From-SVN: r271233
H.J. Lu committed -
Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb from QImode to SImode. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pmovmskb): Changed to define_insn_and_split to support SSE emulation. From-SVN: r271232
H.J. Lu committed -
Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_<code>v4hi3): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (mmx_<code>v8qi3): Likewise. (smaxmin:<code>v4hi3): New. (umaxmin:<code>v8qi3): Likewise. (smaxmin:*mmx_<code>v4hi3): Add SSE emulation. (umaxmin:*mmx_<code>v8qi3): Likewise. From-SVN: r271231
H.J. Lu committed -
Emulate MMX mmx_pinsrw with SSE. Only SSE register destination operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_pinsrw): Add SSE emulation. From-SVN: r271230
H.J. Lu committed -
Emulate MMX mmx_pextrw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pextrw): Add SSE emulation. From-SVN: r271229
H.J. Lu committed -
Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of destination XMM register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (sse_cvtpi2ps): Changed to define_insn_and_split. Also allow TARGET_MMX_WITH_SSE. Add SSE emulation. From-SVN: r271228
H.J. Lu committed -
Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE. PR target/89021 * config/i386/sse.md (sse_cvtps2pi): Add SSE emulation. (sse_cvttps2pi): Likewise. From-SVN: r271227
H.J. Lu committed -
Emulate MMX pshufw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (mmx_pshufw_1): Add SSE emulation. (*vec_dupv4hi): Changed to define_insn_and_split and also allow TARGET_MMX_WITH_SSE to support SSE emulation. From-SVN: r271226
H.J. Lu committed -
Emulate MMX vec_dupv2si with SSE. Add the "Yw" constraint to allow broadcast from integer register for AVX512BW with TARGET_AVX512VL. Only SSE register source operand is allowed. PR target/89021 * config/i386/constraints.md (Yw): New constraint. * config/i386/mmx.md (*vec_dupv2si): Changed to define_insn_and_split and also allow TARGET_MMX_WITH_SSE to support SSE emulation. From-SVN: r271225
H.J. Lu committed -
Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE. (*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. (mmx_gt<mode>3): Likewise. From-SVN: r271224
H.J. Lu committed -
Emulate MMX mmx_andnot<mode>3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_andnot<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. From-SVN: r271223
H.J. Lu committed -
Emulate MMX <any_logic><mode>3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE. (any_logic:<code><mode>3): New. (any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. From-SVN: r271222
H.J. Lu committed -
Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_ashr<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE emulation. (mmx_<shift_insn><mode>3): Likewise. (ashr<mode>3): New. (<shift_insn><mode>3): Likewise. From-SVN: r271221
H.J. Lu committed -
Emulate MMX pmaddwd with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. (*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. Add SSE support. From-SVN: r271220
H.J. Lu committed -
Emulate MMX mulv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. (*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add SSE support. From-SVN: r271219
H.J. Lu committed -
Emulate MMX mulv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE. (mulv4hi3): New. (*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. From-SVN: r271218
H.J. Lu committed -
Emulate MMX plusminus/sat_plusminus with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI. (plusminus:mmx_<plusminus_insn><mode>3): Check TARGET_MMX_WITH_SSE. (sat_plusminus:mmx_<plusminus_insn><mode>3): Likewise. (<plusminus_insn><mode>3): New. (*mmx_<plusminus_insn><mode>3): Add SSE emulation. (*mmx_<plusminus_insn><mode>3): Likewise. From-SVN: r271217
H.J. Lu committed -
Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX. For MMX punpckhXX, move bits 64:127 to bits 0:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/i386-expand.c (ix86_split_mmx_punpck): New function. * config/i386/i386-protos.h (ix86_split_mmx_punpck): New prototype. * config/i386/mmx.m (mmx_punpckhbw): Changed to define_insn_and_split to support SSE emulation. (mmx_punpcklbw): Likewise. (mmx_punpckhwd): Likewise. (mmx_punpcklwd): Likewise. (mmx_punpckhdq): Likewise. (mmx_punpckldq): Likewise. From-SVN: r271216
H.J. Lu committed -
Emulate MMX packsswb/packssdw/packuswb with SSE packsswb/packssdw/packuswb plus moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx): New function. (ix86_split_mmx_pack): Likewise. * config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx): New prototype. (ix86_split_mmx_pack): Likewise. * config/i386/i386.md (mmx_isa): New. (enabled): Also check mmx_isa. * config/i386/mmx.md (any_s_truncate): New code iterator. (s_trunsuffix): New code attr. (mmx_packsswb): Removed. (mmx_packssdw): Likewise. (mmx_packuswb): Likewise. (mmx_pack<s_trunsuffix>swb): New define_insn_and_split to emulate MMX packsswb/packuswb with SSE2. (mmx_packssdw): Likewise. * config/i386/predicates.md (register_mmxmem_operand): New. Co-Authored-By: Uros Bizjak <ubizjak@gmail.com> From-SVN: r271215
H.J. Lu committed -
In 64-bit mode, SSE2 can be used to emulate MMX instructions without 3DNOW. We can use SSE2 to support MMX register modes. PR target/89021 * config/i386/i386-c.c (ix86_target_macros_internal): Define __MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE. * config/i386/i386.c (ix86_set_reg_reg_cost): Add support for TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE. (ix86_vector_mode_supported_p): Likewise. * config/i386/i386.h (TARGET_MMX_WITH_SSE): New. From-SVN: r271213
H.J. Lu committed -
2019-05-15 Iain Sandoe <iain@sandoe.co.uk> * lto-plugin.c (cleanup_handler): Remove unused var. From-SVN: r271212
Iain Sandoe committed -
2019-05-15 Paolo Carlini <paolo.carlini@oracle.com> * call.c (perform_overload_resolution, build_new_method_call_1): Use OVL_P; remove redundant TEMPLATE_DECL checks. * decl.c (grokfndecl): Likewise. * mangle.c (write_expression): Likewise. * parser.c (cp_parser_template_id): Likewise. * pt.c (resolve_overloaded_unification, type_dependent_expression_p): Likewise. * search.c (build_baselink): Likewise. * tree.c (is_overloaded_fn, dependent_name, maybe_get_fns): Likewise. From-SVN: r271211
Paolo Carlini committed -
2019-05-15 Martin Liska <mliska@suse.cz> PR middle-end/90478 * tree-switch-conversion.c (jump_table_cluster::can_be_handled): Check for overflow. 2019-05-15 Martin Liska <mliska@suse.cz> PR middle-end/90478 * gcc.dg/tree-ssa/pr90478-2.c: New test. * gcc.dg/tree-ssa/pr90478.c: New test. From-SVN: r271210
Martin Liska committed -
2019-05-15 Richard Biener <rguenther@suse.de> * tree-into-ssa.c (pass_build_ssa::execute): Run update_address_taken before going into SSA. From-SVN: r271209
Richard Biener committed -
2019-05-15 Richard Biener <rguenther@suse.de> c/ * gimple-parser.c (c_parser_gimple_postfix_expression): Handle __BIT_FIELD_REF. * tree-pretty-print.c (dump_generic_node): Dump BIT_FIELD_REF as __BIT_FIELD_REF with type with -gimple. * gcc.dg/gimplefe-40.c: Amend. From-SVN: r271208
Richard Biener committed -
2019-05-15 Vladislav Ivanishin <vlad@ispras.ru> * tree-ssa-uninit.c (is_value_included_in): Remove is_unsigned and merge semantically equivalent branches (left over after prior refactorings). From-SVN: r271207
Vladislav Ivanishin committed -
re PR tree-optimization/90474 (ICE: verify_gimple failed (error: DECL_GIMPLE_REG_P set on a variable with address taken; error: invalid address operand in MEM_REF)) 2019-05-15 Richard Biener <rguenther@suse.de> PR c/90474 * c-common.c (c_common_mark_addressable_vec): Also mark a COMPOUND_LITERAL_EXPR_DECL addressable similar to c_mark_addressable. From-SVN: r271206
Richard Biener committed -
If we build Darwin with a modern assembler, then it might well recognise insns that cannot be used on current Darwin systems. The patch augments the tests for feature support for VSX, power8 and power9 to exclude Darwin even if the assembler can handle the instructions. 2019-05-15 Iain Sandoe <iain@sandoe.co.uk> * lib/target-supports.exp (check_effective_target_powerpc_p8vector_ok): No support for Darwin. (check_effective_target_powerpc_p9vector_ok): Likewise. (check_effective_target_powerpc_float128_sw_ok): Likewise. (check_effective_target_powerpc_float128_hw_ok): Likewise. (check_effective_target_powerpc_vsx_ok): Likewise. * gcc.target/powerpc/bfp/bfp.exp: Don't try to run this for Darwin. * gcc.target/powerpc/dfp/dfp.exp: Likewise. From-SVN: r271205
Iain Sandoe committed -
2019-05-15 Richard Biener <rguenther@suse.de> PR tree-optimization/88828 * tree-ssa-forwprop.c (simplify_vector_constructor): Fix bogus check. From-SVN: r271204
Richard Biener committed -
gimple-parser.c (c_parser_gimple_statement): Remove questionable auto-promotion to VIEW_CONVERT_EXPR. 2019-05-14 Richard Biener <rguenther@suse.de> * gimple-parser.c (c_parser_gimple_statement): Remove questionable auto-promotion to VIEW_CONVERT_EXPR. (c_parser_gimple_typespec): Split out from __MEM parsing. (c_parser_gimple_postfix_expression): Handle __VIEW_CONVERT. * tree-pretty-print.c (dump_generic_node): Dump VIEW_CONVERT_EXPR as __VIEW_CONVERT with -gimple. * gcc.dg/gimplefe-40.c: New testcase. From-SVN: r271203
Richard Biener committed
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