* parser.c (cp_parser_lambda_declarator_opt): Make the pedwarn
	conditional.

From-SVN: r215274

gcc/
	* Makefile.in (dg_target_exps): Remove.
	(check_gcc_parallelize): Change to just an upper bound number.
	(check-%-subtargets): Always print the non-parallelized goals.
	(check_p_vars, check_p_comma, check_p_subwork): Remove.
	(check_p_count, check_p_numbers0, check_p_numbers1, check_p_numbers2,
	check_p_numbers3, check_p_numbers4, check_p_numbers5,
	check_p_numbers6): New variables.
	(check_p_numbers): Set to sequence from 1 to 9999.
	(check_p_subdirs): Set to sequence from 1 to minimum of
	$(check_p_count) and either GCC_TEST_PARALLEL_SLOTS env var if set,
	or 128.
	(check-%, check-parallel-%): Rewritten so that for parallelized
	testing each job runs all the *.exp files, with
	GCC_RUNTEST_PARALLELIZE_DIR set in environment.
gcc/go/
	* Make-lang.in (check_go_parallelize): Change to just an upper bound
	number.
gcc/fortran/
	* Make-lang.in (check_gfortran_parallelize): Change to just an upper
	bound number.
gcc/cp/
	* Make-lang.in (check_g++_parallelize): Change to just an upper bound
	number.
gcc/objc/
	* Make-lang.in (check_objc_parallelize): Change to just an upper
	bound number.
gcc/ada/
	* gcc-interface/Make-lang.in (check_acats_numbers0,
	check_acats_numbers1, check_acats_numbers2, check_acats_numbers3,
	check_acats_numbers4, check_acats_numbers5, check_acats_numbers6,
	check_acats_numbers, check_acats_subdirs): New variables.
	(check_acats_targets): Use $(check_acats_subdirs).
	(check-acats, check-acats%): Rewritten so that for parallelized
	testing each job runs all the chapters files, with
	GCC_RUNTEST_PARALLELIZE_DIR set in environment.  Prepare the support
	directory sequentially and share it.
	(check-acats-subtargets): Always print just check-acats.
gcc/testsuite/
	* lib/gcc-defs.exp (gcc_parallel_test_run_p,
	gcc_parallel_test_enable): New procedures.  If
	GCC_RUNTEST_PARALLELIZE_DIR is set in environment, override
	runtest_file_p to invoke also gcc_parallel_test_run_p.
	* g++.dg/guality/guality.exp (check_guality): Save/restore
	test_counts array around the body of the procedure.
	* gcc.dg/guality/guality.exp (check_guality): Likewise.
	* g++.dg/plugin/plugin.exp: Run all the tests serially
	by the first parallel runtest encountering it.
	* gcc.dg/plugin/plugin.exp: Likewise.
	* gcc.misc-tests/matrix1.exp: Likewise.
	* gcc.misc-tests/dhry.exp: Likewise.
	* gcc.misc-tests/acker1.exp: Likewise.
	* gcc.misc-tests/linkage.exp: Likewise.
	* gcc.misc-tests/mg.exp: Likewise.
	* gcc.misc-tests/mg-2.exp: Likewise.
	* gcc.misc-tests/sort2.exp: Likewise.
	* gcc.misc-tests/sieve.exp: Likewise.
	* gcc.misc-tests/options.exp: Likewise.
	* gcc.misc-tests/help.exp: Likewise.
	* go.test/go-test.exp (go-gc-tests): Use
	gcc_parallel_test_enable {0, 1} around all handling of
	each test.
	* objc.dg/gnu-encoding/gnu-encoding.exp: Likewise.
	* ada/acats/run_all.sh: Parallelize using mkdir inside of
	a shared directory.  Avoid forking and expr uses if
	shell supports $(()).
libstdc++-v3/
	* testsuite/Makefile.am (check_p_numbers0, check_p_numbers1,
	check_p_numbers2, check_p_numbers3, check_p_numbers4,
	check_p_numbers5, check_p_numbers6, check_p_numbers,
	check_p_subdirs): New variables.
	(check_DEJAGNU_normal_targets): Use check_p_subdirs.
	(check-DEJAGNU): Rewritten so that for parallelized
	testing each job runs all the *.exp files, with
	GCC_RUNTEST_PARALLELIZE_DIR set in environment.
	* testsuite/Makefile.in: Regenerated.
	* testsuite/lib/libstdc++.exp (gcc_parallel_test_run_p,
	gcc_parallel_test_enable): New procedures.  If
	GCC_RUNTEST_PARALLELIZE_DIR is set in environment, override
	runtest_file_p to invoke also gcc_parallel_test_run_p.
	* testsuite/libstdc++-abi/abi.exp: Run all the tests serially
	by the first parallel runtest encountering it.  Fix up path
	of the extract_symvers script.
	* testsuite/libstdc++-xmethods/xmethods.exp: Run all the tests
	serially by the first parallel runtest encountering it.  Run
	dg-finish even in case of error.

From-SVN: r215273

gcc/c-family/ChangeLog:

2014-09-15  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* c.opt (Wpsabi): Use LangEnabledBy.
	* c-opts.c (c_common_handle_option): Do not handle here.

From-SVN: r215272

gcc/ChangeLog:
	* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
	rtx to rtx_insn *.
	(arc_sets_cc_p): Likewise.
	* config/arc/arc.c (arc_print_operand): Use methods of
	"final_sequence" for clarity, and to enable strengthening of
	locals "jump" and "delay" from rtx to rtx_insn *.
	(arc_adjust_insn_length): Strengthen local "prev" from rtx to
	rtx_insn *; use method of rtx_sequence for typesafety.
	(arc_get_insn_variants): Use insn method of rtx_sequence for
	typesafety.
	(arc_pad_return): Likewise.
	(arc_attr_type): Strengthen param from rtx to rtx_insn *.
	(arc_sets_cc_p): Likewise.  Also, convert a GET_CODE check to a
	dyn_cast to rtx_sequence *, using insn method for typesafety.
	* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
	rtx_sequence * and use insn method when invoking get_attr_length.
	* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
	to rtx_insn *.  Replace a GET_CODE check with a dyn_cast to
	rtx_sequence *, introducing a local "seq", using its insn method
	from typesafety and clarity.
	(add_sched_insns_for_speculation): Strengthen local "next" from
	rtx to rtx_insn *.
	* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
	(predicate_insn): Likewise.
	* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
	second param.
	* config/cris/cris.c (cris_notice_update_cc): Likewise.
	* config/epiphany/epiphany-protos.h
	(extern void epiphany_insert_mode_switch_use): Likewise for param
	"insn".
	(get_attr_sched_use_fpu): Likewise for param.
	* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
	Likewise for param "insn".
	* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
	param "insn" of "target_insert_mode_switch_use" callback.
	* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
	(frv_issues_to_branch_unit_p): Likewise.
	(frv_pack_insn_p): Likewise.
	(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
	const rtx * (i.e. mutable rtx_def * const *) to
	rtx_insn * const *.
	* config/i386/i386-protos.h (standard_sse_constant_opcode):
	Strengthen first param from rtx to rtx_insn *.
	(output_fix_trunc): Likewise.
	* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
	(output_fix_trunc): Likewise.
	(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
	local "insn".
	(min_insn_size): Likewise for param "insn".
	(get_mem_group): Likewise.
	(is_cmp): Likewise.
	(get_insn_path): Likewise.
	(get_insn_group): Likewise.
	(count_num_restricted): Likewise.
	(fits_dispatch_window): Likewise.
	(add_insn_window): Likewise.
	(add_to_dispatch_window): Likewise.
	(debug_insn_dispatch_info_file): Likewise.
	* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
	first param.
	* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
	"cmp" and local "prev".
	(m32c_output_compare): Likewise for param "insn".
	* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
	a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
	(define_predicate "large_insn_p"): Likewise.
	* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
	param from rtx to rtx_insn *.
	(attr_op_mem m68k_sched_attr_op_mem): Likewise.
	* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
	(m68k_sched_attr_size): Likewise.
	(sched_get_opxy_mem_type): Likewise for param "insn".
	(m68k_sched_attr_op_mem): Likewise.
	(sched_mem_operand_p): Likewise.
	* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
	* config/mep/mep.c (mep_multi_slot): Likewise.
	* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
	first param.
	(mips_sync_loop_insns): Likewise.
	* config/mips/mips.c (mips_print_operand_punctuation): Use insn
	method of "final_sequence" for typesafety.
	(mips_process_sync_loop): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mips_output_sync_loop): Likewise.
	(mips_sync_loop_insns): Likewise.
	(mips_74k_agen_init): Likewise.
	(mips_sched_init): Use NULL rather than NULL_RTX when working with
	insns.
	* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
	Strengthen param "insn" from rtx to rtx_insn *.
	* config/nds32/nds32.c (nds32_target_alignment): Likewise for
	local "insn".
	* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
	param.
	* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
	"insn".  Use method of rtx_sequence for typesafety.
	(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(branch_needs_nop_p): Likewise.
	(use_skip_p): Likewise.
	(pa_insn_refs_are_delayed): Likewise.
	* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
	for locals "insn", "ninsn".
	* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
	"insn".
	(is_cracked_insn): Likewise.
	(is_branch_slot_insn): Likewise.
	(is_nonpipeline_insn): Likewise.
	(insn_terminates_group_p): Likewise.
	(insn_must_be_first_in_group): Likewise.
	(insn_must_be_last_in_group): Likewise.
	(force_new_group): Likewise for param "next_insn".
	* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
	"insn".
	(s390_sched_score): Likewise.
	* config/sh/sh-protos.h (output_branch): Likewise for param 2.
	(rtx sfunc_uses_reg): Likewise for sole param.
	* config/sh/sh.c (sh_print_operand): Use insn method of
	final_sequence for typesafety.
	(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
	Use insn method of final_sequence for typesafety.
	(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
	* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
	for param.
	(eligible_for_return_delay): Likewise.
	(eligible_for_sibcall_delay): Likewise.
	* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
	(eligible_for_return_delay): Likewise.
	(eligible_for_sibcall_delay): Likewise.
	* config/stormy16/stormy16-protos.h
	(xstormy16_output_cbranch_hi): Likewise for final param.
	(xstormy16_output_cbranch_si): Likewise.
	* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
	(xstormy16_output_cbranch_si): Likewise.
	* config/v850/v850-protos.h (notice_update_cc): Likewise.
	* config/v850/v850.c (notice_update_cc): Likewise.

	* final.c (get_attr_length_1): Strengthen param "insn" and param
	of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
	(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
	(get_attr_min_length): Likewise.
	(shorten_branches): Likewise for signature of locals "length_fun"
	and "inner_length_fun".  Introduce local rtx_sequence * "seqn"
	from a checked cast and use its methods for clarity and to enable
	strengthening local "inner_insn" from rtx to rtx_insn *.
	* genattr.c (gen_attr): When writing out the prototypes of the
	various generated "get_attr_" functions, strengthen the params of
	the non-const functions from rtx to rtx_insn *.
	Similarly, strengthen the params of insn_default_length,
	insn_min_length, insn_variable_length_p, insn_current_length.
	(main): Similarly, strengthen the param of num_delay_slots,
	internal_dfa_insn_code, insn_default_latency, bypass_p,
	insn_latency, min_issue_delay, print_reservation,
	insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
	"insn_default_latency" callbacks.  Rename hook_int_rtx_unreachable
	to hook_int_rtx_insn_unreachable.
	* genattrtab.c (write_attr_get): When writing out the generated
	"get_attr_" functions, strengthen the param "insn" from rtx to
	rtx_insn *, eliminating a checked cast.
	(make_automaton_attrs): When writing out prototypes of
	"internal_dfa_insn_code_", "insn_default_latency_" functions
	and the "internal_dfa_insn_code" and "insn_default_latency"
	callbacks, strengthen their params from rtx to rtx_insn *
	* genautomata.c (output_internal_insn_code_evaluation): When
	writing out code, add a checked cast from rtx to rtx_insn * when
	invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
	(output_dfa_insn_code_func): Strengthen param of generated
	function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
	(output_trans_func): Likewise for generated function
	"state_transition".
	(output_internal_insn_latency_func): When writing out generated
	function "internal_insn_latency", rename params from "insn" and
	"insn2" to "insn_or_const0" and "insn2_or_const0".  Reintroduce
	locals "insn" and "insn2" as rtx_insn * with checked casts once
	we've proven that we're not dealing with const0_rtx.
	(output_insn_latency_func):  Strengthen param of generated
	function "insn_latency" from rtx to rtx_insn *.
	(output_print_reservation_func): Likewise for generated function
	"print_reservation".
	(output_insn_has_dfa_reservation_p): Likewise for generated
	function "insn_has_dfa_reservation_p".
	* hooks.c (hook_int_rtx_unreachable): Rename to...
	(hook_int_rtx_insn_unreachable): ...this, and strengthen param
	from rtx to rtx_insn *.
	* hooks.h (hook_int_rtx_unreachable): Likewise.
	(extern int hook_int_rtx_insn_unreachable): Likewise.
	* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
	(get_attr_min_length): Likewise.
	* recog.c (get_enabled_alternatives): Likewise.
	* recog.h (alternative_mask get_enabled_alternatives): Likewise.
	* reorg.c (find_end_label): Introduce local rtx "pat" and
	strengthen local "insn" from rtx to rtx_insn *.
	(redundant_insn): Use insn method of "seq" rather than element for
	typesafety; strengthen local "control" from rtx to rtx_insn *.
	* resource.c (mark_referenced_resources): Add checked cast to
	rtx_insn * within INSN/JUMP_INSN case.
	(mark_set_resources): Likewise.
	* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
	rtx to rtx_insn *.

From-SVN: r215271

gcc/ChangeLog:
	* config/rs6000/rs6000.c (rs6000_loop_align_max_skip): Strengthen
	param "label" from rtx to rtx_insn *.
	* config/rx/rx.c (rx_max_skip_for_label): Likewise for param "lab"
	and local "op".
	* doc/tm.texi (TARGET_ASM_JUMP_ALIGN_MAX_SKIP): Autogenerated changes.
	(TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP): Likewise.
	(TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Likewise.
	(TARGET_ASM_LABEL_ALIGN_MAX_SKIP): Likewise.
	* final.c (default_label_align_after_barrier_max_skip): Strengthen
	param from rtx to rtx_insn *.
	(default_loop_align_max_skip): Likewise.
	(default_label_align_max_skip): Likewise.
	(default_jump_align_max_skip): Likewise.
	* target.def (label_align_after_barrier_max_skip): Likewise.
	(loop_align_max_skip): Likewise.
	(label_align_max_skip): Likewise.
	(jump_align_max_skip): Likewise.
	* targhooks.h (default_label_align_after_barrier_max_skip):
	Likewise.
	(default_loop_align_max_skip): Likewise.
	(default_label_align_max_skip): Likewise.
	(default_jump_align_max_skip): Likewise.

From-SVN: r215270

gcc/ChangeLog:
	* config/arc/arc.c (arc_can_follow_jump): Strengthen both params
	from const_rtx to const rtx_insn *.  Update union members from rtx
	to rtx_insn *.
	* doc/tm.texi (TARGET_CAN_FOLLOW_JUMP): Autogenerated change.
	* hooks.c (hook_bool_const_rtx_const_rtx_true): Rename to...
	(hook_bool_const_rtx_insn_const_rtx_insn_true): ...this, and
	strengthen both params from const_rtx to const rtx_insn *.
	* hooks.h (hook_bool_const_rtx_const_rtx_true): Likewise.
	(hook_bool_const_rtx_insn_const_rtx_insn_true): Likewise.
	* reorg.c (follow_jumps): Strengthen param "jump" from rtx to
	rtx_insn *.
	* target.def (can_follow_jump): Strengthen both params from
	const_rtx to const rtx_insn *, and update default implementation
	from hook_bool_const_rtx_const_rtx_true to
	hook_bool_const_rtx_insn_const_rtx_insn_true.

From-SVN: r215269

gcc/ChangeLog:
	* sched-deps.c (deps_start_bb): Strengthen param "head" and local
	"insn" from rtx to rtx_insn *.
	* sched-int.h (deps_start_bb): Likewise for 2nd param.

From-SVN: r215268

2014-09-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* longlong.h: Add __udiv_w_sdiv prototype.

From-SVN: r215266

gcc/
	* config/i386/sse.md
	(define_insn "vcvtph2ps<mask_name>"): Add masking.
	(define_insn "*vcvtph2ps_load<mask_name>"): Ditto.
	(define_insn "vcvtph2ps256<mask_name>"): Ditto.
	(define_expand "vcvtps2ph_mask"): New.
	(define_insn "*vcvtps2ph<mask_name>"): Add masking.
	(define_insn "*vcvtps2ph_store<mask_name>"): Ditto.
	(define_insn "vcvtps2ph256<mask_name>"): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215263

gcc/
	* config/i386/sse.md (define_mode_iterator VI248_AVX512BW_AVX512VL):
	New.
	(define_mode_iterator VI24_AVX512BW_1): Ditto.
	(define_insn "<mask_codefor>ashr<mode>3<mask_name>"): Ditto.
	(define_insn "<mask_codefor>ashrv2di3<mask_name>"): Ditto.
	(define_insn "ashr<VI248_AVX512BW_AVX512VL:mode>3<mask_name>"): Enable
	also for TARGET_AVX512VL.
	(define_expand "ashrv2di3"): Update to enable TARGET_AVX512VL.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215262

	* include/bits/regex.h (basic_regex): Rename _Ch_typeraits template
	parameters to _Ch_traits.

From-SVN: r215261

gcc/

	* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.

From-SVN: r215260

This patch adds an item for --disable-libsanitizer to the configuration
documentation.
The option is especially useful during bisection, because it reduces
build time a lot.

2014-09-15  Markus Trippelsdorf  <markus@trippelsdorf.de>

	* doc/install.texi (Options specification): add
	--disable-libsanitizer item.

From-SVN: r215259

From-SVN: r215257

	PR target/61407

	* config/darwin-c.c (version_as_macro): Added extra 0 for OS X 10.10
	and above.
	* config/darwin-driver.c (darwin_find_version_from_kernel): Removed
	kernel version check to avoid incrementing it after every major OS X
	release.
	(darwin_default_min_version): Avoid static memory buffer.

	* gcc.dg/darwin-minversion-1.c: Fixed formatting
	* gcc.dg/darwin-minversion-2.c: Fixed formatting
	* gcc.dg/darwin-minversion-3.c: Fixed formatting
	* gcc.dg/darwin-minversion-4.c: Added test for OS X 10.10

Co-Authored-By: Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>

From-SVN: r215251

From-SVN: r215250

From-SVN: r215242

	* tree.c (need_assembler_name_p): Store C++ type mangling only
	for aggregates.

From-SVN: r215238

From-SVN: r215237

2014-09-13  Tobias Burnus  <burnus@net-b.de>

        PR fortran/63252
        * trans-decl.c (gfc_build_builtin_function_decls): Fix
        caf_unlock declaration.

From-SVN: r215236

	PR c++/60862
	* parser.c (cp_parser_postfix_expression) <case CPP_OPEN_PAREN>: Set
	location of a call expression.

	* g++.dg/diagnostic/pr60862.C: New test.

From-SVN: r215235

	* tree.c (protected_set_expr_location): Don't check whether T is
	non-null here.

From-SVN: r215234

From-SVN: r215233

* config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
(extend_and_shift1_hipsi2): Likewise.
(extend_and_shift2_hipsi2): Likewise.

From-SVN: r215229

re PR c++/63201 (Full specialization of a member variable template of a class template does not work)

	PR c++/63201
	* decl.c (start_decl): Handle specialization of member variable
	template.
	* pt.c (check_explicit_specialization): Adjust error.

From-SVN: r215226

	* include/debug/deque (__gnu_debug::deque): Make base class C++11
	allocator aware.

From-SVN: r215223

gcc/ChangeLog:
	* config/alpha/alpha.c (alpha_ra_ever_killed): Replace NULL_RTX
	with NULL when dealing with an insn.
	* config/sh/sh.c (sh_reorg): Strengthen local "last_float_move"
	from rtx to rtx_insn *.
	* rtl.h (reg_set_between_p): Strengthen params 2 and 3 from
	const_rtx to const rtx_insn *.
	* rtlanal.c (reg_set_between_p): Likewise, removing a checked cast.

From-SVN: r215222

	PR libstdc++/59603
	* include/bits/stl_algo.h (random_shuffle): Prevent self-swapping.
	* testsuite/25_algorithms/random_shuffle/59603.cc: New.

From-SVN: r215219

From-SVN: r215218

gcc/ChangeLog:

2014-09-12  Trevor Saunders  <tsaunders@mozilla.com>

	* hash-table.h (gt_pch_nx): don't call gt_pch_note_object within an
	assert.

From-SVN: r215216

This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.

The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support).  The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).

The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.

The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double.  This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right.  Overrides
were needed in the following cases:

* SFmode would always have been supported in libgcc (the condition was
  BITS_PER_UNIT == 8, true for all current targets), but pdp11
  defaults to 64-bit float, and in that case SFmode would fail
  scalar_mode_supported_p.  I don't know if libgcc actually built for
  pdp11 (and the port may well no longer be being used), but this
  patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
  treated as supported.

* Certain i386 and ia64 targets need the new hook to match the
  existing cases for when XFmode or TFmode support is present in
  libgcc.  For i386, the hook can always declare XFmode to be
  supported - the cases where it's not are the cases where long double
  is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
  but TFmode support needs to be conditional.  (And of the targets not
  defining LIBGCC2_HAS_TF_MODE before this patch, some defined
  LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
  always be false, while others did not define it, so allowing it to
  be true in the -mlong-double-128 case.  This patch matches that
  logic, although I suspect all the latter targets would have been
  broken if you tried to enable -mlong-double-128 by default, for lack
  of the soft-fp TFmode support in libgcc, which is separately
  configured.)

  [*] I don't know if it's deliberate not to support __float80 at all
  with -mlong-double-128.

In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc).  This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.

(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent.  Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)

Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.

Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.

gcc:
	* target.def (libgcc_floating_mode_supported_p): New hook.
	* targhooks.c (default_libgcc_floating_mode_supported_p): New
	function.
	* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
	* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
	(LIBGCC2_HAS_TF_MODE): Remove.
	(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
	* doc/tm.texi: Regenerate.
	* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
	machine mode.
	* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
	(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
	* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
	* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
	function.
	(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
	* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
	* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
	* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
	* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
	* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
	Remove.
	* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
	New macro.
	(ia64_libgcc_floating_mode_supported_p): New function.
	* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
	* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
	(IA64_NO_LIBGCC_TFMODE): Define.
	* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
	* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
	macro.
	(pdp11_scalar_mode_supported_p): New function.
	* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
	* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.

gcc/c-family:
	* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
	macros for floating-point modes.

gcc/fortran:
	* trans-types.c (gfc_init_kinds): Check
	targetm.libgcc_floating_mode_supported_p for floating-point
	modes.  Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.

libgcc:
	* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
	__LIBGCC_HAS_SF_MODE__.
	(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
	(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
	(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
	* config/libbid/bid_gcc_intrinsics.h
	(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
	(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
	(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
	* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
	(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
	(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.

From-SVN: r215215

2014-09-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/63237
	* gimple-fold.c (get_maxval_strlen): Gimplify string length.

	* g++.dg/torture/pr63237.C: New testcase.

From-SVN: r215212

2014-09-12  Marc Glisse  <marc.glisse@inria.fr>

gcc/
	* tree.c (integer_each_onep): New function.
	* tree.h (integer_each_onep): Declare it.
	* fold-const.c (fold_binary_loc): Use it for ~A + 1 to -A and
	-A - 1 to ~A.  Disable (X & 1) ^ 1, (X ^ 1) & 1 and ~X & 1 to
	(X & 1) == 0 for vector and complex.
gcc/testsuite/
	* gcc.dg/vec-andxor1.c: New file.

From-SVN: r215209

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c: (cortexa57_regmove_cost): New cost table for
  A57.
  (cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP cost
  to spilling from integer to FP registers.

From-SVN: r215208

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
  move handling.
  (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves are
  now handled correctly.

From-SVN: r215207

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost handling
  of CALLER_SAVE_REGS and POINTER_REGS.

From-SVN: r215206

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

  gcc/
    * ree.c (combine_reaching_defs): Ensure inserted copy don't change the
    number of hard registers.

From-SVN: r215205

gcc/
	* config/i386/sse.md
	(define_mode_iterator VI48_AVX512VL): New.
	(define_expand "<avx512>_vternlog<mode>_maskz"): Rename from
	"avx512f_vternlog<mode>_maskz" and update mode iterator.
	(define_insn "<avx512>_vternlog<mode><sd_maskz_name>"): Rename
	from "avx512f_vternlog<mode><sd_maskz_name>" and update mode iterator.
	(define_insn "<avx512>_vternlog<mode>_mask"): Rename from
	"avx512f_vternlog<mode>_mask" and update mode iterator.
	(define_insn "<mask_codefor><avx512>_align<mode><mask_name>"): Rename
	from "<mask_codefor>avx512f_align<mode><mask_name>" and update mode
	iterator.
	(define_insn "<avx512>_<rotate>v<mode><mask_name>"): Rename from
	"avx512f_<rotate>v<mode><mask_name>" and update mode iterator.
	(define_insn "<avx512>_<rotate><mode><mask_name>"): Rename from
	"avx512f_<rotate><mode><mask_name>" and update mode iterator.
	(define_insn "clz<mode>2<mask_name>"): Use VI48_AVX512VL mode iterator.
	(define_insn "<mask_codefor>conflict<mode><mask_name>"): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215203

gcc/
	* config/i386/sse.md (VI128_256): Delete.
	(define_mode_iterator VI124_256): New.
	(define_mode_iterator VI124_256_AVX512F_AVX512BW): Ditto.
	(define_expand "<code><mode>3<mask_name><round_name>"): Delete.
	(define_expand "<code><VI124_256_AVX512F_AVX512BW:mode>3"): New.
	(define_insn "*avx2_<code><VI124_256:mode>3"): Rename from
	"*avx2_<code><mode>3<mask_name><round_name>" and update mode iterator.
	(define_expand "<code><VI48_AVX512VL:mode>3_mask"): New.
	(define_insn "*avx512bw_<code><VI48_AVX512VL:mode>3<mask_name>"): Ditto.
	(define_insn "<mask_codefor><code><mode>3<mask_name>"): Update mode
	iterator.
	(define_expand "<code><VI8_AVX2:mode>3"): Update pettern generation
	in presence of AVX-512.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215202

gcc/
	* config/i386/sse.md
	(define_expand "<avx512>_gathersi<mode>"): Rename from
	"avx512f_gathersi<mode>".
	(define_insn "*avx512f_gathersi<mode>"): Use VI48F.
	(define_insn "*avx512f_gathersi<mode>_2"): Ditto.
	(define_expand "<avx512>_gatherdi<mode>"): Rename from
	"avx512f_gatherdi<mode>".
	(define_insn "*avx512f_gatherdi<mode>"): Use VI48F.
	(define_insn "*avx512f_gatherdi<mode>_2"): Use VI48F, add 128/256-bit
	wide versions.
	(define_expand "<avx512>_scattersi<mode>"): Rename from
	"avx512f_scattersi<mode>".
	(define_insn "*avx512f_scattersi<mode>"): Use VI48F.
	(define_expand "<avx512>_scatterdi<mode>"): Rename from
	"avx512f_scatterdi<mode>".
	(define_insn "*avx512f_scatterdi<mode>"): Use VI48F.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215201