2016-11-30  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33.

From-SVN: r243015

	PR sanitizer/78532
	* sanitizer_common/sanitizer_platform_limits_posix.h
	(__sanitizer_sigaction): Adjust for sparc targets and various Glibc
	versions.

From-SVN: r243014

2016-11-29  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * lib/target-supports.exp (add_options_for_arm_arch_v6m): Add
    -mfloat-abi=soft option.
    (add_options_for_arm_arch_v8m_base): Likewise.  Reindent containing
    foreach loop.

From-SVN: r243013

	PR ipa/78555
	* real.c (real_hash): Add cast to avoid left
	shifting of negative values.

From-SVN: r243012

	PR target/78362
	* config/aarch64/aarch64.md (add<mode>3): Extract inner expression
	from a subreg in operands[1] and don't call REGNO on a non-reg
	expression when deciding to force operands[2] into a reg.

	* gcc.c-torture/compile/pr78362.c: New test.

From-SVN: r243011

	* configure.ac (--enable-objc-gc): If not given, default to
	enable_objc_gc=no.
	* configure: Regenerated.

From-SVN: r243010

In check_effective_target_freorder we check to see if the target
supports -freorder-blocks-and-partition.  However we disable
-freorder-blocks-and-partition when -fprofile-use is not supplied so for
some targets we'll not see any message about lack of support for
-freorder-blocks-and-partition unless -fprofile-use is also passed.

This commit extends check_effective_target_freorder to first try
-freorder-blocks-and-partition on its own, then try -fprofile-use and
-freorder-blocks-and-partition.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp (check_effective_target_freorder): Check
	additional case.

From-SVN: r243009

gcc/lto/
	PR lto/78562
	* lto-symtab.c (lto_symtab_merge_decls_2): Don't diagnose type
	mismatch if the two types are built-in.

From-SVN: r243008

ARC700 targets have a store/load pipeline hazard, if we load within 2
cycles of a store, and the load/store are at the same address, then we
pay a multi-cycle penalty.

This commit avoids this by inserting nop instructions between the store
and the load.

gcc/ChangeLog:

	* config/arc/arc-protos.h (arc_store_addr_hazard_p): Declare.
	* config/arc/arc.c (arc_store_addr_hazard_p): New function.
	(workaround_arc_anomaly): Call arc_store_addr_hazard_p for ARC700.
	* config/arc/arc700.md: Add define_bypass for store/load.

gcc/testsuite/ChangeLog:

	* gcc.target/arc/arc700-stld-hazard.c: New file.

From-SVN: r243007

* include/std/istream (__is_convertible_to_basic_istream): New.
(__is_extractable): Likewise.
(operator>>(basic_istream<_CharT, _Traits>&&, _Tp&&)):
Turn the stream parameter into a template parameter
and constrain.
* include/std/ostream (__is_convertible_to_basic_ostream): New.
(__is_insertable): Likewise.
(operator<<(basic_ostream<_CharT, _Traits>&&, const _Tp&)):
Turn the stream parameter into a template parameter
and constrain.
* testsuite/27_io/basic_istream/extractors_other/char/4.cc: New.
* testsuite/27_io/basic_istream/extractors_other/wchar_t/4.cc:
Likewise.
* testsuite/27_io/basic_ostream/inserters_other/char/6.cc: Likewise.
* testsuite/27_io/basic_ostream/inserters_other/wchar_t/6.cc: Likewise.

From-SVN: r243006

2016-11-30  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78592
	* interface.c (gfc_find_specific_dtio_proc): Rearrange code to avoid
	dereferencing a null pointer.

2016-11-30  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78592
	* gfortran.dg/dtio_18.f90: New test case.

From-SVN: r243005

	* cgraph.c (symbol_table::initialize): Initialize
	ipa_clones_dump_file.
	(cgraph_node::remove): Report to ipa_clones_dump_file.
	* cgraph.h: Add new argument (suffix) to cloning methods.
	* cgraphclones.c (dump_callgraph_transformation): New function.
	(cgraph_node::create_clone): New argument.
	(cgraph_node::create_virtual_clone): Likewise.
	(cgraph_node::create_version_clone): Likewise.
	* dumpfile.c: Add .ipa-clones dump file.
	* dumpfile.h (enum tree_dump_index): Add TDI_clones
	* ipa-inline-transform.c (clone_inlined_nodes): Report operation
	to dump_callgraph_transformation.

From-SVN: r243004

	PR sanitizer/78541
	* gcc.dg/asan/pr78541-2.c: New test.
	* gcc.dg/asan/pr78541.c: New test.
	PR sanitizer/78541
	* asan.c (asan_expand_mark_ifn): Properly
	select a VAR_DECL from FRAME.* component reference.

From-SVN: r243003

From-SVN: r243002

2016-11-30  Christophe Lyon  <christophe.lyon@linaro.org>

	* testsuite/experimental/type_erased_allocator/2.cc: Add
	dg-require-thread-fence.

From-SVN: r243001

The comment for the added case to simplify_truncation reads

  /* Turn (truncate:M1 (*_extract:M2 (reg:M2) (len) (pos))) into
     (*_extract:M1 (truncate:M1 (reg:M2)) (len) (pos')) if possible without
     changing len.  */

but I forgot to check the two modes M2 are actually the same.


	PR rtl-optimization/78583
	* simplify-rtx.c (simplify_truncation): Add check missing from the
	previous commit.

From-SVN: r243000

PR78590 shows a problem in change_zero_ext, where we change a zero_extend
of a subreg to a logical and.  We should only do this if the thing we are
taking the subreg of is a scalar integer, otherwise we will take a subreg
of (e.g.) a float in a different size, which is nonsensical and hits an
assert.


	PR rtl-optimization/78590
	* combine.c (change_zero_ext): Transform zero_extend of subregs only
	if the subreg_reg is a scalar integer mode.

From-SVN: r242999

	PR tree-optimization/78586
	* gimple-ssa-sprintf.c (format_integer): Use TYPE_MAX_VALUE or
	TYPE_MIN_VALUE or build_all_ones_cst instead of folding LSHIFT_EXPR.
	Don't build_int_cst min/max twice.  Formatting fix.

	* gcc.c-torture/execute/pr78586.c: New test.

From-SVN: r242998

Fix PR78588 - rtlanal.c:5210:38: runtime error: shift exponent 4294967295 is too large for 64-bit type

Building gcc with -fsanitize=undefined shows:
 rtlanal.c:5210:38: runtime error: shift exponent 4294967295 is too large for 64-bit type 'long unsigned int'

This happens because if_then_else_cond() in combine.c calls
num_sign_bit_copies() in rtlanal.c with mode==BLKmode.

5205   bitwidth = GET_MODE_PRECISION (mode);
5206   if (bitwidth > HOST_BITS_PER_WIDE_INT)
5207     return 1;
5208
5209   nonzero = nonzero_bits (x, mode);
5210   return nonzero & (HOST_WIDE_INT_1U << (bitwidth - 1))
5211          ? 1 : bitwidth - floor_log2 (nonzero) - 1;

This causes (bitwidth - 1) to wrap around.

	PR rtl-optimization/78588
	* combine.c (if_then_else_cond): Also guard against BLKmode.
	* rtlanal.c (num_sign_bit_copies1): Add assert.

From-SVN: r242997

2016-11-30  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78573
	* decl.c (build_struct): On error, return directly and do not build
	class symbol.

2016-11-30  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/78573
	* gfortran.dg/class_61.f90: New test case.

From-SVN: r242996

        * common/config/arc/arc-common.c (arc_handle_option): Remove unused
        variables.

From-SVN: r242994

lra-constraints.c (check_and_process_move): Constrain the range of DCLASS and SCLASS to avoid false positive out of bounds...

	* lra-constraints.c (check_and_process_move): Constrain the
	range of DCLASS and SCLASS to avoid false positive out of bounds
	array index warning.

From-SVN: r242993

    
    With -buildmode=c-archive, initsig is called before the memory
    allocator has been initialized.  The code was doing a memory
    allocation because of the call to funcPC(sigtramp).  When escape
    analysis is fully implemented, that call should not allocate.  For
    now, finesse the issue by calling a C function to get the C function
    pointer value of sigtramp.
    
    When returning from a call from C to a Go function, a deferred
    function is run to go back to syscall mode.  When the call occurs on a
    non-Go thread, that call sets g to nil, making it impossible to add
    the _defer struct back to the pool.  Just drop it and let the garbage
    collector clean it up.
    
    Reviewed-on: https://go-review.googlesource.com/33675

From-SVN: r242992

gcc/ChangeLog:
	* doc/install.texi (--with-target-bdw-gc): Remove stray '@'.

From-SVN: r242991

The ICE in PR preprocessor/78569 appears to be due to an attempt to
generate substring locations in a .i file where the underlying .c file
has changed since the .i file was generated.

This can't work, so it seems safest for the on-demand substring
locations to be unavailable for such files, falling back to
"whole string" locations for such cases.

gcc/ChangeLog:
	PR preprocessor/78569
	* input.c (get_substring_ranges_for_loc): Fail gracefully if
	line directives were present.

gcc/testsuite/ChangeLog:
	PR preprocessor/78569
	* gcc.dg/format/pr78569.c: New test case.

From-SVN: r242990

From-SVN: r242988

<toplevel>

2016-11-30  Matthias Klose  <doko@ubuntu.com>

        * Makefile.def: Remove reference to boehm-gc target module.
        * configure.ac: Include pkg.m4, check for --with-target-bdw-gc
        options and for the bdw-gc pkg-config module.
        * configure: Regenerate.
        * Makefile.in: Regenerate.

gcc/

2016-11-30  Matthias Klose  <doko@ubuntu.com>

        * doc/install.texi: Document configure options --enable-objc-gc
        and --with-target-bdw-gc.

config/

2016-11-30  Matthias Klose  <doko@ubuntu.com>

        * pkg.m4: New file.

libobjc/

2016-11-30  Matthias Klose  <doko@ubuntu.com>

        * configure.ac (--enable-objc-gc): Allow to configure with a
        system provided boehm-gc.
        * configure: Regenerate.
        * Makefile.in (OBJC_BOEHM_GC_LIBS): Get value from configure.
        * gc.c: Include system bdw-gc headers.
        * memory.c: Likewise
        * objects.c: Likewise

boehm-gc/

2016-11-30  Matthias Klose  <doko@ubuntu.com>

        Remove

From-SVN: r242985

2016-11-29  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/78594
	* config/rs6000/rs6000.md (mov<mode>_internal, QHI iterator): Add
	'x' to stxsi<wd>x print pattern, so that QImode and HImode values
	residing in traditional altivec registers can be stored
	correctly.

From-SVN: r242983

2016-11-29  Max Filippov  <jcmvbkbc@gmail.com>
gcc/
	* config/xtensa/xtensa.c (hwloop_optimize): Don't emit zero
	overhead loop start between a call and its CALL_ARG_LOCATION
	note.

From-SVN: r242979

gcc/testsuite/ChangeLog:

	avoid false positives on ILP32 targets.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: Same.

From-SVN: r242977

From-SVN: r242976

gcc/ChangeLog:

	PR tree-optimization/78512
	* config/linux.h (TARGET_PRINTF_POINTER_FORMAT): Remove.
	* config/rs6000/linux.h: Same.
	* config/rs6000/linux64.h: Same.
	* config/sol2.h: Same.
	* config/sol2.c (solaris_printf_pointer_format): Remove.
	* doc/tm.texi.in (TARGET_PRINTF_POINTER_FORMAT): Remove.
	* doc/tm.texi: Regenerate.
	* gimple-ssa-sprintf.c (format_pointer): Rempove.
	(pass_sprintf_length::compute_format_length): Return bool.
	(pass_sprintf_length::handle_gimple_call): Adjust.
	* target.def (printf_pointer_format): Remove.
	* targhooks.c (default_printf_pointer_format): Remove.
	(linux_printf_pointer_format): Same.
	* targhooks.h (default_printf_pointer_format): Remove.
	(linux_printf_pointer_format, solaris_printf_pointer_format): Same.

gcc/testsuite/ChangeLog:

	PR tree-optimization/78512
	* gcc.dg/tree-ssa/builtin-sprintf-6.c: Add test cases.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: Remove test cases.

From-SVN: r242975

	* config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md.
	(mshift): Ditto.
	(SWI1248_AVX512BWDQ): Ditto.
	(SWI1248_AVX512BW): Ditto.
	(k<any_logic:code><mode>): Ditto.
	(kandn<mode>): Ditto.
	(kxnor<mode>): Ditto.
	(knot<mode>): Ditto.
	(*k<any_lshift:code><mode>): Ditto.
	(kortestzhi, kortestchi): Ditto.
	(kunpckhi, kunpcksi, kunpckdi): Ditto.

testsuite/ChangeLog:

	* gcc.target/i386/avx512f-kmovw-1.c (avx512f_test):
	Force value through k register.

From-SVN: r242971

2016-11-29  Andrew Pinski  <apinski@cavium.com>

        * tree-vrp.c (simplify_stmt_using_ranges): Use boolean_type_node
        for the EQ_EXPR.

From-SVN: r242970

re PR target/71331 (target-tilegx: nested-function-4.c: r10 is conflict which is both in function frame and in parameter.)

	PR target/71331
	* config/tilegx/tilegx.c (tilegx_function_profiler): Save r10
	to stack before call mcount.
	(tilegx_can_use_return_insn_p): Clean up code.

From-SVN: r242969

PR libstdc++/68838
* testsuite/lib/libstdc++.exp (DEFAULT_CXXFLAGS): Add -Wl,-bmaxdata on AIX.
* testsuite/23_containers/vector/profile/vector.cc: Remove
dg-additional-options.

From-SVN: r242967

	* config/avr/avr-arch.h (avr_mcu_t): Add flash_size member.
	* config/avr/avr-devices.c(avr_mcu_types): Add flash size info.
	* config/avr/avr-mcu.def: Likewise.
	* config/avr/gen-avr-mmcu-specs.c (print_mcu): Remove hard-coded prefix
	check to find wrap-around value, instead use MCU flash size. For 8k flash
	devices, update link_pmem_wrap spec string to add --pmem-wrap-around=8k.
	* config/avr/specs.h: Remove link_pmem_wrap from LINK_RELAX_SPEC and
	add to linker specs (LINK_SPEC) directly.

From-SVN: r242966

gcc/cp/ChangeLog:
	PR c++/77922
	* name-lookup.c (lookup_name_fuzzy): Filter out reserved words
	that were filtered out by init_reswords.

gcc/ChangeLog:
	PR c++/72774
	PR c++/72786
	PR c++/77922
	PR c++/78313
	* spellcheck.c (selftest::test_find_closest_string): Verify that
	we don't offer the goal string as a suggestion.
	* spellcheck.h (best_match::get_best_meaningful_candidate): Don't
	offer the goal string as a suggestion.

gcc/testsuite/ChangeLog:
	PR c++/72774
	PR c++/72786
	PR c++/77922
	PR c++/78313
	* g++.dg/spellcheck-c++-11-keyword.C: New test case.
	* g++.dg/spellcheck-macro-ordering.C: New test case.
	* g++.dg/spellcheck-pr78313.C: New test case.

From-SVN: r242965

From-SVN: r242963

	* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
	(AARCH64_ONLY, CHECK_CRYPTO): New macros.
	(Poly64x1_t, Poly64x2_t): Added types.
	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
	(vmov_n_p64, vmovq_n_p64): Added.
	(vld2_lane_p64, vld2q_lane_p64): Likewise.
	(vld3_lane_p64, vld3q_lane_p64): Likewise.
	(vld4_lane_p64, vld4q_lane_p64): Likewise.
	(vst2_lane_p64, vst2q_lane_p64): Likewise.
	(vst3_lane_p64, vst3q_lane_p64): Likewise.
	(vst4_lane_p64, vst4q_lane_p64): Likewise.
	(vget_lane_p64, vgetq_lane_p64): Likewise.
	(vget_high_p64): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c:
	Added AArch64 flags.
	(vreint_vector, vreint_vector_res): Moved to header.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c:
	Added Aarch64 flags.
	(vreint_vector, vreint_vector_res): Moved to header.

From-SVN: r242962