gcc/

	* gcc/config/arm/arm-builtins.c	(arm_type_qualifiers): New.
	(neon_itype): Add new types corresponding to the types used in
	qualifiers names.
	(arm_unop_qualifiers): New.
	(arm_bswap_qualifiers): Likewise.
	(arm_binop_qualifiers): Likewise.
	(arm_ternop_qualifiers): Likewise.
	(arm_getlane_qualifiers): Likewise.
	(arm_lanemac_qualifiers): Likewise.
	(arm_setlane_qualifiers): Likewise.
	(arm_combine_qualifiers): Likewise.
	(arm_load1_qualifiers): Likewise.
	(arm_load1_lane_qualifiers): Likewise.
	(arm_store1_qualifiers): Likewise.
	(arm_storestruct_lane_qualifiers): Likewise.
	(UNOP_QUALIFIERS): Likewise.
	(DUP_QUALIFIERS): Likewise.
	(SPLIT_QUALIFIERS): Likewise.
	(CONVERT_QUALIFIERS): Likewise.
	(FLOAT_WIDEN_QUALIFIERS): Likewise.
	(FLOAT_NARROW_QUALIFIERS): Likewise.
	(RINT_QUALIFIERS): Likewise.
	(COPYSIGNF_QUALIFIERS): Likewise.
	(CREATE_QUALIFIERS): Likewise.
	(REINTERP_QUALIFIERS): Likewise.
	(BSWAP_QUALIFIERS): Likewise.
	(BINOP_QUALIFIERS): Likewise.
	(FIXCONV_QUALIFIERS): Likewise.
	(SCALARMUL_QUALIFIERS): Likewise.
	(SCALARMULL_QUALIFIERS): Likewise.
	(SCALARMULH_QUALIFIERS): Likewise.
	(TERNOP_QUALIFIERS): Likewise.
	(SELECT_QUALIFIERS): Likewise.
	(VTBX_QUALIFIERS): Likewise.
	(GETLANE_QUALIFIERS): Likewise.
	(SHIFTIMM_QUALIFIERS): Likewise.
	(LANEMAC_QUALIFIERS): Likewise.
	(SCALARMAC_QUALIFIERS): Likewise.
	(SETLANE_QUALIFIERS): Likewise.
	(SHIFTINSERT_QUALIFIERS): Likewise.
	(SHIFTACC_QUALIFIERS): Likewise.
	(LANEMUL_QUALIFIERS): Likewise.
	(LANEMULL_QUALIFIERS): Likewise.
	(LANEMULH_QUALIFIERS): Likewise.
	(COMBINE_QUALIFIERS): Likewise.
	(VTBL_QUALIFIERS): Likewise.
	(LOAD1_QUALIFIERS): Likewise.
	(LOADSTRUCT_QUALIFIERS): Likewise.
	(LOAD1LANE_QUALIFIERS): Likewise.
	(LOADSTRUCTLANE_QUALIFIERS): Likewise.
	(STORE1_QUALIFIERS): Likewise.
	(STORESTRUCT_QUALIFIERS): Likewise.
	(STORE1LANE_QUALIFIERS): Likewise.
	(STORESTRUCTLANE_QUALIFIERS): Likewise.
	(neon_builtin_datum): Keep track of qualifiers.
	(VAR1): Likewise.

From-SVN: r217697

gcc/

	* config/arm/arm-builtins.c (VAR1): Add a comma.
	(VAR2): Rewrite in terms of VAR1.
	(VAR3-10): Likewise.
	(arm_builtins): Remove leading comma before ARM_BUILTIN_MAX.
	* config/arm/arm_neon_builtins.def: Remove trailing commas.

From-SVN: r217696

gcc/

	* config.gcc (extra_objs): Add arm-builtins.o for arm*-*-*.
	(target_gtfiles): Add config/arm/arm-builtins.c for arm*-*-*.
	* config/arm/arm-builtins.c: New.
	* config/arm/t-arm (arm_builtins.o): New.
	* config/arm/arm-protos.h (arm_expand_builtin): New.
	(arm_builtin_decl): Likewise.
	(arm_init_builtins): Likewise.
	(arm_atomic_assign_expand_fenv): Likewise.
	* config/arm/arm.c (arm_atomic_assign_expand_fenv): Remove prototype.
	(arm_init_builtins): Likewise.
	(arm_init_iwmmxt_builtins): Likewise
	(safe_vector_operand): Likewise
	(arm_expand_binop_builtin): Likewise
	(arm_expand_unop_builtin): Likewise
	(arm_expand_builtin): Likewise
	(arm_builtin_decl): Likewise
	(insn_flags): Remove static.
	(tune_flags): Likewise.
	(enum arm_builtins): Move to config/arm/arm-builtins.c.
	(arm_init_neon_builtins): Likewise.
	(struct builtin_description): Likewise.
	(arm_init_iwmmxt_builtins): Likewise.
	(arm_init_fp16_builtins): Likewise.
	(arm_init_crc32_builtins): Likewise.
	(arm_init_builtins): Likewise.
	(arm_builtin_decl): Likewise.
	(safe_vector_operand): Likewise.
	(arm_expand_ternop_builtin): Likewise.
	(arm_expand_binop_builtin): Likewise.
	(arm_expand_unop_builtin): Likewise.
	(neon_dereference_pointer): Likewise.
	(arm_expand_neon_args): Likewise.
	(arm_expand_neon_builtin): Likewise.
	(neon_split_vcombine): Likewise.
	(arm_expand_builtin): Likewise.
	(arm_builtin_vectorized_function): Likewise.
	(arm_atomic_assign_expand_fenv): Likewise.

From-SVN: r217695

gcc/

	* config/arm/t-arm (arm.o): Include arm-protos.h in the recipe.
	* config/arm/arm.c (FL_CO_PROC): Move to arm-protos.h.
	(FL_ARCH3M): Likewise.
	(FL_MODE26): Likewise.
	(FL_MODE32): Likewise.
	(FL_ARCH4): Likewise.
	(FL_ARCH5): Likewise.
	(FL_THUMB): Likewise.
	(FL_LDSCHED): Likewise.
	(FL_STRONG): Likewise.
	(FL_ARCH5E): Likewise.
	(FL_XSCALE): Likewise.
	(FL_ARCH6): Likewise.
	(FL_VFPV2): Likewise.
	(FL_WBUF): Likewise.
	(FL_ARCH6K): Likewise.
	(FL_THUMB2): Likewise.
	(FL_NOTM): Likewise.
	(FL_THUMB_DIV): Likewise.
	(FL_VFPV3): Likewise.
	(FL_NEON): Likewise.
	(FL_ARCH7EM): Likewise.
	(FL_ARCH7): Likewise.
	(FL_ARM_DIV): Likewise.
	(FL_ARCH8): Likewise.
	(FL_CRC32): Likewise.
	(FL_SMALLMUL): Likewise.
	(FL_IWMMXT): Likewise.
	(FL_IWMMXT2): Likewise.
	(FL_TUNE): Likewise.
	(FL_FOR_ARCH2): Likewise.
	(FL_FOR_ARCH3): Likewise.
	(FL_FOR_ARCH3M): Likewise.
	(FL_FOR_ARCH4): Likewise.
	(FL_FOR_ARCH4T): Likewise.
	(FL_FOR_ARCH5): Likewise.
	(FL_FOR_ARCH5T): Likewise.
	(FL_FOR_ARCH5E): Likewise.
	(FL_FOR_ARCH5TE): Likewise.
	(FL_FOR_ARCH5TEJ): Likewise.
	(FL_FOR_ARCH6): Likewise.
	(FL_FOR_ARCH6J): Likewise.
	(FL_FOR_ARCH6K): Likewise.
	(FL_FOR_ARCH6Z): Likewise.
	(FL_FOR_ARCH6ZK): Likewise.
	(FL_FOR_ARCH6T2): Likewise.
	(FL_FOR_ARCH6M): Likewise.
	(FL_FOR_ARCH7): Likewise.
	(FL_FOR_ARCH7A): Likewise.
	(FL_FOR_ARCH7VE): Likewise.
	(FL_FOR_ARCH7R): Likewise.
	(FL_FOR_ARCH7M): Likewise.
	(FL_FOR_ARCH7EM): Likewise.
	(FL_FOR_ARCH8A): Likewise.
	* config/arm/arm-protos.h: Take definitions moved from arm.c.

From-SVN: r217694

gcc/testsuite/

	* gcc.target/arm/pr51968.c (foo): Do not try to pass "Magic Word".

gcc/

	* config/arm/arm.c (arm_expand_neon_builtin): Remove "Magic Word"
	parameter, rearrange switch statement accordingly.
	(arm_evpc_neon_vrev): Remove "Magic Word".
	* config/arm/unspecs.md (unspec): Split many UNSPECs to
	rounding, or signed/unsigned variants.
	* config/arm/neon.md: Remove "Magic Word" code.
	* config/arm/iterators.md (VPF): New.
	(VADDL): Likewise.
	(VADDW): Likewise.
	(VHADD): Likewise.
	(VQADD): Likewise.
	(VADDHN): Likewise.
	(VMLAL): Likewise.
	(VMLAL_LANE): Likewise.
	(VLMSL): Likewise.
	(VMLSL_LANE): Likewise.
	(VQDMULH): Likewise,
	(VQDMULH_LANE): Likewise.
	(VMULL): Likewise.
	(VMULL_LANE): Likewise.
	(VSUBL): Likewise.
	(VSUBW): Likewise.
	(VHSUB): Likewise.
	(VQSUB): Likewise.
	(VSUBHN): Likewise.
	(VABD): Likewise.
	(VABDL): Likewise.
	(VMAXMIN): Likewise.
	(VMAXMINF): Likewise.
	(VPADDL): Likewise.
	(VPADAL): Likewise.
	(VPMAXMIN): Likewise.
	(VPMAXMINF): Likewise.
	(VCVT_US): Likewise.
	(VCVT_US_N): Likewise.
	(VQMOVN): Likewise.
	(VMOVL): Likewise.
	(VSHL): Likewise.
	(VQSHL): Likewise.
	(VSHR_N): Likewise.
	(VSHRN_N): Likewise.
	(VQSHRN_N): Likewise.
	(VQSHRUN_N): Likewise.
	(VQSHL_N): Likewise.
	(VSHLL_N): Likewise.
	(VSRA_N): Likewise.
	(pf): Likewise.
	(sup): Likewise.
	(r): Liekwise.
	(maxmin): Likewise.
	(shift_op): Likewise.
	* config/arm/arm_neon_builtins.def: Split many patterns.
	* config/arm/arm_neon.h (vaddl_s8): Remove "Magic Word" code.

From-SVN: r217693

	* config/arm/arm.c (arm_new_rtx_costs, case PLUS, MINUS):
	Add cost of alu.arith in simple SImode case.

From-SVN: r217692

  gcc/
    * lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
    registers.

From-SVN: r217691

gcc

2014-11-18  Marat Zakirov  <m.zakirov@samsung.com>

	* opts.c (finish_options): Disable aggressive opts for sanitizer.  
	(common_handle_option): Move code to finish_options.  

gcc/testsuite

2014-11-18  Marat Zakirov  <m.zakirov@samsung.com>

	* c-c++-common/asan/aggressive-opts.c: New test.

From-SVN: r217690

re PR sanitizer/63802 (UBSan doesn't catch misaligned access if address is 16-bytes (or more) aligned)

2014-11-18  Yury Gribov  <y.gribov@samsung.com>

	PR sanitizer/63802

gcc/
	* stor-layout.c (min_align_of_type): Respect user alignment
	more.

gcc/testsuite/
	* c-c++-common/ubsan/pr63802.c: New test.

From-SVN: r217689

gcc/

	* passes.c (remove_cgraph_node_from_order): New.
	(do_per_function_toporder): Register cgraph removal
	hook.

gcc/testsuite/

	* g++.dg/pr63766.C: New.

From-SVN: r217688

2014-11-17  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
	* config/arm/arm.md (generic_sched): Exclude cortex-m7.
	(generic_vfp): Likewise.
	* config/arm/cortex-m7.md: Pipeline description for cortex-m7.

From-SVN: r217687

From-SVN: r217686

2014-11-17  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/63906
	* lra-remat.c (operand_to_remat): Check SP and
	frame_pointer_required.

From-SVN: r217683

From-SVN: r217682

2014-11-17  Andrew Pinski  <apinski@cavium.com>

	* config/aarch64/thunderx.md: Remove copyright which should not
	have been there.

From-SVN: r217680

rs6000.c (RELOAD_REG_AND_M16): Add support for Altivec style vector loads that ignore the bottom 3 bits of the...

[gcc]
2014-11-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (RELOAD_REG_AND_M16): Add support for
	Altivec style vector loads that ignore the bottom 3 bits of the
	address.
	(rs6000_debug_addr_mask): New function to print the addr_mask
	values if debugging.
	(rs6000_debug_print_mode): Call rs6000_debug_addr_mask to print
	out addr_mask.
	(rs6000_setup_reg_addr_masks): Add support for Altivec style
	vector loads that ignore the bottom 3 bits of the address.  Allow
	pre-increment and pre-decrement on floating point, even if the
	-mupper-regs-{sf,df} options were used.
	(rs6000_init_hard_regno_mode_ok): Rework DFmode support if
	-mupper-regs-df.  Add support for -mupper-regs-sf.  Rearrange code
	placement for direct move support.
	(rs6000_option_override_internal): Add checks for -mupper-regs-df
	requiring -mvsx, and -mupper-regs-sf requiring -mpower8-vector.
	If -mupper-regs, set both -mupper-regs-sf and -mupper-regs-df,
	depending on the underlying cpu.
	(rs6000_secondary_reload_fail): Add ATTRIBUTE_NORETURN.
	(rs6000_secondary_reload_toc_costs): Helper function to identify
	costs of a TOC load for secondary reload support.
	(rs6000_secondary_reload_memory): Helper function for secondary
	reload, to determine if a particular memory operation is directly
	handled by the hardware, or if it needs support from secondary
	reload to create a valid address.
	(rs6000_secondary_reload): Rework code, to be clearer.  If the
	appropriate -mupper-regs-{sf,df} is used, use FPR registers to
	reload scalar values, since the FPR registers have D-form
	addressing. Move most of the code handling memory to the function
	rs6000_secondary_reload_memory, and use the reg_addr structure to
	determine what type of address modes are supported.  Print more
	debug information if -mdebug=addr.
	(rs6000_secondary_reload_inner): Rework entire function to be more
	general.  Use the reg_addr bits to determine what type of
	addressing is supported.
	(rs6000_preferred_reload_class): Rework.  Move constant handling
	into a single place.  Prefer using FLOAT_REGS for scalar floating
	point.
	(rs6000_secondary_reload_class): Use a FPR register to move a
	value from an Altivec register to a GPR, and vice versa.  Move VSX
	handling above traditional floating point.

	* config/rs6000/rs6000.md (mov<mode>_hardfloat, FMOVE32 case):
	Delete some spaces in the constraints.
	(DF->DF move peephole2): Disable if -mupper-regs-{sf,df} to
	allow using FPR registers to load/store an Altivec register for
	scalar floating point types.
	(SF->SF move peephole2): Likewise.
	(DFmode splitter): Add a define_split to move floating point
	constants to the constant pool before register allocation.
	Normally constants are put into the pool immediately, but
	-ffast-math delays putting them into the constant pool for the
	reciprocal approximation support.
	(SFmode splitter): Likewise.

	* config/rs6000/rs6000.opt (-mupper-regs-df): Make option public.
	(-mupper-regs-sf): Likewise.

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__UPPER_REGS_DF__ if -mupper-regs-df.  Define __UPPER_REGS_SF__ if
	-mupper-regs-sf.
	(-mupper-regs): New combination option that sets -mupper-regs-sf
	and -mupper-regs-df by default if the cpu supports the instructions.

	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
	-mupper-regs, -mupper-regs-sf, and -mupper-regs-df.

	* config/rs6000/predicates.md (memory_fp_constant): New predicate
	to return true if the operand is a floating point constant that
	must be put into the constant pool, before register allocation
	occurs.

	* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Enable
	-mupper-regs-df by default.
	(ISA_2_7_MASKS_SERVER): Enable -mupper-regs-sf by default.
	(POWERPC_MASKS): Add -mupper-regs-{sf,df} as options set by the
	various -mcpu=... options.
	(power7 cpu): Enable -mupper-regs-df by default.

	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
	-mupper-regs.

[gcc/testsuite]
2014-11-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-ldst.c: Rewrite to use 40 live
	floating point variables instead of using asm to test allocating
	values to the Altivec registers.

	* gcc.target/powerpc/upper-regs-sf.c: New -mupper-regs-sf and
	-mupper-regs-df tests.
	* gcc.target/powerpc/upper-regs-df.c: Likewise.

	* config/rs6000/predicates.md (memory_fp_constant): New predicate


Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>

From-SVN: r217679

	PR bootstrap/63888
	* bootstrap-asan.mk (ASAN_OPTIONS): Export "detect_leaks=0".

From-SVN: r217678

	PR c++/33911
gcc/cp/
	* call.c (build_call_a): Don't warn_deprecated_use here.
	(build_over_call): Or here.
	* decl2.c (mark_used): Do it here.
	(is_late_template_attribute): Attribute deprecated is not deferred.
	(cplus_decl_attributes): Propagate TREE_DEPRECATED out to the template.
	* parser.c (cp_parser_template_name): Warn about deprecated template.
	(cp_parser_template_argument): Likewise.
libstdc++-v3/
	* include/backward/binders.h: Suppress -Wdeprecated-declarations.
	* include/ext/array_allocator.h: Likewise.

From-SVN: r217677

ira-conflicts.c (build_conflict_bit_table): Add the current object to OBJECTS_LIVE after traversing OBJECTS_LIVE.

       * ira-conflicts.c (build_conflict_bit_table): Add the current
        object to OBJECTS_LIVE after traversing OBJECTS_LIVE.

From-SVN: r217676

	* ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation.
	(ipa_get_indirect_edge_target): Add SPECULATIVE argument.
	(devirtualization_time_bonus): Use it.
	(ipcp_discover_new_direct_edges): Likewise.
	* ipa-inline-analysis.c (estimate_edge_devirt_benefit): Update.
	* ipa-prop.h (ipa_get_indirect_edge_target): Update prototype.

From-SVN: r217675

2014-11-17  Tom de Vries  <tom@codesourcery.com>

	* gcc.dg/pr43864-2.c: Add -ftree-tail-merge to dg-options.
	* gcc.dg/pr43864-3.c: Same.
	* gcc.dg/pr43864-4.c: Same.
	* gcc.dg/pr43864.c: Same.
	* gcc.dg/pr50763.c: Same.
	* gcc.dg/pr51879-12.c: Same.
	* gcc.dg/pr51879-16.c: Same.
	* gcc.dg/pr51879-17.c: Same.
	* gcc.dg/pr51879-18.c: Same.
	* gcc.dg/pr51879-2.c: Same.
	* gcc.dg/pr51879-3.c: Same.
	* gcc.dg/pr51879-4.c: Same.
	* gcc.dg/pr51879-6.c: Same.
	* gcc.dg/pr51879-7.c: Same.
	* gcc.dg/pr51879.c: Same.

From-SVN: r217674

2014-11-17  Tom de Vries  <tom@codesourcery.com>

	* gcc.dg/pr43864-2.c: Fix scan-tree-dump-times scan pattern.
	* gcc.dg/pr43864-3.c: Same.
	* gcc.dg/pr43864-4.c: Same.

From-SVN: r217673

	PR c++/50473
	* decl.c (cp_finish_decl): Don't try to process a non-dependent
	constant initializer for a reference.
	* pt.c (value_dependent_expression_p): A reference is always
	dependent.
	* call.c (extend_ref_init_temps_1): Also clear TREE_SIDE_EFFECTS
	on any NOP_EXPRs.

From-SVN: r217672

tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION to optimization_default_node.

	* tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION
	to optimization_default_node.

From-SVN: r217671

	* constexpr.c (cxx_eval_loop_expr, cxx_eval_switch_expr): New.
	(cxx_eval_statement_list): New.
	(cxx_eval_constant_expression): Handle LABEL_EXPR,
	CASE_LABEL_EXPR, GOTO_EXPR, LOOP_EXPR, SWITCH_EXPR.  Handle jump
	semantics of RETURN_EXPR.
	(many functions): Add jump_target parameter.
	(returns, breaks, continues, switches, label_matches): New.
	* cp-tree.h (LABEL_DECL_BREAK, LABEL_DECL_CONTINUE): New.
	* cp-gimplify.c (begin_bc_block): Set them.

From-SVN: r217670

	* cp-gimplify.c (genericize_cp_loop): Use LOOP_EXPR.
	(genericize_for_stmt): Handle null statement-list.

From-SVN: r217669

	* cgraphunit.c (analyze_functions): Use opt_for_fn.
	* cgraph.h (cgraph_node::optimize_for_size_p): Likewise.

From-SVN: r217668

	* cgraph.c (symbol_table::create_edge): Use opt_for_fn.
	(cgraph_node::cannot_return_p): Likewise.
	(cgraph_edge::cannot_lead_to_return_p): Likewise.
	(cgraph_edge::maybe_hot_p): Likewise.

From-SVN: r217667

	* predict.c (maybe_hot_frequency_p): Use opt_for_fn.
	(optimize_function_for_size_p): Likewise.
	(probably_never_executed): Likewise; replace cfun by fun.

From-SVN: r217666

gcc/:
 
	* config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Add
	variant reading from memory and assembling to ld1.

	* config/aarch64/arm_neon.h (vld1_lane_f32, vld1_lane_f64, vld1_lane_p8,
	vld1_lane_p16, vld1_lane_s8, vld1_lane_s16, vld1_lane_s32,
	vld1_lane_s64, vld1_lane_u8, vld1_lane_u16, vld1_lane_u32,
	vld1_lane_u64, vld1q_lane_f32, vld1q_lane_f64, vld1q_lane_p8,
	vld1q_lane_p16, vld1q_lane_s8, vld1q_lane_s16, vld1q_lane_s32,
	vld1q_lane_s64, vld1q_lane_u8, vld1q_lane_u16, vld1q_lane_u32,
	vld1q_lane_u64): Replace asm with vset_lane and pointer dereference.

gcc/testsuite/:
 
	* gcc.target/aarch64/vld1_lane.c: New test.

From-SVN: r217665

From-SVN: r217664

	C++14 constexpr support (minus loops and multiple returns)
gcc/
	* tree-inline.c (copy_fn): New.
	* tree-inline.h: Declare it.
gcc/cp/
	* constexpr.c (use_new_call): New macro.
	(build_data_member_initialization): Ignore non-mem-inits.
	(check_constexpr_bind_expr_vars): Remove C++14 checks.
	(constexpr_fn_retval): Likewise.
	(check_constexpr_ctor_body): Do nothing in C++14.
	(massage_constexpr_body): In C++14 only collect mem-inits.
	(get_function_named_in_call): Handle null CALL_EXPR_FN.
	(cxx_bind_parameters_in_call): Build bindings in same order as
	parameters.  Don't treat iniviref parms specially in new call mode.
	(cxx_eval_call_expression): If use_new_call, do constexpr expansion
	based on DECL_SAVED_TREE rather than the massaged constexpr body.
	Set up ctx->object from AGGR_INIT_EXPR_SLOT if we don't have one.
	(is_sub_constant_expr): Don't mess with ctx.ctor here.
	(cxx_eval_component_reference): A null element means we're mid-
	initialization.
	(cxx_eval_store_expression, cxx_eval_increment_expression): New.
	(cxx_eval_constant_expression): Handle RESULT_DECL, DECL_EXPR,
	MODIFY_EXPR, STATEMENT_LIST, BIND_EXPR, USING_STMT,
	PREINCREMENT_EXPR, POSTINCREMENT_EXPR, PREDECREMENT_EXPR,
	POSTDECREMENT_EXPR.  Don't look into DECL_INITIAL of variables in
	constexpr functions.  In new-call mode find parms in the values table.
	(potential_constant_expression_1): Handle null CALL_EXPR_FN.
	Handle STATEMENT_LIST, MODIFY_EXPR, MODOP_EXPR, IF_STMT,
	PREINCREMENT_EXPR, POSTINCREMENT_EXPR, PREDECREMENT_EXPR,
	POSTDECREMENT_EXPR, BIND_EXPR, WITH_CLEANUP_EXPR,
	CLEANUP_POINT_EXPR, MUST_NOT_THROW_EXPR, TRY_CATCH_EXPR,
	EH_SPEC_BLOCK, EXPR_STMT, DECL_EXPR, CASE_LABEL_EXPR, BREAK_STMT,
	CONTINUE_STMT, USING_STMT, IF_STMT, DO_STMT, FOR_STMT, WHILE_STMT,
	SWITCH_STMT, ASM_EXPR.
	(cxx_eval_vec_init_1): Call build_aggr_init_expr.
	(cxx_eval_indirect_ref): Don't return a CONSTRUCTOR when the
	caller wants an lvalue.
	(cxx_eval_outermost_constant_expr): Pull object out of AGGR_INIT_EXPR.
	(maybe_constant_init): Look through INIT_EXPR.
	(ensure_literal_type_for_constexpr_object): Set
	cp_function_chain->invalid_constexpr.
	* cp-tree.h (struct language_function): Add invalid_constexpr bitfield.
	* decl.c (start_decl): Set cp_function_chain->invalid_constexpr.
	(check_for_uninitialized_const_var): Likewise.
	(maybe_save_function_definition): Check it.
	* parser.c (cp_parser_jump_statement): Set
	cp_function_chain->invalid_constexpr.
	(cp_parser_asm_definition): Likewise.

From-SVN: r217663

gcc/:

	* config/aarch64/aarch64-builtins.c (TYPES_CREATE): Remove.
	* config/aarch64/aarch64-simd-builtins.def (create): Remove.
	* config/aarch64/aarch64-simd.md (aarch64_create<mode>): Remove.
	* config/aarch64/arm_neon.h (vcreate_f64, vreinterpret_f64_s64,
	vreinterpret_f64_u64): Replace __builtin_aarch64_createv1df with C casts.
	* config/aarch64/iterators.md (VD1): Remove.

gcc/testsuite/:

	* gcc.target/aarch64/simd/vfma_f64.c: Add asm volatile memory.
	* gcc.target/aarch64/simd/vfms_f64.c: Likewise.

From-SVN: r217662

	* config/aarch64/aarch64-cores.def (cortex-a53): Remove
	AARCH64_FL_CRYPTO from feature flags.
	(cortex-a57): Likewise.
	(cortex-a57.cortex-a53): Likewise.

From-SVN: r217661

	PR c++/52282
	* decl.c (build_ptrmemfunc_type): Don't build a different
	RECORD_TYPE for a qualified PMF.
	* cp-tree.h (TYPE_PTRMEMFUNC_FN_TYPE): Merge cv-quals.
	(TYPE_PTRMEMFUNC_FN_TYPE_RAW): New.
	* decl2.c (cplus_decl_attributes): Use TYPE_PTRMEMFUNC_FN_TYPE_RAW.
	* tree.c (cp_walk_subtrees): Likewise.
	(cp_build_qualified_type_real): Remove special PMF handling.

From-SVN: r217660

	* tree.c (free_lang_data_in_decl): Annotate all functio nbodies with
	DECL_FUNCTION_SPECIFIC_TARGET.
	* i386.c (ix86_set_current_function): Handle explicit default options.

	* lto.c (lto_read_decls): Do not rebuild DECL_FUNCTION_SPECIFIC_TARGET.

From-SVN: r217659

	* builtins.c (expand_builtin_memcpy_with_bounds): Use target hook
	instead of BNDmode.
	(expand_builtin_mempcpy_with_bounds): Likewise.
	(expand_builtin_memset_with_bounds): Likewise.

From-SVN: r217658

gcc/

	* tree-ssa-strlen.c: include ipa-chkp.h, cgraph.h,
	ipa-ref.h, plugin-api.h.
	(get_string_length): Handle calls with bounds.
	(adjust_last_stmt): Likewise.
	(handle_builtin_strchr): Likewise.
	(handle_builtin_strcpy): Likewise.
	(handle_builtin_memcpy): Likewise.
	(handle_builtin_strcat): Likewise.

gcc/testsuite/

	* gcc.target/i386/chkp-strlen-1.c: New.
	* gcc.target/i386/chkp-strlen-2.c: New.
	* gcc.target/i386/chkp-strlen-3.c: New.
	* gcc.target/i386/chkp-strlen-4.c: New.
	* gcc.target/i386/chkp-strlen-5.c: New.

From-SVN: r217657

gcc/

	* tree-chkp-opt.c (chkp_get_nobnd_fndecl): New.
	(chkp_get_nochk_fndecl): New.
	(chkp_optimize_string_function_calls): New.
	(chkp_opt_execute): Call chkp_optimize_string_function_calls.
	* tree-cfg.h (insert_cond_bb): New.
	* tree-cfg.c (insert_cond_bb): New.

gcc/testsuite/

	* gcc.target/i386/chkp-stropt-1.c: New.
	* gcc.target/i386/chkp-stropt-2.c: New.
	* gcc.target/i386/chkp-stropt-3.c: New.
	* gcc.target/i386/chkp-stropt-4.c: New.
	* gcc.target/i386/chkp-stropt-5.c: New.
	* gcc.target/i386/chkp-stropt-6.c: New.
	* gcc.target/i386/chkp-stropt-7.c: New.
	* gcc.target/i386/chkp-stropt-8.c: New.
	* gcc.target/i386/chkp-stropt-9.c: New.
	* gcc.target/i386/chkp-stropt-10.c: New.
	* gcc.target/i386/chkp-stropt-11.c: New.
	* gcc.target/i386/chkp-stropt-12.c: New.
	* gcc.target/i386/chkp-stropt-13.c: New.
	* gcc.target/i386/chkp-stropt-14.c: New.
	* gcc.target/i386/chkp-stropt-15.c: New.
	* gcc.target/i386/chkp-stropt-16.c: New.

From-SVN: r217656

tree-core.h (built_in_class): Add builtin codes to be used by Pointer Bounds Checker for instrumented builtin...

	* tree-core.h (built_in_class): Add builtin codes to be used
	by Pointer Bounds Checker for instrumented builtin functions.
	* tree-streamer-in.c: Include ipa-chkp.h.
	(streamer_get_builtin_tree): Created instrumented decl if
	required.
	* ipa-chkp.h (chkp_maybe_clone_builtin_fndecl): New.
	* ipa-chkp.c (chkp_build_instrumented_fndecl): Support builtin
	function decls.
	(chkp_maybe_clone_builtin_fndecl): New.
	(chkp_maybe_create_clone): Support builtin function decls.
	(chkp_versioning): Clone builtin functions.
	* tree-chkp.c (chkp_instrument_normal_builtin): New.
	(chkp_add_bounds_to_call_stmt): Support builtin functions.
	(chkp_replace_function_pointer): Likewise.
	* builtins.c (expand_builtin_memcpy_args): New.
	(expand_builtin_memcpy): Call expand_builtin_memcpy_args.
	(expand_builtin_memcpy_with_bounds): New.
	(expand_builtin_mempcpy_with_bounds): New.
	(expand_builtin_mempcpy_args): Add orig_exp arg. Support
	BUILT_IN_CHKP_MEMCPY_NOBND_NOCHK
	(expand_builtin_memset_with_bounds): New.
	(expand_builtin_memset_args): Support BUILT_IN_CHKP_MEMSET_NOBND_NOCHK.
	(expand_builtin_with_bounds): New.
	* builtins.h (expand_builtin_with_bounds): New.
	* expr.c (expand_expr_real_1): Support instrumented builtin calls.

From-SVN: r217655