re PR c++/86836 (internal compiler error on structured bindings with shadow parameter on templated function)

	PR c++/86836
	* pt.c (tsubst_expr): For structured bindings, call tsubst_decomp_names
	before tsubst_init, not after it.

	* g++.dg/cpp1z/decomp46.C: New test.

From-SVN: r263391

	PR c++/86738
	* constexpr.c (cxx_eval_binary_expression): For arithmetics involving
	NULL pointer set *non_constant_p to true.
	(cxx_eval_component_reference): For dereferencing of a NULL pointer,
	set *non_constant_p to true and return t.

	* g++.dg/opt/pr86738.C: New test.

From-SVN: r263390

The adjusted vector costs give Falkor a reasonable boost in performance for FP
benchmarks (both CPU2017 and CPU2006) and doesn't change INT benchmarks that
much. There are some regressions that will be investigated as follow on work.

Numbers from the CI run:

CPU2017:

(R) 605.mcf_s: -1.8%
(R) 620.omnetpp_s: -2%
    623.xalancbmk_s: 2%
    654.roms_s: 7%

(R) INT mean: -0.09%
    FP mean: 0.70%

CPU2006:

(R) 429.mc: -5%
(R) 471.omnetpp: -9.5% (potentially noise/fluctuations)
    483.xalancbmk: 6.02%
    410.bwaves: 5.03%
    433.milc: 2%
    434.zeusmp: 10.5%
(R) 436.cactusADM: -12.75%
    437.leslie3d: 5.94%
(R) 453.povray: -0.82%
    459.GemsFDTD: 16.87%
    465.tonto: 1%

(R) INT mean: -0.79%
    FP mean: 1.54%

gcc/ChangeLog:

2018-08-08  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64.c (qdf24xx_vector_cost): New static global.
	(qdf24xx_tunings): Set vector cost structure to qdf24xx_vector_cost.

From-SVN: r263389

Adjust Falkor's register_sextend cost from 4 to 3.  This fixes a testsuite
failure in gcc.target/aarch64/extend.c:ldr_sxtw where GCC was generating
a sbfiz instruction rather than a load with sign extension.

No performance changes.

gcc/ChangeLog:

2018-08-08  Luis Machado  <luis.machado@linaro.org>

	* config/aarch64/aarch64.c (qdf24xx_addrcost_table)
	<register_sextend>: Set to 3.

From-SVN: r263388

From-SVN: r263387

	gcc/fortran/
	* trans-stmt.h: Remove stale reference to trans-openacc.c.

From-SVN: r263372

https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00434.html
	* line-map.c: (linemap_init): Set default allocator here.
	(new_linemap): Rather than here.  Refactor allocation logic.

From-SVN: r263366

	PR libstdc++/86874
	* include/std/variant (_Copy_ctor_base::_M_destructive_move): Define
	here instead of in _Move_assign_base.
	(_Copy_ctor_base<true, _Types...>::_M_destructive_move): Define.
	(_Copy_assign_base::operator=): Use _M_destructive_move when changing
	the contained value to another alternative.
	(_Move_assign_base::operator=): Likewise.
	(_Move_assign_base::_M_destructive_move): Remove.
	* testsuite/20_util/variant/86874.cc: New test.

From-SVN: r263365

    
    Updates golang/go#26634
    
    Reviewed-on: https://go-review.googlesource.com/126857

From-SVN: r263364

    
    Fix up the testing package to insure that execution traces
    work properly (e.g. "-test.trace=<XXX>" command line option). The
    call to stop tracing and emit the output file was stubbed out.
    
    Reviewed-on: https://go-review.googlesource.com/128275

From-SVN: r263363

The "@" handling broke -mlow-precision-div, because the scalar forms of
the instruction were provided by a pattern that also provided FRECPX
(and so were parameterised on an unspec code as well as a mode),
while the SIMD versions had a dedicated FRECPE pattern.  This patch
moves the scalar FRECPE handling to the SIMD pattern too (as for FRECPS)
and uses a separate pattern for FRECPX.

The convention in aarch64-simd-builtins.def seemed to be to add
comments only if the mapping wasn't obvious (i.e. not just sticking
"aarch64_" on the beginning and "<mode>" on the end), so the patch
deletes the reference to the combined pattern instead of rewording it.

There didn't seem to be any coverage of -mlow-precision-div in the
testsuite, so the patch adds some tests for it.

2018-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/86838
	* config/aarch64/iterators.md (FRECP, frecp_suffix): Delete.
	* config/aarch64/aarch64-simd.md
	(aarch64_frecp<FRECP:frecp_suffix><mode>): Fold FRECPE into...
	(@aarch64_frecpe<mode>): ...here and the move FRECPX to...
	(aarch64_frecpx<mode>): ...this new pattern.
	* config/aarch64/aarch64-simd-builtins.def: Remove comment
	about aarch64_frecp<FRECP:frecp_suffix><mode>.

gcc/testsuite/
	PR target/86838
	* gcc.target/aarch64/frecpe_1.c: New test.
	* gcc.target/aarch64/frecpe_2.c: Likewise.

From-SVN: r263362

/cp
2018-08-07  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59480, DR 136
	* decl.c (check_no_redeclaration_friend_default_args): New.
	(duplicate_decls): Use the latter; also check that a friend
	declaration specifying default arguments is a definition.

/testsuite
2018-08-07  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59480, DR 136
	* g++.dg/other/friend8.C: New.
	* g++.dg/other/friend9.C: Likewise.
	* g++.dg/other/friend10.C: Likewise.
	* g++.dg/other/friend11.C: Likewise.
	* g++.dg/other/friend12.C: Likewise.
	* g++.dg/other/friend13.C: Likewise.
	* g++.dg/other/friend14.C: Likewise.
	* g++.dg/other/friend15.C: Likewise.
	* g++.dg/parse/defarg4.C: Compile with -fpermissive -w.
	* g++.dg/parse/defarg8.C: Likewise.

From-SVN: r263361

Solaris memalign requires alignment to be at least sizeof(int), so
increase it as needed.

Also move the check for valid alignments from the fallback
implementation of aligned_alloc into operator new, as it's required for
all of aligned_alloc, memalign, posix_memalign and __aligned_malloc.
This adds a branch to check for undefined behaviour which we could just
ignore, so the check could just be removed. It should certainly be
removed if PR 86878 is implemented to issue a warning about calls with
invalid alignments.

	PR libstdc++/86861
	* libsupc++/new_opa.cc [_GLIBCXX_HAVE_MEMALIGN] (aligned_alloc):
	Replace macro with inline function.
	[__sun]: Increase alignment to meet memalign precondition.
	[!HAVE__ALIGNED_MALLOC && !HAVE_POSIX_MEMALIGN && !HAVE_MEMALIGN]
	(aligned_alloc): Move check for valid alignment to operator new.
	Remove redundant check for non-zero size, it's enforced by the caller.
	(operator new): Move check for valid alignment here. Use
	__builtin_expect on check for zero size.

From-SVN: r263360

This just fixes the PR number in the ChangeLog.  Nothing we can do
about the SVN history.

From-SVN: r263358

PR c++/79133

gcc/cp/

PR c++/79133
* name-lookup.c (check_local_shadow): Reject captures and parameters
with the same name.

testsuite/

PR c++/79133
* g++.dg/cpp0x/lambda/lambda-shadow3.C: New.
* g++.dg/cpp1y/lambda-generic-variadic18.C: Likewise.

From-SVN: r263357

2018-08-07  Martin Liska  <mliska@suse.cz>

        PR middle-end/83023
	* predict.c (expr_expected_value_1): Handle DECL_IS_MALLOC,
        BUILT_IN_REALLOC and DECL_IS_OPERATOR_NEW.
	* predict.def (PRED_MALLOC_NONNULL): New predictor.
	* doc/extend.texi: Document that malloc attribute adds
        hit to compiler.
2018-08-07  Martin Liska  <mliska@suse.cz>

        PR middle-end/83023
	* gcc.dg/predict-16.c: New test.
	* g++.dg/predict-1.C: New test.

From-SVN: r263355

Move the allocation logic into libstdc++.so so that it can be changed
without worrying about inlined code in existing binaries.

Leave do_allocate inline so that calls to it can be devirtualized, and
only the slow path needs to call into the library.

	* config/abi/pre/gnu.ver: Export monotonic_buffer_resource members.
	* include/std/memory_resource (monotonic_buffer_resource::release):
	Call _M_release_buffers to free buffers.
	(monotonic_buffer_resource::do_allocate): Call _M_new_buffer to
	allocate a new buffer from upstream.
	(monotonic_buffer_resource::_M_new_buffer): Declare.
	(monotonic_buffer_resource::_M_release_buffers): Declare.
	(monotonic_buffer_resource::_Chunk): Replace definition with
	declaration as opaque type.
	* src/c++17/memory_resource.cc (monotonic_buffer_resource::_Chunk):
	Define.
	(monotonic_buffer_resource::_M_new_buffer): Define.
	(monotonic_buffer_resource::_M_release_buffers): Define.

From-SVN: r263354

2018-08-07  Steve Ellcey  <sellcey@cavium.com>
	    Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR tree-optimization/80925
	* gcc.dg/vect/no-section-anchors-vect-69.c: Expect 3 loops
	vectorized on !vect_hw_misalign targets.

Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

From-SVN: r263352

From-SVN: r263351

From-SVN: r263350

This patch adds handling of functions that may not be present in the cuda
driver.

Such a function can be declared using CUDA_ONE_CALL_MAYBE_NULL in cuda-lib.def,
it can be called with the usual convenience macros, but before calling its
presence needs to be tested using new macro CUDA_CALL_EXISTS.

When using the dlopen interface (PLUGIN_NVPTX_DYNAMIC == 1), we allow
non-present functions by allowing dlsym to return NULL.  Otherwise
(PLUGIN_NVPTX_DYNAMIC == 0) we declare the non-present function to be weak.

Build and reg-tested libgomp on x86_64 with nvidia accelerator, with and without
--disable-cuda-driver, in combination with a trigger patch that adds a
non-existing function foo to cuda-lib.def:
...
CUDA_ONE_CALL_MAYBE_NULL (foo)
...
and declares it in plugin-nvptx.c:
...
CUresult foo (void);
...
and then uses it in nvptx_init after the init_cuda_lib call:
...
  if (CUDA_CALL_EXISTS (foo))
    CUDA_CALL (foo);
...

Also build and reg-tested on x86_64 with nvidia accelerator, with and without
--disable-cuda-driver, in combination with a trigger patch that replaces all
CUDA_ONE_CALLs in cuda-lib.def with CUDA_ONE_CALL_MAYBE_NULL, and guards two
CUDA_CALLs with CUDA_CALL_EXISTS, one for a regular fn, and one for a fn that is
a define in cuda/cuda.h.

2018-08-07  Tom de Vries  <tdevries@suse.de>

	* plugin/plugin-nvptx.c (DO_PRAGMA): Define.
	(struct cuda_lib_s): Add def/undef of CUDA_ONE_CALL_MAYBE_NULL.
	(init_cuda_lib): Add new param to CUDA_ONE_CALL_1.  Add arg to
	corresponding call in CUDA_ONE_CALL.  Add def/undef of
	CUDA_ONE_CALL_MAYBE_NULL.
	(CUDA_CALL_EXISTS): Define.

From-SVN: r263346

This patch makes sure that the lifetimes of the CUDA_ONE_CALL macro (which is
defined twice in plugin-nvptx.c) are minimized, to make it obvious that the
definitions are used only in the lib-cuda.def include.

Build on x86_64 with nvptx accelerator and reg-tested libgomp.

2018-08-07  Tom de Vries  <tdevries@suse.de>

	* plugin/plugin-nvptx.c (struct cuda_lib_s, init_cuda_lib): Put
	CUDA_ONE_CALL defines right before the cuda-lib.def include, and the
	corresponding undefs right after.

From-SVN: r263345

	PR target/86807
	* config/pa/pa.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
	Define to speculation_safe_value_not_needed.

From-SVN: r263344

tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Pass down the vr_values instance to cprop_into_stmt.

	* tree-ssa-dom.c (dom_opt_dom_walker::optimize_stmt): Pass down
	the vr_values instance to cprop_into_stmt.
	(cprop_into_stmt): Pass vr_values instance down to cprop_operand.
	(cprop_operand): Also query EVRP to determine if OP is a constant.

From-SVN: r263342

https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00416.html
	* diagnostic.c (diagnostic_report_current_module): Reroll
	included-at loop.  Translate text.

From-SVN: r263341

	PR c++/86767
	* constexpr.c (cxx_eval_statement_list): Handle continue.

	* g++.dg/cpp1y/constexpr-86767.C: New test.

From-SVN: r263340

"make selftest-valgrind" shows:

187 bytes in 1 blocks are definitely lost in loss record 567 of 669
    at 0x4A081D4: calloc (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
    by 0x1F08260: xcalloc (xmalloc.c:162)
    by 0xB24F32: init_emit() (emit-rtl.c:5843)
    by 0xC10080: prepare_function_start() (function.c:4803)
    by 0xC10254: init_function_start(tree_node*) (function.c:4877)
    by 0x1CDF92A: selftest::test_expansion_to_rtl() (function-tests.c:595)
    by 0x1CE007C: selftest::function_tests_c_tests() (function-tests.c:676)
    by 0x1E010E7: selftest::run_tests() (selftest-run-tests.c:98)
    by 0x1062D1E: toplev::run_self_tests() (toplev.c:2225)
    by 0x1062F40: toplev::main(int, char**) (toplev.c:2303)
    by 0x1E5B90A: main (main.c:39)

The allocation in question is:

  crtl->emit.regno_pointer_align
    = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);

This patch fixes this leak (and makes the output of
"make selftest-valgrind" clean) by calling free_after_compilation at the
end of the selftest in question.

gcc/ChangeLog:
	* function-tests.c (selftest::test_expansion_to_rtl): Call
	free_after_compilation.

From-SVN: r263339

	* g++.dg/torture/pr86763.C (dg-additional-options): Add -lrt
	for target *-*-linux-gnu.

From-SVN: r263338

gcc/
	* config/aarch64/aarch64.md: Add clobber highs to tls_desc.

gcc/testsuite/
	* gcc.target/aarch64/sve/tls_preserve_1.c: New test.
	* gcc.target/aarch64/sve/tls_preserve_2.c: New test.
	* gcc.target/aarch64/sve/tls_preserve_3.c: New test.

From-SVN: r263337

gcc/ChangeLog:

2018-08-06  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.c (s390_loop_unroll_adjust): Prevent small
	loops with memory block operations from getting unrolled.

gcc/testsuite/ChangeLog:

2018-08-06  Andreas Krebbel  <krebbel@linux.ibm.com>

	* gcc.target/s390/nomemloopunroll-1.c: New test.

From-SVN: r263336

The SPU processor is not affected by speculation, so this macro can
safely be defined as speculation_safe_value_not_needed.

gcc/ChangeLog:

	PR target/86807
	* config/spu/spu.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
	Define to speculation_safe_value_not_needed.

From-SVN: r263335

	* reload1.c (forget_old_reloads_1): Adjust CLOBBER_HIGH
	assert.

From-SVN: r263333

PR target/86662

        * gcc/tree.c (build_common_tree_nodes): Initialize integer_types array
        with all enabled __intN types.

        * gcc/testsuite/gcc.target/msp430/pr86662.c: New test.

From-SVN: r263332

gcc/
	* alias.c (record_set): Check for clobber high.
	* cfgexpand.c (expand_gimple_stmt): Likewise.
	* combine-stack-adj.c (single_set_for_csa): Likewise.
	* combine.c (find_single_use_1): Likewise.
	(set_nonzero_bits_and_sign_copies): Likewise.
	(get_combine_src_dest): Likewise.
	(is_parallel_of_n_reg_sets): Likewise.
	(try_combine): Likewise.
	(record_dead_and_set_regs_1): Likewise.
	(reg_dead_at_p_1): Likewise.
	(reg_dead_at_p): Likewise.
	* dce.c (deletable_insn_p): Likewise.
	(mark_nonreg_stores_1): Likewise.
	(mark_nonreg_stores_2): Likewise.
	* df-scan.c (df_find_hard_reg_defs): Likewise.
	(df_uses_record): Likewise.
	(df_get_call_refs): Likewise.
	* dwarf2out.c (mem_loc_descriptor): Likewise.
	* haifa-sched.c (haifa_classify_rtx): Likewise.
	* ira-build.c (create_insn_allocnos): Likewise.
	* ira-costs.c (scan_one_insn): Likewise.
	* ira.c (equiv_init_movable_p): Likewise.
	(rtx_moveable_p): Likewise.
	(interesting_dest_for_shprep): Likewise.
	* jump.c (mark_jump_label_1): Likewise.
	* postreload-gcse.c (record_opr_changes): Likewise.
	* postreload.c (reload_cse_simplify): Likewise.
	(struct reg_use): Add source expr.
	(reload_combine): Check for clobber high.
	(reload_combine_note_use): Likewise.
	(reload_cse_move2add): Likewise.
	(move2add_note_store): Likewise.
	* print-rtl.c (print_pattern): Likewise.
	* recog.c (decode_asm_operands): Likewise.
	(store_data_bypass_p): Likewise.
	(if_test_bypass_p): Likewise.
	* regcprop.c (kill_clobbered_value): Likewise.
	(kill_set_value): Likewise.
	* reginfo.c (reg_scan_mark_refs): Likewise.
	* reload1.c (maybe_fix_stack_asms): Likewise.
	(eliminate_regs_1): Likewise.
	(elimination_effects): Likewise.
	(mark_not_eliminable): Likewise.
	(scan_paradoxical_subregs): Likewise.
	(forget_old_reloads_1): Likewise.
	* reorg.c (find_end_label): Likewise.
	(try_merge_delay_insns): Likewise.
	(redundant_insn): Likewise.
	(own_thread_p): Likewise.
	(fill_simple_delay_slots): Likewise.
	(fill_slots_from_thread): Likewise.
	(dbr_schedule): Likewise.
	* resource.c (update_live_status): Likewise.
	(mark_referenced_resources): Likewise.
	(mark_set_resources): Likewise.
	* rtl.c (copy_rtx): Likewise.
	* rtlanal.c (reg_referenced_p): Likewise.
	(single_set_2): Likewise.
	(noop_move_p): Likewise.
	(note_stores): Likewise.
	* sched-deps.c (sched_analyze_reg): Likewise.
	(sched_analyze_insn): Likewise.

From-SVN: r263331

gcc/
	* cse.c (invalidate_reg): New function extracted from...
	(invalidate): ...here.
	(canonicalize_insn): Check for clobber high.
	(invalidate_from_clobbers): invalidate clobber highs.
	(invalidate_from_sets_and_clobbers): Likewise.
	(count_reg_usage): Check for clobber high.
	(insn_live_p): Likewise.
	* cselib.c (cselib_expand_value_rtx_1):Likewise.
	(cselib_invalidate_regno): Check for clobber in setter.
	(cselib_invalidate_rtx): Pass through setter.
	(cselib_invalidate_rtx_note_stores):
	(cselib_process_insn): Check for clobber high.
	* cselib.h (cselib_invalidate_rtx): Add operand.

From-SVN: r263330

gcc/
	* lra-eliminations.c (lra_eliminate_regs_1): Check for clobber high.
	(mark_not_eliminable): Likewise.
	* lra-int.h (struct lra_insn_reg): Add clobber high marker.
	* lra-lives.c (process_bb_lives): Check for clobber high.
	* lra.c (new_insn_reg): Remember clobber highs.
	(collect_non_operand_hard_regs): Check for clobber high.
	(lra_set_insn_recog_data): Likewise.
	(add_regs_to_insn_regno_info): Likewise.
	(lra_update_insn_regno_info): Likewise.

From-SVN: r263329

gcc/
	* rtl.h (reg_is_clobbered_by_clobber_high): Add declarations.
	* rtlanal.c (reg_is_clobbered_by_clobber_high): Add function.

From-SVN: r263328

Ensure clobber high is a register expression.
Info is passed through for the error case.

gcc/
	* emit-rtl.c (verify_rtx_sharing): Check for CLOBBER_HIGH.
	(copy_insn_1): Likewise.
	(gen_hard_reg_clobber_high): New gen function.
	* genconfig.c (walk_insn_part): Check for CLOBBER_HIGH.
	* genemit.c (gen_exp): Likewise.
	(gen_emit_seq): Pass through info.
	(gen_insn): Check for CLOBBER_HIGH.
	(gen_expand): Pass through info.
	(gen_split): Likewise.
	(output_add_clobbers): Likewise.
	* genrecog.c (validate_pattern): Check for CLOBBER_HIGH.
	(remove_clobbers): Likewise.
	* rtl.h (gen_hard_reg_clobber_high): New declaration.

From-SVN: r263327

Includes documentation.

2018-08-06  Alan Hayward  <alan.hayward@arm.com>

	* doc/rtl.texi (clobber_high): Add.
	(parallel): Add in clobber high
	* rtl.c (rtl_check_failed_code3): Add function.
	* rtl.def (CLOBBER_HIGH): Add expression.
	* rtl.h (RTL_CHECKC3): Add macro.
	(rtl_check_failed_code3): Add declaration.
	(XC3EXP): Add macro.

From-SVN: r263326

	* MAINTAINERS: Update my email address.

From-SVN: r263325