1. 10 Dec, 2018 11 commits
  2. 09 Dec, 2018 19 commits
  3. 08 Dec, 2018 7 commits
  4. 07 Dec, 2018 3 commits
    • decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages about… · fee11e77
      decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages about bit-fields with function type...
      
      /cp
      2018-12-07  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages
      	about bit-fields with function type, warn_if_not_aligned type, and
      	static bit-fields; avoid DECL_NAME for unnamed declarations.
      
      /testsuite
      2018-12-07  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* g++.dg/other/bitfield7.C: New.
      	* g++.dg/parse/bitfield8.C: Likewise.
      	* g++.dg/parse/bitfield9.C: Likewise.
      	* g++.dg/pr53037-4.C: Test the locations too.
      
      From-SVN: r266900
      Paolo Carlini committed
    • re PR target/87496 (ICE in aggregate_value_p at gcc/function.c:2046) · 96e14fda
      gcc/
      	PR target/87496
      	* config/rs6000/rs6000.c (rs6000_option_override_internal): Disallow
      	-mabi=ieeelongdouble and -mabi=ibmlongdouble without -mlong-double-128.
      	Do not error for -mabi=ibmlongdouble and no ISA 2.06 support.
      	* doc/invoke.texi: Document -mabi=ibmlongdouble and -mabi=ieeelongdouble
      	require -mlong-double-128.
      
      gcc/testsuite/
      	PR target/87496
      	* gcc.target/powerpc/pr87496.c: Rename from this...
      	* gcc.target/powerpc/pr87496-1.c: ...to this.  Update comment.
      	* gcc.target/powerpc/pr87496-2.c: New test.
      	* gcc.target/powerpc/pr87496-3.c: New test.
      
      From-SVN: r266899
      Peter Bergner committed
    • [AArch64][2/2] Add sve_width -moverride tunable · 886f092f
      On top of the previous patch that implements TARGET_ESTIMATED_POLY_VALUE
      and adds an sve_width tuning field to the CPU structs, this patch implements
      an -moverride knob to adjust this sve_width field to allow for experimentation.
      Again, reminder that this only has an effect when compiling for VLA-SVE that is,
      without msve-vector-bits=<foo>. This just adjusts tuning heuristics in the compiler,,
      like profitability thresholds for vectorised versioned loops, and others.
      
      It can be used, for example like -moverride=sve_width=256 to set the sve_width
      tuning field to 256. Widths outside of the accepted SVE widths [128 - 2048] are rejected
      as you'd expect.
      
          * config/aarch64/aarch64.c (aarch64_tuning_override_functions): Add
          sve_width entry.
          (aarch64_parse_sve_width_string): Define.
      
      
          * gcc.target/aarch64/sve/override_sve_width_1.c: New test.
      
      From-SVN: r266898
      Kyrylo Tkachov committed