2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
	* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
	FDPIC.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275569

The main difference with existing support is that function addresses
are function descriptor addresses instead. This means that all code
dealing with function pointers now has to cope with function
descriptors instead.

For the same reason, Linux kernel helpers can no longer be called by
dereferencing their address, so we implement wrappers that directly
call the kernel helpers.

When restoring a function address, we also have to restore the FDPIC
register value (r9).

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
	field.

	libgcc/
	* config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
	(__kernel_dmb): Likewise.
	(__fdpic_cmpxchg): New function.
	(__fdpic_dmb): New function.
	* config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
	(gnu_Unwind_Find_got): New function.
	(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
	* unwind-arm-common.inc (UCB_PR_GOT): New.
	(funcdesc_t): New struct.
	(get_eit_entry): Add FDPIC support.
	(unwind_phase2): Likewise.
	(unwind_phase2_forced): Likewise.
	(__gnu_Unwind_RaiseException): Likewise.
	(__gnu_Unwind_Resume): Likewise.
	(__gnu_Unwind_Backtrace): Likewise.
	* unwind-pe.h (read_encoded_value_with_base): Likewise.

	libstdc++/
	* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
	support.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275568

In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	libgcc/
	* libgcc/crtstuff.c: Add support for FDPIC.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275567

The FDPIC register is hard-coded to r9, as defined in the ABI.

We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.

When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
	in FDPIC mode.
	* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
	new function.
	* config/arm/arm.c (arm_option_override): Define pic register to
	FDPIC_REGNUM.
	(arm_function_ok_for_sibcall): Disable sibcall optimization if we
	have no decl or go through PLT.
	(calculate_pic_address_constant): New function.
	(legitimize_pic_address): Call calculate_pic_address_constant.
	(arm_load_pic_register): Handle TARGET_FDPIC.
	(arm_is_segment_info_known): New function.
	(arm_pic_static_addr): Add support for FDPIC.
	(arm_load_function_descriptor): New function.
	(arm_emit_call_insn): Add support for FDPIC.
	(arm_assemble_integer): Add support for FDPIC.
	* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
	Define. (FDPIC_REGNUM): New define.
	* config/arm/arm.md (call): Add support for FDPIC.
	(call_value): Likewise.
	(restore_pic_register_after_call): New pattern.
	(untyped_call): Disable if FDPIC.
	(untyped_return): Likewise.
	* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.

	gcc/testsuite/
	* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
	* gcc.target/arm/fp16-aapcs-4.c: Likewise.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275566

In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.

We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.

At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that static link is
not supported as it requires specifying the dynamic linker because the
executable still has to relocate itself at startup.

We also force 'now' binding since lazy binding is not supported.

We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
	* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
	(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
	* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
	(CC1_SPEC): Use FDPIC_CC1_SPEC.
	(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
	* config/arm/uclinuxfdpiceabi.h: New file.

	libsanitizer/
	* configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
	unsupported in this configuration.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275565

The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order to enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.

In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.

In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	config/
	* futex.m4: Handle *-uclinux*.
	* tls.m4 (GCC_CHECK_TLS): Likewise.

	gcc/
	* config.gcc: Handle *-*-uclinuxfdpiceabi.

	libatomic/
	* configure.tgt: Handle arm*-*-uclinux*.
	* configure: Regenerate.

	libgcc/
	* config.host: Handle *-*-uclinuxfdpiceabi.

	libitm/
	* configure.tgt: Handle *-*-uclinux*.
	* configure: Regenerate.

	* libtool.m4: Handle uclinuxfdpiceabi.

From-SVN: r275564

	PR libstdc++/91711
	* testsuite/23_containers/span/get_neg.cc: Avoid ambiguity due to
	0ul being a valid null pointer constant.

From-SVN: r275563

Define partial specializations for std::remove_cv so that
std::remove_const and std::remove_volatile don't need to be
instantiated.

	* include/std/type_traits (__remove_cv_t): New alias template.
	(is_void, is_integral, is_floating_point, is_pointer)
	(is_member_object_pointer, is_member_function_pointer, is_null_pointer)
	(is_member_point), __is_signed_integer, __is_unsigned_integer)
	(__make_unsigned_selector, __make_signed_selector, remove_pointer)
	(__decay_selector): Use __remove_cv_t.
	(remove_cv): Add partial specializations for cv-qualified types.
	(__decay_t): New alias template.
	(__decay_and_strip, __common_type_impl, __result_of_impl): Use
	__decay_t.
	(__enable_if_t): Move earlier in the file.
	(_Require): Use __enable_if_t.
	(swap(T&, T&)): Use _Require.
	(swap(T(&)[N])): Use __enable_if_t.

From-SVN: r275562

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	* config/arm/arm.opt: Add -mfdpic option.
	* doc/invoke.texi: Add documentation for -mfdpic.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275561

2019-09-09  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Implement C++20 p1424 - 'constexpr' feature macro concerns,
	Issue 3256 - Feature testing macro for constexpr algorithms,
	and Issue 3257 - Missing feature testing macro update from P0858.
	* include/std/version (__cpp_lib_constexpr_algorithms): Bump value.
	* include/bits/algorithmfwd.h: Ditto.
	* include/std/utility: Ditto.
	* testsuite/25_algorithms/constexpr_macro.cc: Ditto.
	* testsuite/25_algorithms/cpp_lib_constexpr.cc: New check for
	__cpp_lib_constexpr macro in <algorith>.
	* testsuite/20_util/exchange/constexpr.cc: Add check for
	__cpp_lib_constexpr macro in <utility>.
	* testsuite/25_algorithms/adjacent_find/constexpr.cc: Remove check for
	__cpp_lib_constexpr_algorithms.
	* testsuite/25_algorithms/all_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/any_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/binary_search/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_backward/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/count/constexpr.cc: Ditto.
	* testsuite/25_algorithms/count_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/equal/constexpr.cc: Ditto.
	* testsuite/25_algorithms/equal_range/constexpr.cc: Ditto.
	* testsuite/25_algorithms/fill/constexpr.cc: Ditto.
	* testsuite/25_algorithms/fill_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_end/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_first_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_if_not/constexpr.cc: Ditto.
	* testsuite/25_algorithms/for_each/constexpr.cc: Ditto.
	* testsuite/25_algorithms/generate/constexpr.cc: Ditto.
	* testsuite/25_algorithms/generate_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_heap/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_heap_until/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_partitioned/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_permutation/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_sorted/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_sorted_until/constexpr.cc: Ditto.
	* testsuite/25_algorithms/lexicographical_compare/constexpr.cc: Ditto.
	* testsuite/25_algorithms/lower_bound/constexpr.cc: Ditto.
	* testsuite/25_algorithms/merge/constexpr.cc: Ditto.
	* testsuite/25_algorithms/mismatch/constexpr.cc: Ditto.
	* testsuite/25_algorithms/none_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/partition_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/partition_point/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/reverse_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/rotate_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/search/constexpr.cc: Ditto.
	* testsuite/25_algorithms/search_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_difference/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_intersection/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_symmetric_difference/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_union/constexpr.cc: Ditto.
	* testsuite/25_algorithms/transform/constexpr.cc: Ditto.
	* testsuite/25_algorithms/unique/constexpr.cc: Ditto.
	* testsuite/25_algorithms/unique_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/upper_bound/constexpr.cc: Ditto.

From-SVN: r275560

    
    Also fix the key used to store the ID.
    
    This is a significant speedup in cmd/go run time.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194257

From-SVN: r275559

    
    This relatively minor change increases the number of inlinable
    functions/methods in the standard library from 983 to 2179.
    
    In particular it permits inlining math/bits/RotateLeftNN.  This
    restores the speed of crypto/sha256 back to what it was before the
    update to 1.13beta1.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194340

From-SVN: r275558

	* decl.c (grokdeclarator): Diagnose wrong usage of decltype(auto) in
	a function declaration.

	* g++.dg/cpp1y/auto-fn57.C: New test.

From-SVN: r275557

From-SVN: r275555

    
    They were lost when the files were moved in the update to Go1.13beta1.
    These changes should be made in the master repo for the 1.14 release,
    as riscv64 support is added there.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194343

From-SVN: r275551

    
    The C file has a build tag, but the procedure we use for building C
    files ignores build tags.
    
    This should fix the libgo build on non-x86 systems.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194378

From-SVN: r275544

2019-09-09  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * expmed.c (extract_bit_field): Update function comment
        regarding alt_rtl.
        * expr.c (expand_expr_real): Update function comment
        regarding alt_rtl.
        (expand_misaligned_mem_ref): New helper function.
        (expand_expr_real_2): Use expand_misaligned_mem_ref.
        Remove duplicate assignment to "base" at case MEM_REF.
        Remove a shadowed variable "unsignedp" at case VCE.

From-SVN: r275541

    
    For the main package we add an implicit import of the runtime package,
    to ensure that it is initialized.  That import used the predeclared
    location, which caused various tests, notably Named_type::is_builtin,
    to treat these imported names as builtin.  Start using a real location,
    so that those tests do the right thing.
    
    By the way, this implicit import is a partial cause of golang/go#19773.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194337

From-SVN: r275540

    
    We forgot to ever traverse types of constant expressions.  This rarely
    makes a difference--evidently, since nobody noticed--but it does
    matter when we inline constant expressions: we need to ensure that the
    type is visible to the importing code.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194317

From-SVN: r275539

We currently maintain global REG_SET versions of fixed_reg_set
and regs_invalidated_by_call.  With bitmap_view, we can instead
operate directly on the underlying HARD_REG_SETs, avoiding the
need to keep the two pieces of data in sync.

I have a series of patches that removes the assumption that there's
a single global ABI for all functions in the translation unit,
which includes not relying on having a global regs_invalidated_by_call.
Removing the REG_SET equivalent is one step to doing that.

Note that the affected DF code is used for EH edges or dumping only,
so shouldn't be performance critical.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* regset.h (regs_invalidated_by_call_regset): Delete.
	(fixed_reg_set_regset): Likewise.
	* reginfo.c (regs_invalidated_by_call_regset): Likewise.
	(fixed_reg_set_regset, persistent_obstack): Likewise.
	(init_reg_sets_1, globalize_reg): Update accordingly.
	* df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
	instead of a bitmap.
	* df-core.c (df_print_regset, df_print_word_regset): Likewise.
	* df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
	instead of regs_invalidated_by_call_regset.
	(df_lr_confluence_n, df_md_confluence_n): Likewise.
	* df-scan.c (df_scan_start_dump): Likewise.
	* dse.c (copy_fixed_regs): Likewise.
	* config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.

From-SVN: r275537

This patch adds a bitmap_view<X> class that creates a read-only,
on-stack bitmap representation of an array-like object X.  The main
use case is to allow HARD_REG_SETs to be used in REG_SET (i.e. bitmap)
operations.

For now it only handles constant-sized arrays, but I've tried to
define the types in a way that could handle variable-sized arrays
in future (although less efficiently).  E.g. this might be useful
for combining bitmaps and sbitmaps.

For the read-only view to work as intended, I needed to make
bitmap_bit_p take a const_bitmap instead of a bitmap.  Logically
the bitmap really is read-only, but we update the "current" and
"indx" fields of the bitmap_head after doing a search.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* array-traits.h: New file.
	* coretypes.h (array_traits, bitmap_view): New types.
	* bitmap.h: Include "array-traits.h"
	(bitmap_bit_p): Take a const_bitmap instead of a bitmap.
	(base_bitmap_view, bitmap_view): New classes.
	* bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
	* hard-reg-set.h: Include array-traits.h.
	(array_traits<HARD_REG_SET>): New struct.
	* regset.h (IOR_REG_SET_HRS): New macro.
	* loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
	rather than iterating over each hard register.
	* sched-deps.c (sched_analyze_insn): Likewise.
	* sel-sched-ir.c (setup_id_implicit_regs): Likewise.

From-SVN: r275536

This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
rather than a pointer, so that it can be passed a temporary object
in later patches.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
	instead of a HARD_REG_SET *.
	* ira-build.c (ior_hard_reg_conflicts): Likewise.
	(ira_build): Update call accordingly.
	* ira-emit.c (add_range_and_copies_from_move_list): Likewise.

From-SVN: r275535

Use "x == y" instead of "hard_reg_set_equal_p (x, y)".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator==): New function.
	(HARD_REG_SET::operator!=): Likewise.
	(hard_reg_set_equal_p): Delete.
	* cfgcleanup.c (old_insns_match_p): Use == instead of
	hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
	* ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
	(add_allocno_hard_regs_to_forest): Likewise.
	(setup_allocno_available_regs_num): Likewise.
	* ira.c (setup_pressure_classes): Likewise.
	(setup_allocno_and_important_classes): Likewise.
	(setup_reg_class_relations): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* reg-stack.c (change_stack, convert_regs_1): Likewise.

From-SVN: r275534

Use "x |= ~y" instead of "IOR_COMPL_HARD_REG_SET (x, y)", or just
"x | ~y" if the result is a temporary.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
	* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
	Use "|~" instead of IOR_COMPL_HARD_REG_SET.
	* config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
	Likewise.
	* ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
	* ira.c (setup_reg_renumber): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* regrename.c (regrename_find_superclass): Likewise.
	* reload1.c (find_reg): Likewise.

From-SVN: r275533

Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary.  This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
	* caller-save.c (setup_save_areas): Use "&~" instead of
	AND_COMPL_HARD_REG_SET.
	(save_call_clobbered_regs): Likewise.
	* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
	Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
	* config/mips/mips.c (mips_class_max_nregs): Likewise.
	(mips_conditional_register_usage): Likewise.
	* config/sh/sh.c (output_stack_adjust): Likewise.
	* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
	(setup_profitable_hard_regs): Likewise.
	(get_conflict_and_start_profitable_regs): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	(setup_regno_cost_classes_by_aclass): Likewise.
	* ira-lives.c (process_bb_node_lives): Likewise.
	* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
	(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
	(setup_allocno_and_important_classes, setup_class_translate_array)
	(setup_reg_class_relations, setup_prohibited_class_mode_regs):
	Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
	(process_alt_operands, inherit_in_ebb): Likewise.
	* lra-eliminations.c (update_reg_eliminate): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	(mark_target_live_regs): Likewise.
	* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
	(implicit_clobber_conflict_p): Likewise.
	* shrink-wrap.c (requires_stack_frame_p): Likewise.
	(try_shrink_wrapping): Likewise.

From-SVN: r275532

Use "x |= y" instead of "IOR_HARD_REG_SET (x, y)" (or just "x | y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator|): New function.
	(HARD_REG_SET::operator|=): Likewise.
	(IOR_HARD_REG_SET): Delete.
	* config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
	IOR_HARD_REG_SET.
	* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
	* config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
	* final.c (collect_fn_hard_reg_usage): Likewise.
	* hw-doloop.c (scan_loop, optimize_loop): Likewise.
	* ira-build.c (merge_hard_reg_conflicts): Likewise.
	(ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
	(propagate_some_info_from_allocno): Likewise.
	(copy_info_to_removed_store_destinations): Likewise.
	* ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
	(allocno_reload_assign, ira_reassign_pseudos): Likewise.
	(fast_allocation): Likewise.
	* ira-conflicts.c (ira_build_conflicts): Likewise.
	* ira-lives.c (make_object_dead, process_single_reg_class_operands)
	(process_bb_node_lives): Likewise.
	* ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
	* lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
	* lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
	* lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
	(process_bb_lives): Likewise.
	* lra-spills.c (assign_spill_hard_regs): Likewise.
	* postreload.c (reload_combine): Likewise.
	* reginfo.c (init_reg_sets_1): Likewise.
	* regrename.c (merge_overlapping_regs, find_rename_reg)
	(merge_chains): Likewise.
	* reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
	(find_reload_regs, finish_spills, choose_reload_regs_init)
	(emit_reload_insns): Likewise.
	* reorg.c (redundant_insn): Likewise.
	* resource.c (find_dead_or_set_registers, mark_set_resources)
	(mark_target_live_regs): Likewise.
	* rtlanal.c (find_all_hard_reg_sets): Likewise.
	* sched-deps.c (sched_analyze_insn): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
	(find_best_reg_for_expr): Likewise.
	* shrink-wrap.c (try_shrink_wrapping): Likewise.

From-SVN: r275531

Use "x &= y" instead of "AND_HARD_REG_SET (x, y)" (or just "x & y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator&): New function.
	(HARD_REG_SET::operator&): Likewise.
	(AND_HARD_REG_SET): Delete.
	* caller-save.c (setup_save_areas): Use "&" instead of
	AND_HARD_REG_SET.
	(save_call_clobbered_regs): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/m32c/m32c.c (reduce_class): Likewise.
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
	* final.c (get_call_reg_set_usage): Likewise.
	* ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
	(setup_left_conflict_sizes_p): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	* ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
	(setup_reg_class_relations): Likewise.
	* reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
	* reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r275530

"COMPL_HARD_REG_SET (x, y)" becomes "x = ~y".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator~): New function.
	(COMPL_HARD_REG_SET): Delete.
	* config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
	of COMPL_HARD_REG_SET.
	(try_rename_operands): Likewise.
	* config/sh/sh.c (push_regs): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* lra-constraints.c (contains_reg_p): Likewise.
	* reload1.c (finish_spills, choose_reload_regs_init): Likewise.

From-SVN: r275529

This patch replaces "COPY_HARD_REG_SET (x, y)" with "x = y".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (COPY_HARD_REG_SET): Delete.
	* caller-save.c (save_call_clobbered_regs): Use assignment instead
	of COPY_HARD_REG_SET.
	* config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
	(epiphany_conditional_register_usage): Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
	* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
	* config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
	* config/mips/mips.c (mips_class_max_nregs): Likewise.
	* config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
	* config/sh/sh.c (output_stack_adjust): Likewise.
	* final.c (collect_fn_hard_reg_usage): Likewise.
	(get_call_reg_set_usage): Likewise.
	* ira-build.c (ira_create_object, remove_low_level_allocnos)
	(ira_flattening): Likewise.
	* ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
	(setup_left_conflict_sizes_p, setup_profitable_hard_regs)
	(get_conflict_and_start_profitable_regs, allocno_reload_assign)
	(ira_reassign_pseudos): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	(setup_regno_cost_classes_by_aclass): Likewise.
	* ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
	(setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
	(setup_stack_reg_pressure_class, setup_pressure_classes)
	(setup_allocno_and_important_classes, setup_class_translate_array)
	(setup_reg_class_relations, setup_prohibited_class_mode_regs)
	(ira_setup_eliminable_regset): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
	(process_alt_operands, inherit_in_ebb): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* lra-spills.c (assign_spill_hard_regs): Likewise.
	* lra.c (lra): Likewise.
	* mode-switching.c (new_seginfo): Likewise.
	* postreload.c (reload_combine): Likewise.
	* reg-stack.c (straighten_stack): Likewise.
	* reginfo.c (save_register_info, restore_register_info): Likewise.
	(init_reg_sets_1, record_subregs_of_mode): Likewise
	* regrename.c (create_new_chain, rename_chains): Likewise.
	* reload1.c (order_regs_for_reload, find_reg): Likewise.
	(find_reload_regs): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	(mark_target_live_regs): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r275528

I have a series of patches that (as a side effect) makes all rtl
passes use the information collected by -fipa-ra.  This showed up a
latent bug in the liveness tracking in regrename.c, which doesn't take
CALL_INSN_FUNCTION_USAGE into account when processing clobbers.

This actually seems to be quite a common problem with passes that use
note_stores; only a handful remember to walk CALL_INSN_FUNCTION_USAGE
too.  I think it was just luck that I saw it with regrename first.

This patch tries to make things more robust by passing an insn rather
than a pattern to note_stores.  The old function is still available
as note_pattern_stores for the few places that need it.

When updating callers, I've erred on the side of using note_stores
rather than note_pattern_stores, because IMO note_stores should be
the default choice and we should only use note_pattern_stores if
there's a specific reason.  Specifically:

* For cselib.c, "body" may be a COND_EXEC_CODE instead of the main
  insn pattern.

* For ira.c, I wasn't sure whether extending no_equiv to
  CALL_INSN_FUNCTION_USAGE really made sense, since we don't do that
  for normal call-clobbered registers.  Same for mark_not_eliminable
  in reload1.c

* Some other places only have a pattern available, and since those
  places wouldn't benefit from walking CALL_INSN_FUNCTION_USAGE,
  it seemed better to alter the code as little as possible.

* In the config/ changes, quite a few callers have already weeded
  out CALL insns.  It still seemed better to use note_stores rather
  than prematurely optimise.  (note_stores should tail call to
  note_pattern_stores once it sees that the insn isn't a call.)

The patch also documents what SETs mean in CALL_INSN_FUNCTION_USAGE.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean.
	(note_pattern_stores): Declare.
	(note_stores): Take an rtx_insn *.
	* rtlanal.c (set_of): Use note_pattern_stores instead of note_stores.
	(find_all_hard_reg_sets): Pass the insn rather than its pattern to
	note_stores.  Remove explicit handling of CALL_INSN_FUNCTION_USAGE.
	(note_stores): Take an rtx_insn * as argument and process
	CALL_INSN_FUNCTION_USAGE.  Rename old function to...
	(note_pattern_stores): ...this.
	(find_first_parameter_load): Pass the insn rather than
	its pattern to note_stores.
	* alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise.
	* caller-save.c (setup_save_areas, save_call_clobbered_regs)
	(insert_one_insn): Likewise.
	* combine.c (combine_instructions): Likewise.
	(likely_spilled_retval_p): Likewise.
	(try_combine): Use note_pattern_stores instead of note_stores.
	(record_dead_and_set_regs): Pass the insn rather than its pattern
	to note_stores.
	(reg_dead_at_p): Likewise.
	* config/bfin/bfin.c (workaround_speculation): Likewise.
	* config/c6x/c6x.c (maybe_clobber_cond): Likewise.  Take an rtx_insn *
	rather than an rtx.
	* config/frv/frv.c (frv_registers_update): Use note_pattern_stores
	instead of note_stores.
	(frv_optimize_membar_local): Pass the insn rather than its pattern
	to note_stores.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/i386/i386.c (ix86_avx_u128_mode_after): Likewise.
	* config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise.
	(r10k_needs_protection_p, mips_sim_issue_insn): Likewise.
	(mips_reorg_process_insns): Likewise.
	* config/s390/s390.c (s390_regs_ever_clobbered): Likewise.
	* config/sh/sh.c (flow_dependent_p): Likewise.  Take rtx_insn *s
	rather than rtxes.
	* cse.c (delete_trivially_dead_insns): Pass the insn rather than
	its pattern to note_stores.
	* cselib.c (cselib_record_sets): Use note_pattern_stores instead
	of note_stores.
	* dce.c (mark_nonreg_stores): Remove the "body" parameter and pass
	the insn to note_stores.
	(prescan_insns_for_dce): Update call accordingly.
	* ddg.c (mem_write_insn_p): Pass the insn rather than its pattern
	to note_stores.
	* df-problems.c (can_move_insns_across): Likewise.
	* dse.c (emit_inc_dec_insn_before, replace_read): Likewise.
	* function.c (assign_parm_setup_reg): Likewise.
	* gcse-common.c (record_last_mem_set_info_common): Likewise.
	* gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise.
	(single_set_gcse): Likewise.
	* ira.c (validate_equiv_mem): Likewise.
	(update_equiv_regs): Use note_pattern_stores rather than note_stores
	for no_equiv.
	* loop-doloop.c (doloop_optimize): Pass the insn rather than its
	pattern to note_stores.
	* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
	* loop-iv.c (simplify_using_initial_values): Likewise.
	* mode-switching.c (optimize_mode_switching): Likewise.
	* optabs.c (emit_libcall_block_1): Likewise.
	(expand_atomic_compare_and_swap): Likewise.
	* postreload-gcse.c (load_killed_in_block_p): Likewise.
	(record_opr_changes): Likewise.  Remove explicit handling of
	CALL_INSN_FUNCTION_USAGE.
	* postreload.c (reload_combine, reload_cse_move2add): Likewise.
	* regcprop.c (kill_clobbered_values): Likewise.
	(copyprop_hardreg_forward_1): Pass the insn rather than its pattern
	to note_stores.
	* regrename.c (build_def_use): Likewise.
	* reload1.c (reload):  Use note_pattern_stores instead of note_stores
	for mark_not_eliminable.
	(reload_as_needed): Pass the insn rather than its pattern
	to note_stores.
	(emit_output_reload_insns): Likewise.
	* resource.c (mark_target_live_regs): Likewise.
	* sched-deps.c (init_insn_reg_pressure_info): Likewise.
	* sched-rgn.c (sets_likely_spilled): Use note_pattern_stores
	instead of note_stores.
	* shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than
	its pattern to note_stores.
	* stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise.
	* var-tracking.c (adjust_insn, add_with_sets): Likewise.

From-SVN: r275527

We have two styles of HARD_REG_SET: a single integer based on
HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
or an array of integers.  One of the nice properties of this arrangement
is that:

  void foo (const HARD_REG_SET);

is passed by value as an integer when the set is small enough and
by reference otherwise.

(This is in constrast to "const HARD_REG_SET &", which would always
be passed by reference, and in contrast to passing a structure wrapper
like "struct s { T elts[1]; }" by value, where the structure might be
passed like a T or by reference, depending on the ABI.)

However, one of the disadvantages of using an array is that simple
assignment doesn't work.  We need to use COPY_HARD_REG_SET instead.

This patch uses a structure wrapper around the array, and preserves
the above "nice property" using a new const_hard_reg_set typedef.
The patch also removes the manual unrolling for small array sizes;
I think these days we can rely on the compiler to do that for us.

This meant fixing two port-specific quirks:

- epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
  The patch passes the NO_REGS set instead.

- ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
  are bigger than HARD_REG_SET.  The patch just open-codes them.

The patch is probably being too conservative.  Very few places actually
take advantage of the "nice property" above, and we could have a
cleaner interface if we used a structure wrapper for all cases.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
	than a #define.  Use a structure rather than an array as the
	fallback definition.  Remove special cases for low array sizes.
	(const_hard_reg_set): New typedef.
	(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
	(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
	(hard_reg_set_empty_p): Likewise.
	(SET_HARD_REG_BIT): Use a function rather than a macro to
	handle the case in which HARD_REG_SET is a structure.
	(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
	(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
	(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
	(IOR_COMPL_HARD_REG_SET): Likewise.
	(hard_reg_set_iterator::pset): Constify the pointer target.
	(hard_reg_set_iter_init): Take a const_hard_reg_set instead
	of a "const HARD_REG_SET".  Update the handling of non-integer
	HARD_REG_SETs.
	* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
	* reload.h: Likewise.
	* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
	* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
	of a "const HARD_REG_SET".
	(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
	(range_in_hard_reg_set_p): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
	* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
	Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
	* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
	use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
	(rws_insn_set, rws_insn_test): In the CHECKING_P version,
	take an unsigned int and open-code the HARD_REG_SET operations.

From-SVN: r275526

gcc/testsuite/
	* gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
	* gcc.target/powerpc/rlwinm-1.c: Ditto.
	* gcc.target/powerpc/rlwinm-2.c: Ditto.

From-SVN: r275525

From-SVN: r275524

2019-09-09  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Update docs for recent <span> and constexpr lib changes.
	* doc/xml/manual/status_cxx2020.xml: Update p0202r3, p0858r0, p0879r0,
	p1023r0, p1085r2 status.
	* doc/html/manual/status.html: Regenerate.

From-SVN: r275522

bt-load.c has AFAIK been dead code since the removal of the SH5 port
in 2016.  I have a patch series that would need to update the liveness
tracking in a nontrivial way, so it seemed better to remove the pass
rather than install an untested and probably bogus change.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* Makefile.in (OBJS): Remove bt-load.o.
	* doc/invoke.texi (fbranch-target-load-optimize): Delete.
	(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
	* common.opt (fbranch-target-load-optimize): Mark as Ignore and
	document that the option no longer does anything.
	(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
	* target.def (branch_target_register_class): Delete.
	(branch_target_register_callee_saved): Likewise.
	* doc/tm.texi.in (TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
	(TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
	* doc/tm.texi: Regenerate.
	* tree-pass.h (make_pass_branch_target_load_optimize1): Delete.
	(make_pass_branch_target_load_optimize2): Likewise.
	* passes.def (pass_branch_target_load_optimize1): Likewise.
	(pass_branch_target_load_optimize2): Likewise.
	* targhooks.h (default_branch_target_register_class): Likewise.
	* targhooks.c (default_branch_target_register_class): Likewise.
	* opt-suggestions.c (test_completion_valid_options): Remove
	-fbtr-bb-exclusive from the list of test options.
	* bt-load.c: Remove.

From-SVN: r275521

2019-09-09  Barnaby Wilks  <barnaby.wilks@arm.com>

	* match.pd: Add flag_unsafe_math_optimizations check
	before deciding on the widest type in a binary math operation.

	* gcc.dg/fold-binary-math-casts.c: New test.

From-SVN: r275518

2019-09-09  Martin Liska  <mliska@suse.cz>

	* config/i386/i386.opt: Update comment of removed
	options that are preserved only for backward
	compatibility.
2019-09-09  Martin Liska  <mliska@suse.cz>

	* c.opt: Update comment of removed
	options that are preserved only for backward
	compatibility.

From-SVN: r275517

__to_chars_10_impl is quite fast. According to the IACA the main loop
takes only 6.0 cycles, the whole function with one iteration takes
10.0 cycles. Replacing the __first[pos] and __first[pos - 1] with
__first[0] and __first[1] drops the function time to 7.53 cycles.

2019-09-09  Antony Polukhin  <antoshkka@gmail.com>

	* include/bits/charconv.h (__detail::__to_chars_10_impl): Replace
	final offsets with constants.

From-SVN: r275514

This patch simplifies the constraints on the constructors from arrays by
removing the redundant checks that element_type and value_type are
convertible to element_type. The incorrect uses of __adl_data in those
constructors are removed as well (they should use std::data not
std::ranges::data, and the former doesn't use ADL).

The range/container constructors are now constrained to exclude all
specializations of std::span, not just the current instantiation. The
range constructor now also checks s subset of the contiguous_range
requirements.

All relevant constructor constraints now use the _Require helper in
order to short circuit and avoid unnecessary instantiations after the
first failed constraint.

A new constructor supports initialization from different specializations
of std::span<OtherType, OtherExtent>, as specified in the C++20 draft.

	* include/bits/range_access.h (__adl_to_address): Remove.
	* include/std/span (__is_base_derived_safe_convertible_v): Replace
	with span::__is_compatible.
	(__is_std_array_v): Replace with __is_std_array class template and
	partial specializations.
	(__is_std_array, __is_std_span): New class templates and partial
	specializations.
	(span::__is_compatible): New alias template for SFINAE constraints.
	(span::span(element_type (&)[N])): Remove redundant constraints. Do
	not use __adl_data to obtain a pointer.
	(span::span(array<value_type, N>&)): Likewise.
	(span::span(const array<value_type, N>&)): Likewise.
	[_GLIBCXX_P1394] (span::iter_reference_t, span::iterator_t)
	(span::iter_value_t, span::derived_from): New alias templates for
	SFINAE constraints, until the equivalents are supported in <concepts>
	and <iterator>.
	[_GLIBCXX_P1394] (span::__is_compatible_iterator): New alias template
	for SFINAE constraints.
	[_GLIBCXX_P1394] (span::is_compatible_range): New class template for
	SFINAE constraints.
	[_GLIBCXX_P1394] (span::span(Range&&)): Improve constraints.
	[_GLIBCXX_P1394] (span::span(ContiguousIterator, Sentinel)): Likewise.
	Use std::to_address instead of __adl_to_address.
	[_GLIBCXX_P1394] (span::span(ContiguousIterator, size_type)): Likewise.
	[!_GLIBCXX_P1394] (span::__is_compatible_container): New alias
	template for SFINAE constraints.
	[!_GLIBCXX_P1394] (span::span(Container&))
	(span::span(const Container&)): Improve constraints.
	[!_GLIBCXX_P1394] (span::span(pointer, size_type))
	(span::span(pointer, pointer)): Remove redundant cast of pointer.
	(span(const span<OType, OExtent>&)): New constructor.

From-SVN: r275513

	PR target/87853
	* config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi
	instead of __v16qs.

	* gcc.target/i386/pr87853.c: New test.

From-SVN: r275508