1. 30 Mar, 2011 17 commits
    • ira-color.c (ira_assign_hard_reg): Use only one variable 'mode'. · 4648deb4
      2011-03-30  Vladimir Makarov  <vmakarov@redhat.com>
      
      	* ira-color.c (ira_assign_hard_reg): Use only one variable 'mode'.
      
      From-SVN: r171735
      Vladimir Makarov committed
    • tree-dfa.c (renumber_gimple_stmt_uids): Also number PHIs. · 8f984534
      2011-03-30  Richard Guenther  <rguenther@suse.de>
      
      	* tree-dfa.c (renumber_gimple_stmt_uids): Also number PHIs.
      	* lto-streamer-out.c (output_function): Do not use
      	renumber_gimple_stmt_uids.
      	* lto-streamer-in.c (input_function): Likewise.
      
      From-SVN: r171734
      Richard Biener committed
    • re PR bootstrap/48332 (optabs changes (PR48263 fix) broke m68k-linux bootstrap) · 4f431835
      gcc/
      	PR rtl-optimization/48332
      	* optabs.c (expand_binop_directly): Set xmodeN to the target-mandated
      	mode of input operand N and modeN to its actual mode.
      
      From-SVN: r171733
      Richard Sandiford committed
    • Update to current Go library. · f72f4169
      From-SVN: r171732
      Ian Lance Taylor committed
    • reload.h (reg_equiv_constant): Move into new structure reg_equivs, define accessor macro. · f2034d06
      
      	* reload.h (reg_equiv_constant): Move into new structure reg_equivs,
      	define accessor macro.
      	(reg_equiv_invariant, reg_equiv_memory_loc): Likewise.
      	(reg_equiv_address, reg_equiv_mem, reg_equiv_alt_mem_list): Likewise.
      	(reg_equiv_init): Likewise.
      	(reg_equivs_size): New variable.
      	(reg_equiv_init_size): Remove.
      	(allocate_initial_values): Move prototype to here from....
      	* integrate.h (allocate_initial_values): Remove prototype.
      	* integrate.c: Include reload.h.
      	(allocate_initial_values): Corresponding changes.
      	* ira.c (find_reg_equiv_invariant_cost): Corresponding changes.
      	(fix_reg_equiv_init, no_equiv): Corresponding changes.
      	(update_equiv_regs): Corresponding changes.
      	(ira): Corresponding changes.
      	* reload.c (push_reg_equiv_alt_mem): Corresponding changes.
      	(push_secondary_reload): Corresponding changes.
      	(push_reload, find_reloads, find_reloads_toplev): Corresponding changes.
      	(make_memloc, find_reloads_address): Corresponding changes.
      	(subst_reg_equivs, subst_indexed_address): Corresponding changes.
      	(find_reloads_address_1): Corresponding changes.
      	(find_reloads_subreg_address, subst_reloads): Corresponding changes.
      	(refers_to_regno_for_reload_p): Corresponding changes.
      	(reg_overlap_mentioned_for_reload_p): Corresponding changes.
      	(refers_to_mem_for_reload_p, find_equiv_reg): Corresponding changes.
      	* reload1.c: Include ggc.h.
      	(grow_reg_equivs): New function.
      	(replace_pseudos_in, reload): Corresponding changes.
      	(calculate_needs_all_insns, alter_regs): Corresponding changes.
      	(eliminate_regs_1, elimination_effects): Corresponding changes.
      	(emit_input_reload_insns, emit_output_reload_insns): Likewise.
      	(delete_output_reload): Likewise.
      	* caller-save.c (mark_referenced_regs): Corresponding changes.
      	* alpha/alpha.c (resolve_reload_operand): Corresponding changes.
      	* frv/predicates.md (frv_load_operand): Corresponding changes.
      	* microblaze/microblaze.c (double_memory_operand): Corresponding
      	changes.
      	* avr/avr.h (LEGITIMIZE_RELOAD_ADDRESS): Corresponding changes.
      	* xtensa/xtensa.c (fixup_subreg_mem): Corresponding changes.
      	* mn10300/mn10300.c (mn10300_secondary_reload): Corresponding
      	changes.
      	* m68k/m68k.c (emit_move_sequence): Corresponding changes.
      	* arm/arm.c (arm_reload_in_hi, arm_reload_out_hi): Corresponding
      	changes.
      	* pa/pa.c (emit_move_sequence): Corresponding changes.
      	* vax/vax.c (nonindexed_address_p): Corresponding changes.
      
      From-SVN: r171731
      Jeff Law committed
    • re PR target/47551 (ICE when reloading neon registers from out-of-range offsets) · 159b81b0
      gcc/
      	PR target/47551
      	* config/arm/arm.c (coproc_secondary_reload_class): Handle
      	structure modes.  Don't check neon_vector_mem_operand for
      	vector or structure modes.
      
      gcc/testsuite/
      	PR target/47551
      	* gcc.target/arm/neon-modes-2.c: New test.
      
      From-SVN: r171730
      Richard Sandiford committed
    • re PR target/43590 (ICE in spill_failure, at reload1.c:2158) · a6217191
      gcc/
      2011-03-30  Richard Sandiford  <richard.sandiford@linaro.org>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
      
      	PR target/43590
      	* config/arm/neon.md (neon_vld3qa<mode>, neon_vld4qa<mode>): Remove
      	operand 1 and reshuffle the operands to match.
      	(neon_vld3<mode>, neon_vld4<mode>): Update accordingly.
      
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
      
      From-SVN: r171729
      Richard Sandiford committed
    • Fixup PR references. · 6955d771
      From-SVN: r171728
      Mike Stump committed
    • PR/driver 48208 · bd837408
      2011-03-30  Christian Schüler  <cschueler@gmx.de>
      
      	PR/driver 48208
      	* config/c.opt (F): Added 'Driver' to -F option.
      	PR/driver 48260
      	* config/darwin-driver.c (darwin_driver_init): Add '-arch' to
      	  handler function.
      	* config/darwin.opt: Added '-arch' option.
      
      From-SVN: r171727
      Christian Schüler committed
    • rx.md: Add peepholes and patterns to combine extending loads and simple arithmetic... · e9c0470a
      	* config/rx/rx.md: Add peepholes and patterns to combine
      	extending loads and simple arithmetic instructions.
      	* config/rx/rx.h (ADJUST_INSN_LENGTH): Define.
              * config/rx/rx-protos.h (rx_adjust_insn_length): Prototype.
              * config/rx/rx.c (rx_is_legitimate_address): Allow QI and HI
      	modes to use pre-decrement and post-increment addressing.
              (rx_is_restricted_memory_address): Add range checking of REG+INT
      	addresses.
              (rx_print_operand): Add support for %Q.
              Fix handling of %Q.
              (rx_memory_move_cost): Adjust cost of stores.
              (rx_adjust_insn_length): New function.
      
      From-SVN: r171724
      Nick Clifton committed
    • re PR c/48305 (ice at -O0: verify_gimple failed) · 8a87e7ab
      	PR c/48305
      	* fold-const.c (fold_binary_loc) <case EQ_EXPR, NE_EXPR>: Make sure
      	arg10/arg11 in (X ^ Y) == (Z ^ W) are always fold converted to
      	matching arg00/arg01 types.
      
      	* gcc.c-torture/compile/pr48305.c: New test.
      
      From-SVN: r171723
      Jakub Jelinek committed
    • cfglayout.c (insn_locators_alloc): Initialize curr_location and last_location to UNKNOWN_LOCATION. · 12486e03
      	* cfglayout.c (insn_locators_alloc): Initialize curr_location and
      	last_location to UNKNOWN_LOCATION.
      
      From-SVN: r171722
      Eric Botcazou committed
    • Fix a typo in FLOAT_SSE_REGS. · 0b99eef6
      2011-03-30  H.J. Lu  <hongjiu.lu@intel.com>
      
      	PR target/48349
      	* config/i386/i386.h (REG_CLASS_CONTENTS): Fix a typo in
      	FLOAT_SSE_REGS.
      
      From-SVN: r171718
      H.J. Lu committed
    • re PR bootstrap/48337 (options.c doesn't compile on SPARC) · 023592aa
      2011-03-30  Joseph Myers  <joseph@codesourcery.com>
      	    Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
      
      	PR bootstrap/48337
      	* config/sparc/sparc.opt (sparc_cpu_and_features): Add
      	Init(PROCESSOR_V7).
      	(sparc_cpu): Likewise.
      	* config/sparc/sparc.c (sparc_option_override): Replace 0 by
      	PROCESSOR_V7.
      
      Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
      
      From-SVN: r171717
      Joseph Myers committed
    • re PR c++/48265 ([C++0x] ICE: SIGSEGV (recursion in… · 5453bbef
      re PR c++/48265 ([C++0x] ICE: SIGSEGV (recursion in value_dependent_expression_p) when variable is used uninitialised)
      
      	PR c++/48265
      	* pt.c (value_dependent_expression_p) [VAR_DECL]: Make sure
      	the variable is constant before looking at its initializer.
      
      From-SVN: r171714
      Jason Merrill committed
    • re PR target/48336 (Error in generation of ARM ldrd instruction) · ad3b266b
      2011-03-29  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR target/48336
      	PR middle-end/48342
      	PR rtl-optimization/48345
      	* ira-color.c (setup_conflict_profitable_regs): Exclude prohibited
      	hard regs for given mode from profitable regs when doing secondary
      	allocation.
      
      From-SVN: r171713
      Vladimir Makarov committed
    • Daily bump. · 99ac3cea
      From-SVN: r171712
      GCC Administrator committed
  2. 29 Mar, 2011 23 commits