1. 22 Feb, 2012 6 commits
  2. 21 Feb, 2012 20 commits
    • re PR libstdc++/50349 (/usr/bin/ld: warning: wildcard match appears in both… · ca2fecdc
      re PR libstdc++/50349 (/usr/bin/ld: warning: wildcard match appears in both version 'GLIBCXX_3.4' and 'CXXABI_1.3' in script)
      
      2012-02-17  Benjamin Kosnik  <bkoz@redhat.com>
      
      	PR libstdc++/50349
      	* config/abi/pre/gnu.ver: Only one local.
      	* config/abi/pre/gnu-versioned-namespace.ver: Same.
      
      From-SVN: r184453
      Benjamin Kosnik committed
    • ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not WORDS_BIG_ENDIAN. · 2805e6c0
      	* ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not
      	WORDS_BIG_ENDIAN.
      	* ira-color.c (setup_profitable_hard_regs, check_hard_reg_p,
      	assign_hard_reg): Likewise.
      
      From-SVN: r184451
      Bernd Schmidt committed
    • PR libstdc++/52317 (cont) · 1889b253
      2012-02-21  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR libstdc++/52317 (cont)
      	* include/profile/unordered_map: Ad Library Exception comment.
      	* include/profile/set: Likewise.
      	* include/profile/base.h: Likewise.
      	* include/profile/impl/profiler_list_to_slist.h: Likewise.
      	* include/profile/impl/profiler_container_size.h: Likewise.
      	* include/profile/impl/profiler_vector_size.h: Likewise.
      	* include/profile/impl/profiler_hash_func.h: Likewise.
      	* include/profile/impl/profiler_trace.h: Likewise.
      	* include/profile/impl/profiler_list_to_vector.h: Likewise.
      	* include/profile/impl/profiler_vector_to_list.h: Likewise.
      	* include/profile/impl/profiler.h: Likewise.
      	* include/profile/impl/profiler_state.h: Likewise.
      	* include/profile/impl/profiler_map_to_unordered_map.h: Likewise.
      	* include/profile/impl/profiler_algos.h: Likewise.
      	* include/profile/impl/profiler_hashtable_size.h: Likewise.
      	* include/profile/impl/profiler_node.h: Likewise.
      	* include/profile/vector: Likewise.
      	* include/profile/unordered_set: Likewise.
      	* include/profile/map.h: Likewise.
      	* include/profile/map: Likewise.
      
      From-SVN: r184448
      Paolo Carlini committed
    • avr.md (neghi2): Remove "!d,0" alternative. · 1890e136
      	* config/avr/avr.md (neghi2): Remove "!d,0" alternative. Tweak "r,0".
      
      From-SVN: r184447
      Georg-Johann Lay committed
    • * config/avr/avr.md · 4998825d
      	(*dec-and-branchhi!=-1.d.clobber): New text peephole.
      	(*dec-and-branchhi!=-1.l.clobber): New text peephole.
      
      From-SVN: r184446
      Georg-Johann Lay committed
    • avr-protos.h (avr_accumulate_outgoing_args): Move prototype from here to... · 0545950b
      	* config/avr/avr-protos.h (avr_accumulate_outgoing_args): Move
      	prototype from here to...
      	* config/avr/avr.h: ...here.
      
      From-SVN: r184445
      Georg-Johann Lay committed
    • re PR target/52294 ([ARM Thumb] generated asm code produces "branch out of… · 23d2a817
      re PR target/52294 ([ARM Thumb] generated asm code produces "branch out of range" error in gas with -Os -mcpu=cortex-a9)
      
      	PR target/52294
      	* thumb2.md (thumb2_shiftsi3_short): Split register and 	
      	immediate shifts.  For register shifts tie operands 0 and 1.
      	(peephole2 for above): Check that register-controlled shifts
      	have suitably tied operands.
      
      From-SVN: r184442
      Richard Earnshaw committed
    • re PR target/52137 (bdver2 scheduler needs to be added to bdver1 insn reservations) · 602c3369
      2012-02-21  Quentin Neill  <quentin.neill@amd.com>
      
      	PR target/52137
      	* config/i386/bdver1.md (bdver1_call, bdver1_push,
      	bdver1_pop, bdver1_leave, bdver1_lea, bdver1_imul_DI, bdver1_imul,
      	bdver1_imul_mem_DI, bdver1_imul_mem, bdver1_idiv, bdver1_idiv_mem,
      	bdver1_str, bdver1_idirect, bdver1_ivector, bdver1_idirect_loadmov,
      	bdver1_idirect_load, bdver1_ivector_load, bdver1_idirect_movstore,
      	bdver1_idirect_both, bdver1_ivector_both, bdver1_idirect_store,
      	bdver1_ivector_store, bdver1_fldxf, bdver1_fld, bdver1_fstxf,
      	bdver1_fst, bdver1_fist, bdver1_fmov_bdver1, bdver1_fadd_load,
      	bdver1_fadd, bdver1_fmul_load, bdver1_fmul, bdver1_fsgn,
      	bdver1_fdiv_load, bdver1_fdiv, bdver1_fpspc_load, bdver1_fpspc,
      	bdver1_fcmov_load, bdver1_fcmov, bdver1_fcomi_load,
      	bdver1_fcomi, bdver1_fcom_load, bdver1_fcom,
      	bdver1_fxch, bdver1_ssevector_avx128_unaligned_load,
      	bdver1_ssevector_avx256_unaligned_load,
      	bdver1_ssevector_sse128_unaligned_load,
      	bdver1_ssevector_avx128_load, bdver1_ssevector_avx256_load,
      	bdver1_ssevector_sse128_load, bdver1_ssescalar_movq_load,
      	bdver1_ssescalar_vmovss_load, bdver1_ssescalar_sse128_load,
      	bdver1_mmxsse_load, bdver1_sse_store_avx256, bdver1_sse_store,
      	bdver1_mmxsse_store_short, bdver1_ssevector_avx256,
      	bdver1_movss_movsd, bdver1_mmxssemov, bdver1_sselog_load_256,
      	bdver1_sselog_256, bdver1_sselog_load, bdver1_sselog,
      	bdver1_ssecmp_load, bdver1_ssecmp, bdver1_ssecomi_load,
      	bdver1_ssecomi, bdver1_vcvtX2Y_avx256_load, bdver1_vcvtX2Y_avx256,
      	bdver1_ssecvt_cvtss2sd_load, bdver1_ssecvt_cvtss2sd,
      	bdver1_sseicvt_cvtsi2sd_load, bdver1_sseicvt_cvtsi2sd,
      	bdver1_ssecvt_cvtpd2ps_load, bdver1_ssecvt_cvtpd2ps,
      	bdver1_ssecvt_cvtdq2ps_load, bdver1_ssecvt_cvtdq2ps,
      	bdver1_ssecvt_cvtdq2pd_load, bdver1_ssecvt_cvtdq2pd,
      	bdver1_ssecvt_cvtps2pd_load, bdver1_ssecvt_cvtps2pd,
      	bdver1_ssecvt_cvtsX2si_load, bdver1_ssecvt_cvtsX2si,
      	bdver1_ssecvt_cvtpd2pi_load, bdver1_ssecvt_cvtpd2pi,
      	bdver1_ssecvt_cvtpd2dq_load, bdver1_ssecvt_cvtpd2dq,
      	bdver1_ssecvt_cvtps2pi_load, bdver1_ssecvt_cvtps2pi,
      	bdver1_ssemuladd_load_256, bdver1_ssemuladd_256,
      	bdver1_ssemuladd_load, bdver1_ssemuladd, bdver1_sseimul_load,
      	bdver1_sseimul, bdver1_sseiadd_load, bdver1_sseiadd,
      	bdver1_ssediv_double_load_256, bdver1_ssediv_double_256,
      	bdver1_ssediv_single_load_256, bdver1_ssediv_single_256,
      	bdver1_ssediv_double_load, bdver1_ssediv_double,
      	bdver1_ssediv_single_load, bdver1_ssediv_single, bdver1_sseins):
      	Add "bdver2" attribute.
      
      From-SVN: r184440
      Quentin Neill committed
    • s390.c (s390_option_override): Make -mhard-dfp the default if possible and not specified otherwise. · 61369bb8
      2012-02-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
      
      	* config/s390/s390.c (s390_option_override): Make -mhard-dfp the
      	default if possible and not specified otherwise.
      
      From-SVN: r184439
      Andreas Krebbel committed
    • bf-ms-layout-3.c: Mark char typed bitfield as extension. · 333f1d87
              * gcc.dg/bf-ms-layout-3.c: Mark char typed bitfield
              as extension.
      
      From-SVN: r184437
      Kai Tietz committed
    • re PR middle-end/52314 (gimplifier produces volatile) · 0c2ad203
      2012-02-21  Richard Guenther  <rguenther@suse.de>
      
      	PR middle-end/52314
      	* gimplify.c (create_tmp_from_val): Use the main variant type
      	for the type of the temporary we create.
      
      From-SVN: r184436
      Richard Guenther committed
    • re PR tree-optimization/52324 (Store motion no longer performed) · 01718e96
      2012-02-21  Richard Guenther  <rguenther@suse.de>
      
      	PR tree-optimization/52324
      	* gimplify.c (gimplify_expr): When re-gimplifying expressions
      	do not gimplify a MEM_REF address operand if it is already
      	in suitable form.
      
      	* gcc.dg/tree-ssa/ssa-lim-10.c: New testcase.
      
      From-SVN: r184435
      Richard Guenther committed
    • re PR middle-end/51782 (-ftree-sra: Missing address-space information leads to wrong) · 305406d3
      	PR middle-end/51782
      	* gcc.target/avr/torture/pr51782-1.c: New test.
      
      From-SVN: r184434
      Georg-Johann Lay committed
    • s390.md ("fixuns_trunc<mode>si2"): Replace TARGET_HARD_FLOAT with TARGET_HARD_DFP. · 8540e6e8
      2012-02-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
      
      	* config/s390/s390.md ("fixuns_trunc<mode>si2"): Replace
      	TARGET_HARD_FLOAT with TARGET_HARD_DFP.
      
      From-SVN: r184433
      Andreas Krebbel committed
    • re PR libstdc++/52317 (incorrect FSF address) · 4bee90f7
      2012-02-21  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR libstdc++/52317
      	* python/Makefile.am: Update boilerplate license text to GPLv3.
      	* include/profile/unordered_map: Likewise.
      	* include/profile/set: Likewise.
      	* include/profile/base.h: Likewise.
      	* include/profile/impl/profiler_list_to_slist.h: Likewise.
      	* include/profile/impl/profiler_container_size.h: Likewise.
      	* include/profile/impl/profiler_vector_size.h: Likewise.
      	* include/profile/impl/profiler_hash_func.h: Likewise.
      	* include/profile/impl/profiler_trace.h: Likewise.
      	* include/profile/impl/profiler_list_to_vector.h: Likewise.
      	* include/profile/impl/profiler_vector_to_list.h: Likewise.
      	* include/profile/impl/profiler.h: Likewise.
      	* include/profile/impl/profiler_state.h: Likewise.
      	* include/profile/impl/profiler_map_to_unordered_map.h: Likewise.
      	* include/profile/impl/profiler_algos.h: Likewise.
      	* include/profile/impl/profiler_hashtable_size.h: Likewise.
      	* include/profile/impl/profiler_node.h: Likewise.
      	* include/profile/vector: Likewise.
      	* include/profile/unordered_set: Likewise.
      	* include/profile/map.h: Likewise.
      	* include/profile/map: Likewise.
      	* testsuite/21_strings/basic_string/numeric_conversions/
      	wchar_t/dr1261.cc: Likewise.
      	* testsuite/21_strings/basic_string/numeric_conversions/
      	char/dr1261.cc: Likewise.
      	* testsuite/20_util/reference_wrapper/invoke-2.cc: Likewise.
      
      From-SVN: r184430
      Paolo Carlini committed
    • tree-vect-stmts.c (vectorizable_load): Use pre-computed nested_in_vect_loop. · d1e4b493
      2012-02-21  Richard Guenther  <rguenther@suse.de>
      
      	* tree-vect-stmts.c (vectorizable_load): Use pre-computed
      	nested_in_vect_loop.
      
      From-SVN: r184429
      Richard Guenther committed
    • re PR tree-optimization/52318 (ICE: in execute_todo, at passes.c:1748 with -O3… · 949e47e5
      re PR tree-optimization/52318 (ICE: in execute_todo, at passes.c:1748 with -O3 -ftracer -fno-tree-ccp -fno-tree-copy-prop -fno-tree-dce and stpcpy_chk())
      
      	PR tree-optimization/52318
      	* gimple-fold.c (gimplify_and_update_call_from_tree): Add
      	vdef also to non-pure/const call stmts in the sequence.
      
      	* gcc.dg/pr52318.c: New test.
      
      From-SVN: r184428
      Jakub Jelinek committed
    • vms-ld.c (main): Fix IDENTIFICATION padding. · c2885517
      2012-02-21  Tristan Gingold  <gingold@adacore.com>
      
      	* config/vms/vms-ld.c (main): Fix IDENTIFICATION padding.
      
      From-SVN: r184426
      Tristan Gingold committed
    • Explain why we don't use RDPC for sparc PIC register setup. · 3ed27cf5
      	* config/sparc/sparc.md (load_pcrel_sym<P:mode>): Explain why we
      	don't use the "rd %pc" instruction on v9 for PIC register loads.
      
      From-SVN: r184422
      David S. Miller committed
    • Daily bump. · d1d7a85e
      From-SVN: r184421
      GCC Administrator committed
  3. 20 Feb, 2012 14 commits