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  1. 02 Aug, 2010 7 commits
    • re PR target/40457 (use stm and ldm to access consecutive memory words) · 37119410 
      	PR target/40457
	* config/arm/arm.h (arm_regs_in_sequence): Declare.
	* config/arm/arm-protos.h (emit_ldm_seq, emit_stm_seq,
	load_multiple_sequence, store_multiple_sequence): Delete
	declarations.
	(arm_gen_load_multiple, arm_gen_store_multiple): Adjust
	declarations.
	* config/arm/ldmstm.md: New file.
	* config/arm/arm.c (arm_regs_in_sequence): New array.
	(load_multiple_sequence): Now static.  New args SAVED_ORDER,
	CHECK_REGS.  All callers changed.
	If SAVED_ORDER is nonnull, copy the computed order into it.
	If CHECK_REGS is false, don't sort REGS.  Handle Thumb mode.
	(store_multiple_sequence): Now static.  New args NOPS_TOTAL,
	SAVED_ORDER, REG_RTXS and CHECK_REGS.  All callers changed.
	If SAVED_ORDER is nonnull, copy the computed order into it.
	If CHECK_REGS is false, don't sort REGS.  Set up REG_RTXS just
	like REGS.  Handle Thumb mode.
	(arm_gen_load_multiple_1): New function, broken out of
	arm_gen_load_multiple.
	(arm_gen_store_multiple_1): New function, broken out of
	arm_gen_store_multiple.
	(arm_gen_multiple_op): New function, with code from
	arm_gen_load_multiple and arm_gen_store_multiple moved here.
	(arm_gen_load_multiple, arm_gen_store_multiple): Now just
	wrappers around arm_gen_multiple_op.  Remove argument UP, all callers
	changed.
	(gen_ldm_seq, gen_stm_seq, gen_const_stm_seq): New functions.
	* config/arm/predicates.md (commutative_binary_operator): New.
	(load_multiple_operation, store_multiple_operation): Handle more
	variants of these patterns with different starting offsets.  Handle
	Thumb-1.
	* config/arm/arm.md: Include "ldmstm.md".
	(ldmsi_postinc4, ldmsi_postinc4_thumb1, ldmsi_postinc3, ldmsi_postinc2,
	ldmsi4, ldmsi3, ldmsi2, stmsi_postinc4, stmsi_postinc4_thumb1,
	stmsi_postinc3, stmsi_postinc2, stmsi4, stmsi3, stmsi2 and related
	peepholes): Delete.
	* config/arm/ldmstm.md: New file.
	* config/arm/arm-ldmstm.ml: New file.

testsuite/
	PR target/40457
	* gcc.target/arm/pr40457-1.c: New test.
	* gcc.target/arm/pr40457-2.c: New test.

From-SVN: r162815
      Bernd Schmidt committed
    • thumb2.md (thumb2_movdi, [...]): Delete patterns. · 0bd44ba2 
      	* config/arm/thumb2.md (thumb2_movdi, thumb2_movsf_soft_insn,
	thumb2_movdf_soft_insn): Delete patterns.
	* config/arm/arm.md (arm_pool_range, thumb2_pool_range,
	arm_neg_pool_range, thumb2_neg_pool_range): New attributes.
	(pool_range, neg_pool_range): Use them to define defaults.
	(movdi, arm_movsf_soft_insn, arm_movdf_soft_insn): Define them
	and allow for TARGET_32BIT.

From-SVN: r162814
      Bernd Schmidt committed
    • final.c (final_scan_insn): Call CC_STATUS_INIT unconditionally. · 906668bb 
      	* final.c (final_scan_insn): Call CC_STATUS_INIT unconditionally.
	* config/arm/arm.c (thumb1_code): New variable.
	(arm_override_options): Set it.
	(thumb1_final_prescan_insn): Keep track of condition code status.
	(arm_adjust_cost): For Thumb, try to keep cc-setting insns next to
	jumps that depend on them.
	* config/arm/arm.h (thumb1_code): Declare variable.
	(struct machine_function): Guard with #ifndef GENERATOR_FILE.  Add
	members thumb1_cc_insn, thumb1_cc_op0, thumb1_cc_op1 and
	thumb1_cc_mode.
	(CC_STATUS_INIT): New macro.
	* config/arm/constraints.md (Pd): New constraint.
	* config/arm/predicates.md (noov_comparison_operator): New predicate.
	* config/arm/arm.md (is_thumb1): New define_attr.
	(conds): Set default to "clob" when generating Thumb1 code.
	(thumb1_bicsi3): Renamed from bicsi3.  All uses changed.  Condition
	code are set.  Use two-operand assembly syntax.
	(thumb1_subsi3_insn): Condition codes are set.  Now a properly named
	pattern.
	(thumb1_andsi3_insn, thumb1_iorsi3_insn, thumb1_xorsi3_insn): Condition
	codes are set.  Use two-operand assembly syntax.
	(zero_extendhisi splitter): Remove constraints.
	(thumb1_movsi_insn, thumb1_movhi_insn, thumb1_movqi_insn, thumb1_movhf,
	thumb1_movsf_insn): Set conds attribute as appropriate.
	(cbranchsi4_insn): Use condition code status from struct
	machine_function to determine whether the comparison can be eliminated.
	Discourage the alternative using high registers.
	(movsi_cbranchsi4, andsi3_cbranch, orrsi3_cbranch_scratch,
	orrsi3_cbranch, xorsi3_cbranch_scratch, xorsi3_cbranch,
	bicsi3_cbranch_scratch, bicsi3_cbranch, subsi3_cbranch_scratch,
	subsi3_cbranch): Delete.
	(movsi_cbranchsi4 peepholes): Rewrite to generate a sequence of
	one subtract and one cbranch insn.

From-SVN: r162813
      Bernd Schmidt committed
    • postreload.c (reload_cse_simplify_operands): Take attribute enabled into account. · f37e278a 
      	* postreload.c (reload_cse_simplify_operands): Take attribute enabled
	into account.

From-SVN: r162812
      Bernd Schmidt committed
    • arm.c (COSTS_N_INSNS): Remove definition. · 0eeeef07 
      2010-08-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/arm.c (COSTS_N_INSNS): Remove definition.

From-SVN: r162811
      Ramana Radhakrishnan committed
    • Don't update the position flag for non-seekable files, check for stell() error. · 35713675 
      From-SVN: r162810
      Janne Blomqvist committed
    • Daily bump. · 0093ddee 
      From-SVN: r162809
      GCC Administrator committed
  3. 01 Aug, 2010 6 commits
  5. 31 Jul, 2010 10 commits
  7. 30 Jul, 2010 15 commits
  9. 29 Jul, 2010 2 commits