* gcc/config/i386/cygwin.h (STARTFILE_SPEC): Add vtv_start.o,
    if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw-w64.h (STARTFILE_SPEC): Likewise.
* gcc/config/i386/mingw32.h (STARTFILE_SPEC): Likewise.
* gcc/config/i386/cygwin.h (ENDFILE_SPEC): Add vtv_end.o,
    if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw32.h (ENDFILE_SPEC): Likewise.
* gcc/config/i386/cygwin.h (LIB_SPEC): Pass -lvtv and -lpsapi,
    if -fvtable-verify=preinit/std is used.
* gcc/config/i386/mingw-w64.h (LIB_SPEC): Likewise.
* gcc/config/i386/mingw32.h (LIB_SPEC): Likewise.

* gcc/cp/vtable-class-hierarchy.c (vtv_generate_init_routine): Add
    check for not TARGET_PECOFF at the VTV_PREINIT_PRIORITY checks.

* gcc/varasm.c (assemble_variable): Add code to properly set the comdat
    section and name for the .vtable_map_vars section in case the
    target is PE or COFF.


* libgcc/Makefile.in: Move rules to build vtv_*.o out of the check
    for CUSTOM_CRTSTUFF.
* libgcc/config.host (i[34567]86-*-cygwin*, x86_64-*-cygwin*, i[34567]86-*-mingw*)
    (x86_64-*-mingw*): Only add vtv_*.o to extra_parts if enable_vtable_verify.


* libstdc++-v3/acinclude.m4: Define VTV_CYGMIN.
* libstdc++-v3/configure: Regenerate.

* libstdc++-v3/libsupc++/Makefile.am: Add vtv_sources only to
    libsupc___la_SOURCES and libsupc__convenience_la_SOURCES if VTV_CYGMIN is
    not set.
* libstdc++-v3/libsupc++/Makefile.in: Regenerated.
* libstdc++-v3/libsupc++/vtv_stubs.cc: Add none weak declaration of every
    function for Cygwin and MinGW.

* libstdc++-v3/src/Makefile.am: Add libvtv.la to toolexeclib_LTLIBRARIES,
    if VTV_CYGMIN is set. Define libvtv_la_SOURCES, libvtv_la_LDFLAGS,
    libvtv_la_AM_CXXFLAGS and libvtv_la_LINK if VTV_CYGMIN is set.
* libstdc++-v3/src/Makefile.in: Regenerate.


* libvtv/Makefile.am : Add libvtv.la to toolexeclib_LTLIBRARIES, if VTV_CYGMIN
    is set. Define libvtv_la_LIBADD, libvtv_la_LDFLAGS, libvtv_stubs_la_LDFLAGS
    and libvtv_stubs_la_SOURCES if VTV_CYGMIN is set. Add obstac.c to
    libvtv_la_SOURCES if VTV_CYGMIN is set.
* libvtv/Makefile.in : Regenerate.
* libvtv/aclocal.m4 : Regenerate.
* libvtv/configure : Regenerate.
* libvtv/configure.ac : Add ACX_LT_HOST_FLAGS. Define VTV_CYGMIN.
* libvtv/configure.tgt : (x86_64-*-cygwin*, i?86-*-cygwin*, x86_64-*-mingw*)
    (i?86-*-mingw*): Add to supported targets.
* libvtv/vtv_fail.cc : Skip inclusion of execinfo.h on Cygwin and MinGW.
(log_error_message): Skip calls to backtrace and backtrace_symbols_fd on Cygwin
    and MinGW.
* libvtv/vtv_malloc.cc : Include windows.h and skip sys/mman.h inclusion on
    Cygwin and MinGW. Add sysconf port on Cygwin and MinGW.
(obstack_chunk_alloc): Exchange call to mmap with call to VirtualAlloc on Cygwin
    and MinGW.
(__vtv_malloc_init): Exchange call to sysconf with call to port of sysconf on
    Cygwin and MinGW.
* libvtv/vtv_malloc.h : Declare mprotect and define PROT_READ and PROT_WRITE on
    Cygwin and MinGW.
* libvtv/map.h : Include stdint.h on MinGW.
* libvtv/rts.cc : Include windows.h, winternl.h and psapi.h, skip include of
    execinfo.h, sys/mman.h and link.h on Cygwin and MinGW.
    Add port of __fortify_fail on Cygwin and MinGW.
    Change ElfW (Addr) to uintptr_t on Cygwin and MinGW.
(read_section_offset_and_length): Add port for Cygwin and MinGW
(iterate_modules): New function.
(vtv_unprotect_vtable_vars): Use iterate_modules instead of dl_iterate_phdr on
    Cygwin and MinGW.
(vtv_protect_vtable_vars): Likewise.
(count_all_pages): Likewise.
(dl_iterate_phdr_count_pages): Don't build on Cygwin and MinGW.
* libvtv/utils.cc : Include windows.h and skip execinfo.h inclusion on
    Cygwin and MinGW.
(__vtv_open_log): Exchange call to getuid and getpid with GetCurrentProcessId and
    adjust call to snprintf accordingly on Cygwin and MinGW.
    Adjust calls to mkdir on MinGW.
    Adjust call to open on Cygwin and MinGW.
(__vtv_add_to_log): Adjust call to snprintf on Cygwin and MinGW.
(__vtv_log_verification_failure): Don't generate a backtrace on Cygwin and MinGW.

From-SVN: r220232

	* config/rl78/cmpsi2.S: Use function start and end macros.
	(__gcc_bcmp): New function.
	* config/rl78/lshrsi3.S: Use function start and end macros.
	* config/rl78/mulsi3.S: Add support for G10.
	(__mulqi3): New function for G10.
	* config/rl78/signbit.S: Use function start and end macros.
	* config/rl78/t-rl78 (LIB2ADD): Add bit-count.S, fpbit-sf.S and
	fpmath-sf.S.
	(LIB2FUNCS_EXCLUDE): Define.
	(LIB2FUNCS_ST): Define.
	* config/rl78/trampoline.S: Use function start and end macros.
	* config/rl78/vregs.h (START_FUNC): New macro.
	(START_ANOTHER_FUNC): New macro.
	(END_FUNC): New macro.
	(END_ANOTHER_FUNC): New macro.
	* config/rl78/bit-count.S: New file.  Contains assembler
	implementations of the bit counting functions: ___clzhi2,
	__clzsi2, ctzhi2, ctzsi2, ffshi2, ffssi2, __partityhi2,
	__paritysi2, __popcounthi2 and __popcountsi2.
	* config/rl78/fpbit-sf.S: New file.  Contains assembler
	implementationas of the math functions: __negsf2, __cmpsf2,
	__eqsf2, __nesf2, __lesf2, __ltsf2, __gesf2, gtsf2, __unordsf2,
	__fixsfsi,  __fixunssfsi, __floatsisf and __floatunssisf.
	* config/rl78/fpmath-sf.S: New file.  Contains assembler
	implementations of the math functions: __subsf3, __addsf3,
	__mulsf3 and __divsf3

From-SVN: r220162

	gcc:
	* config/i386/sysv4.h (CRT_GET_RFIB_DATA): Remove.

	libgcc:
	* config.host (i[34567]86-*-solaris2*, x86_64-*-solaris2.1[0-9]*):
	Add i386/elf-lib.h to tm_file.
	* config/i386/elf-lib.h: Fix comment.
	* unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback) [__x86_64__
	&& __sun__ && __svr4__]: Remove workaround.

From-SVN: r220160

gcc/ChangeLog:

	* config/i386/i386.c (get_builtin_code_for_version): Add
	support for BMI and BMI2 multiversion functions.
	(fold_builtin_cpu): Add F_BMI and F_BMI2.

libgcc/ChangeLog:

	* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_BMI and
	FEATURE_BMI2.
	(get_available_features): Detect FEATURE_BMI and FEATURE_BMI2.

testsuite/ChangeLog:

	* gcc.target/i386/funcspec-5.c: Test new multiversion targets.
	* g++.dg/ext/mv17.C: Test BMI/BMI2 multiversion dispatcher.


Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r220095

gcc/

	* config/i386/driver-i386.c (host_detect_local_cpu): Check new
	Silvermont, Haswell, Broadwell and Knights Landing model numbers.
	* config/i386/i386.c (processor_model): Add
	M_INTEL_COREI7_BROADWELL.
	(arch_names_table): Add "broadwell".

gcc/testsuite/

	* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
	Silvermont, Ivy Bridge, Haswell and Broadwell tests.  Update Sandy
	Bridge test.

2015-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/cpuinfo.c (processor_subtypes): Add
	INTEL_COREI7_BROADWELL.
	(get_intel_cpu): Support new Silvermont, Haswell and Broadwell
	model numbers.

From-SVN: r220090

libgcc/ChangeLog:

	* config/i386/elf-lib.h: New file.
	(CRT_GET_RFIB_DATA): Move definition from gcc/config/i386/gnu-user.h.
	Wrap definition in #ifdef __i386__.
	* libgcc/config.host (i[34567]86-*-linux*, i[34567]86-*-kfreebsd*-gnu)
	(i[34567]86-*-knetbsd*-gnu, i[34567]86-*-gnu*)
	(i[34567]86-*-kopensolaris*-gnu, x86_64-*-linux*)
	(x86_64-*-kfreebsd*-gnu, x86_64-*-knetbsd*-gnu): Add i386/elf-lib.h
	to tm_file.

gcc/ChangeLog:

	* config/i386/gnu-user.h (CRT_GET_RFIB_DATA): Move definition to
	libgcc/config/i386/elf-lib.h.

From-SVN: r220056

unwind-dw2-fde.h (last_fde): Use "(const fde *)" instead of "(char *)" to avoid qualifier warning by 'xgcc'...

 	* unwind-dw2-fde.h (last_fde): Use "(const fde *)" instead of
 	"(char *)" to avoid qualifier warning by 'xgcc' compiling.

From-SVN: r220004

nios2.c (nios2_asm_file_end): Implement TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when needed.

2015-01-20  Chung-Lin Tang  <cltang@codesourcery.com>

	gcc/
	* config/nios2/nios2.c (nios2_asm_file_end): Implement
	TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when
	needed.
	(TARGET_ASM_FILE_END): Define.

	libgcc/
	* config/nios2/linux-unwind.h (nios2_fallback_frame_state):
	Update rt_sigframe format and address for current Nios II
	Linux conventions.

From-SVN: r219898

toplevel:

    * configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
    * configure: Regenerate.
gcc:
    * config.gcc (arm*-*-freebsd*): New configuration.
    * config/arm/freebsd.h: New file.
    * config.host: Add extra components for arm*-*-freebsd*.
    * config/arm/arm.h: Introduce MAX_SYNC_LIBFUNC_SIZE.
    * config/arm/arm.c (arm_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE.

libgcc:

    * config.host (arm*-*-freebsd*): Add new configuration for
    arm*-*-freebsd*.
    * config/arm/freebsd-atomic.c: New file.
    * config/arm/t-freebsd: Likewise.
    * config/arm/unwind-arm.h: Add __FreeBSD__ to the list of
    'PC-relative indirect' OS's.

libatomic:

    * configure.tgt: Exclude arm*-*-freebsd* from try_ifunc.

libstdc++-v3:

    * configure.host: Add arm*-*-freebsd* port_specific_symbol_files.

From-SVN: r219388

	* configure.ac: Add Visium support.
	* configure: Regenerate.
libgcc/
	* config.host: Add Visium support.
	* config/visium: New directory.
gcc/
	* config.gcc: Add Visium support.
	* configure.ac: Likewise.
	* configure: Regenerate.
	* doc/extend.texi (interrupt attribute): Add Visium.
	* doc/invoke.texi: Document Visium options.
	* doc/install.texi: Document Visium target.
	* doc/md.texi: Document Visium constraints.
	* common/config/visium: New directory.
	* config/visium: Likewise.
gcc/testsuite/
	* lib/target-supports.exp (check_profiling_available): Return 0 for
	Visium.
	(check_effective_target_tls_runtime): Likewise.
	(check_effective_target_logical_op_short_circuit): Return 1 for Visium.
	* gcc.dg/20020312-2.c: Adjust for Visium.
	* gcc.dg/tls/thr-cse-1.c: Likewise
	* gcc.dg/tree-ssa/20040204-1.c: Likewise
	* gcc.dg/tree-ssa/loop-1.c: Likewise.
	* gcc.dg/weak/typeof-2.c: Likewise.

From-SVN: r219219

From-SVN: r219188

gcc/

	* config.gcc: Add mipsisa64r6 and mipsisa32r6 cpu support.
	* config/mips/constraints.md (ZD): Add r6 restrictions.
	* config/mips/gnu-user.h (DRIVER_SELF_SPECS): Add MIPS_ISA_LEVEL_SPEC.
	* config/mips/loongson.md
	(<u>div<mode>3, <u>mod<mode>3): Move to mips.md.
	* config/mips/mips-cpus.def (mips32r6, mips64r6): Define.
	* config/mips/mips-modes.def (CCF): New mode.
	* config/mips/mips-protos.h
	(mips_9bit_offset_address_p): New prototype.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (MIPS_JR): Use JALR $, <reg> for R6.
	(mips_rtx_cost_data): Add pseudo-processors W32 and W64.
	(mips_9bit_offset_address_p): New function.
	(mips_rtx_costs): Account for R6 multiply and FMA instructions.
	(mips_emit_compare): Implement R6 FPU comparisons.
	(mips_expand_conditional_move): Implement R6 selects.
	(mips_expand_conditional_trap): Account for removed trap immediate.
	(mips_expand_block_move): Disable inline move when LWL/LWR are removed.
	(mips_print_float_branch_condition): Update for R6 FPU branches.
	(mips_print_operand): Handle CCF mode compares.
	(mips_interrupt_extra_call_saved_reg_p): Do not attempt to callee-save
	MD_REGS for R6.
	(mips_hard_regno_mode_ok_p): Support CCF mode.
	(mips_mode_ok_for_mov_fmt_p): Likewise.
	(mips_secondary_reload_class): CCFmode can be loaded directly.
	(mips_set_fast_mult_zero_zero_p): Account for R6 multiply instructions.
	(mips_option_override): Ensure R6 is used with fp64.  Set default
	mips_nan modes.  Check for mips_nan support.  Prevent DSP with R6.
	(mips_conditional_register_usage): Disable MD_REGS for R6. Disable
	FPSW for R6.
	(mips_mulsidi3_gen_fn): Support R6 multiply instructions.
	* config/mips/mips.h (ISA_MIPS32R6, ISA_MIPS64R6): Define.
	(TARGET_CPU_CPP_BUILTINS): Rework for mips32/mips64.
	(ISA_HAS_JR): New macro.
	(ISA_HAS_HILO): New macro.
	(ISA_HAS_R6MUL): Likewise.
	(ISA_HAS_R6DMUL): Likewise.
	(ISA_HAS_R6DIV): Likewise.
	(ISA_HAS_R6DDIV): Likewise.
	(ISA_HAS_CCF): Likewise.
	(ISA_HAS_SEL): Likewise.
	(ISA_HAS_COND_TRAPI): Likewise.
	(ISA_HAS_FP_MADDF_MSUBF): Likewise.
	(ISA_HAS_LWL_LWR): Likewise.
	(ISA_HAS_IEEE_754_LEGACY): Likewise.
	(ISA_HAS_IEEE_754_2008): Likewise.
	(ISA_HAS_PREFETCH_9BIT): Likewise.
	(MIPSR6_9BIT_OFFSET_P): New macro.
	(BASE_DRIVER_SELF_SPECS): Use MIPS_ISA_DRIVER_SELF_SPECS.
	(DRIVER_SELF_SPECS): Use MIPS_ISA_LEVEL_SPEC.
	(MULTILIB_ISA_DEFAULT): Handle mips32r6 and mips64r6.
	(MIPS_ISA_LEVEL_SPEC): Likewise.
	(MIPS_ISA_SYNCI_SPEC): Likewise.
	(ISA_HAS_64BIT_REGS): Likewise.
	(ISA_HAS_BRANCHLIKELY): Likewise.
	(ISA_HAS_MUL3): Likewise.
	(ISA_HAS_DMULT): Likewise.
	(ISA_HAS_DDIV): Likewise.
	(ISA_HAS_DIV): Likewise.
	(ISA_HAS_MULT): Likewise.
	(ISA_HAS_FP_CONDMOVE): Likewise.
	(ISA_HAS_8CC): Likewise.
	(ISA_HAS_FP4): Likewise.
	(ISA_HAS_PAIRED_SINGLE): Likewise.
	(ISA_HAS_MADD_MSUB): Likewise.
	(ISA_HAS_FP_RECIP_RSQRT): Likewise.
	* config/mips/mips.md (processor): Add w32 and w64.
	(FPCC): New mode iterator.
	(reg): Add CCF mode.
	(fpcmp): New mode attribute.
	(fcond): Add ordered, ltgt and ne codes.
	(fcond): Update code attribute.
	(sel): New code attribute.
	(selinv): Likewise.
	(ctrap<mode>4): Update condition.
	(*conditional_trap_reg<mode>): New define_insn.
	(*conditional_trap<mode>): Update condition.
	(mul<mode>3): Expand R6 multiply instructions.
	(<su>mulsi3_highpart): Likewise.
	(<su>muldi3_highpart): Likewise.
	(mul<mode>3_mul3_loongson): Rename...
	(mul<mode>3_mul3_hilo): To this.  Add R6 mul instruction.
	(<u>mulsidi3_32bit_r6): New expander.
	(<u>mulsidi3_32bit): Restrict to pre-r6 multiplies.
	(<u>mulsidi3_32bit_r4000): Likewise.
	(<u>mulsidi3_64bit): Likewise.
	(<su>mulsi3_highpart_internal): Likewise.
	(mulsidi3_64bit_r6dmul): New instruction.
	(<su>mulsi3_highpart_r6): Likewise.
	(<su>muldi3_highpart_r6): Likewise.
	(fma<mode>4): Likewise.
	(movccf): Likewise.
	(*sel<code><GPR:mode>_using_<GPR2:mode>): Likewise.
	(*sel<mode>): Likewise.
	(<u>div<mode>3): Moved from loongson.md.  Add R6 instructions.
	(<u>mod<mode>3): Likewise.
	(extvmisalign<mode>): Require ISA_HAS_LWL_LWR.
	(extzvmisalign<mode>): Likewise.
	(insvmisalign<mode>): Likewise.
	(mips_cache): Account for R6 displacement field sizes.
	(*branch_fp): Rename...
	(*branch_fp_<mode>): To this.  Add CCFmode support.
	(*branch_fp_inverted): Rename...
	(*branch_fp_inverted_<mode>): To this.  Add CCFmode support.
	(s<code>_<mode>): Rename...
	(s<code>_<SCALARF:mode>_using_<FPCC:mode>): To this.  Add FCCmode
	condition support.
	(s<code>_<mode> swapped): Rename...
	(s<code>_<SCALARF:mode>_using_<FPCC:mode> swapped): To this. Add
	CCFmode condition support.
	(mov<mode>cc GPR): Expand R6 selects.
	(mov<mode>cc FPR): Expand R6 selects.
	(*tls_get_tp_<mode>_split): Do not .set push for >= mips32r2.
	* config/mips/netbsd.h (TARGET_CPU_CPP_BUILTINS): Update similarly to
	mips.h.
	(ASM_SPEC): Add mips32r6, mips64r6.
	* config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Update
	for mips32r6/mips64r6.
	* doc/invoke.texi: Document -mips32r6,-mips64r6.
	* doc/md.texi: Update comment for ZD constraint.

libgcc/

	* config.host: Support mipsisa32r6 and mipsisa64r6.
	* config/mips/mips16.S: Do not build for R6.

gcc/testsuite/

	* gcc.dg/torture/mips-hilo-2.c: Unconditionally pass for R6 onwards.
	* gcc.dg/torture/pr19683-1.c: Likewise.
	* gcc.target/mips/branch-cost-2.c: Require MOVN.
	* gcc.target/mips/movcc-1.c: Likewise.
	* gcc.target/mips/movcc-2.c: Likewise.
	* gcc.target/mips/movcc-3.c: Likewise.
	* gcc.target/mips/call-saved-4.c: Require LDC.
	* gcc.target/mips/dmult-1.c: Require R5 or earlier.
	* gcc.target/mips/fpcmp-1.c: Likewise.
	* gcc.target/mips/fpcmp-2.c: Likewise.
	* gcc.target/mips/neg-abs-2.c: Likewise.
	* gcc.target/mips/timode-1.c: Likewise.
	* gcc.target/mips/unaligned-1.c: Likewise.
	* gcc.target/mips/madd-3.c: Require MADD.
	* gcc.target/mips/madd-9.c: Likewise.
	* gcc.target/mips/maddu-3.c: Likewise.
	* gcc.target/mips/msub-3.c: Likewise.
	* gcc.target/mips/msubu-3.c: Likewise.
	* gcc.target/mips/mult-1.c: Require INS and not DMUL.
	* gcc.target/mips/mips-ps-type-2.c: Require MADD.PS.
	* gcc.target/mips/mips.exp (mips_option_groups): Add ins, dmul, ldc,
	movn, madd, maddps.
	(mips-dg-options): INS available from R2.  LDC available from MIPS II,
	DMUL is present in octeon.  Describe all features removed from R6.

Co-Authored-By: Steve Ellcey <sellcey@imgtec.com>

From-SVN: r218973

libgcc/
	* config/sh/crt.h: New.
	* config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini
	symbols.
	* config/sh/crt1.S: Likewise.

From-SVN: r218807

re PR libgcc/63832 (crtstuff.c:400:19: warning: array subscript is above array bounds [-Warray-bounds])

	PR libgcc/63832
	* crtstuff.c (__do_global_dtors_aux) [HIDDEN_DTOR_LIST_END]: Use
	func_ptr *dtor_list temporary variable to avoid "array subscript
	is above array bounds" warnings.

From-SVN: r218759

From-SVN: r218608

From-SVN: r218542

From-SVN: r218541

2014-12-09  Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com>

        (libgcc_s) Optional filename-based shared library versioning on AIX.
        * gcc/doc/install.texi: Describe --with-aix-soname option.
        * Makefile.in (with_aix_soname): Define.
        * config/rs6000/t-slibgcc-aix: Act upon --with-aix-soname option.
        * configure.ac: Accept --with-aix-soname=aix|svr4|both option.
        * configure: Recreate.

From-SVN: r218539

2014-12-05  Olivier Hainque  <hainque@adacore.com>

        gcc/
        * defaults.h: (DWARF_REG_TO_UNWIND_COLUMN): Define default.
        * dwarf2cfi.c (init_one_dwarf_reg_size): Honor
        DWARF_REG_TO_UNWIND_COLUMN.

        libgcc/
        * unwind-dw2.c (DWARF_REG_TO_UNWIND_COLUMN): Remove default def,
        now provided by defaults.h.

From-SVN: r218429

libgcc/
	* config/sh/lib1funcs.S: Check value of __SHMEDIA__ instead of checking
	whether it's defined.

From-SVN: r218190

gcc/

        * config/i386/cpuid.h (bit_MPX, bit_BNDREGS, bit_BNDCSR):
        Define.
        * config/i386/i386.c (get_builtin_code_for_version): Add avx512f.
        (fold_builtin_cpu): Ditto.
        * doc/extend.texi: Documment it.



gcc/testsuite/

        * g++.dg/ext/mv2.C: Add test for target ("avx512f").
        * gcc.target/i386/builtin_target.c: Ditto.



libgcc/

        * config/i386/cpuinfo.c (processor_features): Add FEATURE_AVX512F.
        * config/i386/cpuinfo.c (get_available_features): Detect it.

From-SVN: r218125

lib1funcs.S (FUNC_START): Add conditional section redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.

2014-11-27  Tony Wang  <tony.wang@arm.com>

    libgcc/
    * config/arm/lib1funcs.S (FUNC_START): Add conditional section
    redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
    (SYM_END, ARM_SYM_START): Add macros used to expose function Symbols.

From-SVN: r218124

libgcc/
	* crtstuff.c (__do_glbal_ctors_1): Add missing semicolon.

From-SVN: r218055

	* config/pa/linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap()
	instead.

From-SVN: r218033

	* config/pa/linux-atomic.c (__kernel_cmpxchg2): New.
	(FETCH_AND_OP_2): New.  Use for subword and double word operations.
	(OP_AND_FETCH_2): Likewise.
	(COMPARE_AND_SWAP_2): Likewise.
	(SYNC_LOCK_TEST_AND_SET_2): Likewise.
	(SYNC_LOCK_RELEASE_2): Likewise.
	(SUBWORD_SYNC_OP): Remove.
	(SUBWORD_VAL_CAS): Likewise.
	(SUBWORD_BOOL_CAS): Likewise.
	(FETCH_AND_OP_WORD): Update.
	Consistently use signed types.
	

Co-Authored-By: John David Anglin <danglin@gcc.gnu.org>

From-SVN: r217956

	* configure: Regenerate.
	* configure.ac (--enable-as-accelerator-for)
	(--enable-offload-targets): New configure options.
gcc/
	* Makefile.in (real_target_noncanonical, accel_dir_suffix)
	(enable_as_accelerator): New variables substituted by configure.
	(libsubdir, libexecsubdir, unlibsubdir): Tweak for the possibility of
	being configured as an offload compiler.
	(DRIVER_DEFINES): Pass new defines DEFAULT_REAL_TARGET_MACHINE and
	ACCEL_DIR_SUFFIX.
	(install-cpp, install-common, install_driver, install-gcc-ar): Do not
	install for the offload compiler.
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac (real_target_noncanonical, accel_dir_suffix)
	(enable_as_accelerator): Compute new variables.
	(ACCEL_COMPILER): Define if the compiler is built as the accel compiler.
	(OFFLOAD_TARGETS): List of target names suitable for offloading.
	(ENABLE_OFFLOADING): Define if list of offload targets is not empty.
gcc/cp/
	* Make-lang.in (c++.install-common): Do not install for the offload
	compiler.
gcc/doc/
	* install.texi (Options specification): Document
	--enable-as-accelerator-for and --enable-offload-targets.
gcc/fortran/
	* Make-lang.in (fortran.install-common): Do not install for the offload
	compiler.
libgcc/
	* Makefile.in (crtoffloadbegin$(objext)): New rule.
	(crtoffloadend$(objext)): Likewise.
	* configure: Regenerate.
	* configure.ac (accel_dir_suffix): Compute new variable.
	(extra_parts): Add crtoffloadbegin.o and crtoffloadend.o
	if enable_offload_targets is not empty.
	* offloadstuff.c: New file.
libgomp/
	* config.h.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Check for libdl, required for plugin support.
	(PLUGIN_SUPPORT): Define if plugins are supported.
	(enable_offload_targets): Support Intel MIC targets.
	(OFFLOAD_TARGETS): List of target names suitable for offloading.
lto-plugin/
	* Makefile.am (libexecsubdir): Tweak for the possibility of being
	configured for offload compiler.
	(accel_dir_suffix, real_target_noncanonical): New variables substituted
	by configure.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* configure.ac (accel_dir_suffix, real_target_noncanonical): Compute new
	variables.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>

From-SVN: r217485

	* config/rl78/divmodhi.S: Add support for the G10 architecture.
	Use START_FUNC and END_FUNC macros to enable linker garbage
	collection.
	* config/rl78/divmodqi.S: Likewise.
	* config/rl78/divmodsi.S: Likewise.
	* config/rl78/mulsi3.S: Likewise.
	* config/rl78/lib2div.c: Remove G10 functions.
	* config/rl78/lib2muls.c: Likewise.
	* config/rl78/t-rl8 (HOST_LIBGCC2_CFLAGS): Define.
	* config/rl78/vregs.h (START_FUNC): New macro.
	(END_FUNC): New macro.

From-SVN: r217463

2014-11-12  Matthew Fortune  <matthew.fortune@imgtec.com>

gcc/
	* common/config/mips/mips-common.c (mips_handle_option): Ensure
	that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64.
	* config.gcc (--with-fp-32): New option.
	(--with-odd-spreg-32): Likewise.
	* config.in (HAVE_AS_DOT_MODULE): New config define.
	* config/mips/mips-protos.h
	(mips_secondary_memory_needed): New prototype.
	(mips_hard_regno_caller_save_mode): Likewise.
	* config/mips/mips.c (mips_get_reg_raw_mode): New static prototype.
	(mips_get_arg_info): Assert that V2SFmode is only handled specially
	with TARGET_PAIRED_SINGLE_FLOAT.
	(mips_return_mode_in_fpr_p): Likewise.
	(mips16_call_stub_mode_suffix): Likewise.
	(mips_get_reg_raw_mode): New static function.
	(mips_return_fpr_pair): O32 return values span two registers.
	(mips16_build_call_stub): Likewise.
	(mips_function_value_regno_p): Support both FP return registers.
	(mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1.  Add
	specific cases for TARGET_FPXX to move via memory.
	(mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger
	than UNITS_PER_FPREG 'span' one register.
	(mips_dwarf_frame_reg_mode): New static function.
	(mips_file_start): Switch to using .module instead of .gnu_attribute.
	No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6.
	Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg).
	(mips_save_reg, mips_restore_reg): Always represent DFmode frame
	slots with two CFI directives even for O32 FP64.
	(mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when
	saving/restoring callee-saved registers.
	(mips_hard_regno_mode_ok_p): Implement O32 FP64A extension.
	(mips_secondary_memory_needed): New function.
	(mips_option_override): ABI check for TARGET_FLOATXX.  Disable
	odd-numbered single-precision registers	when using TARGET_FLOATXX.
	Implement -modd-spreg and defaults.
	(mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32
	callee-saved behaviour.
	(mips_hard_regno_caller_save_mode): Implement.
	(TARGET_GET_RAW_RESULT_MODE): Define target hook.
	(TARGET_GET_RAW_ARG_MODE): Define target hook.
	(TARGET_DWARF_FRAME_REG_MODE): Define target hook.
	* config/mips/mips.h (TARGET_FLOAT32): New macro.
	(TARGET_O32_FP64A_ABI): Likewise.
	(TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add
	_MIPS_SPFPSET builtin define.
	(MIPS_FPXX_OPTION_SPEC): New macro.
	(OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and
	--with-odd-spreg-32=* to -m[no-]odd-spreg.
	(ISA_HAS_ODD_SPREG): New macro.
	(ISA_HAS_MXHC1): True for anything other than -mfp32.
	(ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg.
	(MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG.
	(HARD_REGNO_CALLER_SAVE_MODE): Define.  Implement O32 FPXX extension
	(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
	(SECONDARY_MEMORY_NEEDED): Likewise.
	(FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions.
	* config/mips/mips.md (define_attr enabled): Implement O32 FPXX and
	FP64A ABI extensions.
	(move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of
	TARGET_FLOAT64.
	* config/mips/mips.opt (mfpxx): New target option.
	(modd-spreg): Likewise.
	* config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch.
	* config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove
	fp64 sysroot.
	* config/mips/t-mti-elf: Remove fp64 multilib.
	* config/mips/t-mti-linux: Likewise.
	* configure.ac: Detect .module support.
	* configure: Regenerate.
	* doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option.
	* doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new
	options.

gcc/testsuite/
	* gcc.target/mips/args-1.c: Handle __mips_fpr == 0.
	* gcc.target/mips/call-clobbered-1.c: New.
	* gcc.target/mips/call-clobbered-2.c: New.
	* gcc.target/mips/call-clobbered-3.c: New.
	* gcc.target/mips/call-clobbered-4.c: New.
	* gcc.target/mips/call-clobbered-5.c: New.
	* gcc.target/mips/call-saved-4.c: New.
	* gcc.target/mips/call-saved-5.c: New.
	* gcc.target/mips/call-saved-6.c: New.
	* gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*,
	and -m[no-]odd-spreg.  Use _MIPS_SPFPSET to determine default
	odd-spreg option.  Account for -modd-spreg in minimum arch code.
	* gcc.target/mips/movdf-1.c: New.
	* gcc.target/mips/movdf-2.c: New.
	* gcc.target/mips/movdf-3.c: New.
	* gcc.target/mips/oddspreg-1.c: New.
	* gcc.target/mips/oddspreg-2.c: New.
	* gcc.target/mips/oddspreg-3.c: New.
	* gcc.target/mips/oddspreg-4.c: New.
	* gcc.target/mips/oddspreg-5.c: New.
	* gcc.target/mips/oddspreg-6.c: New.

libgcc/
	* config/mips/mips16.S: Set .module when supported.  Update O32
	FP64 calling convention and use for FPXX when possible.  Add FPXX
	calling convention fallback case.

From-SVN: r217446

	* configure.ac: Handle nvptx-*-*.
	* configure: Regenerate.

	gcc/
	* config/nvptx/nvptx.c: New file.
	* config/nvptx/nvptx.h: New file.
	* config/nvptx/nvptx-protos.h: New file.
	* config/nvptx/nvptx.md: New file.
	* config/nvptx/t-nvptx: New file.
	* config/nvptx/nvptx.opt: New file.
	* common/config/nvptx/nvptx-common.c: New file.
	* config.gcc: Handle nvptx-*-*.

	libgcc/
	* config.host: Handle nvptx-*-*.
	* shared-object.mk (as-flags-$o): Define.
	($(base)$(objext), $(base)_s$(objext)): Use it instead of
	-xassembler-with-cpp.
	* static-object.mk: Identical changes.
	* config/nvptx/t-nvptx: New file.
	* config/nvptx/crt0.s: New file.
	* config/nvptx/free.asm: New file.
	* config/nvptx/malloc.asm: New file.
	* config/nvptx/realloc.c: New file.

From-SVN: r217295

Continuing preparations for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for powerpc*-*-linux* soft-float and
e500, this patch makes soft-fp symbols used for those targets into
compat symbols when building with glibc >= 2.19, so that they are only
in shared libgcc for existing binaries requiring them, not in static
libgcc and not available for new links using shared libgcc.  Instead,
new links will get the symbols from libc, which has exported all of
them since 2.19.  (Actually all the symbols were exported from glibc
since 2.4, but some of them were exported by glibc as compat symbols
only - because of a confusion between deliberately present soft-fp
symbols and old accidental reexports of libgcc functions from glibc
2.0 - until 2.19.)

This allows user floating-point arithmetic to interoperate properly
with the state handled by <fenv.h> functions, whether software state
(for soft-float; TLS variables that don't form a public part of
glibc's ABI, so can only be accessed directly by functions within
glibc) or hardware state (for e500 - the copies of the soft-fp
functions in glibc being built to interoperate with the hardware state
whereas those in libgcc aren't).  Previously only glibc's own
functions, and those operations done in hardware on e500, properly
worked with that state, not direct floating-point arithmetic
operations that were implemented in software.

The intended next step is the actual TARGET_ATOMIC_ASSIGN_EXPAND_FENV
implementation.

The test of glibc >= 2.19 uses the same --with-glibc-version configure
option as in the gcc/ directory (but differently implemented; in gcc/
the fallback is to examine headers to find the version, while in
libgcc/ we can use compile for the target and so use AC_COMPUTE_INT).
The TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation will also only do
anything for glibc >= 2.19, as it will depend on generating calls to
functions __atomic_feholdexcept __atomic_feclearexcept
__atomic_feupdateenv that were added in 2.19 for that purpose (even
for e500, inline code is not readily possible because of the need to
make prctl syscalls from the implementation of these functions).

In order to make symbols compat symbols, the soft-fp files need
wrapping with generated wrappers including asm .symver directives,
which need to name the symbol version in question.  This is extracted
by an awk script from an intermediate stage of generating the .map
file for linking libgcc (that .map itself depends on the objects that
go into the library, so can't be used for this purpose as that would
mean a circular dependency); the extraction is not fully general
regarding the features available in .map generation, but suffices for
the present purpose.

It would make sense for hardfp.c symbols to be compat symbols as well
(in the cases where hardfp.c gets used, the functions in question
should not be used for new links), but this isn't required for the
present purpose, which is only concerned with ensuring that where
functions that should be affected by rounding modes or exceptions get
used, those functions are actually affected by those rounding modes or
exceptions.

Tested with no regressions with cross to powerpc-linux-gnu
(soft-float); c11-atomic-exec-5.c moves from UNSUPPORTED to FAIL, as
expected, now that floating-point arithmetic in user programs uses the
same state as <fenv.h> functions, so the fenv_exceptions test passes,
but TARGET_ATOMIC_ASSIGN_EXPAND_FENV isn't yet implemented.  (For
e500, c11-atomic-exec-5.c was already FAILing, as enough operations
worked with the hardware state for the fenv_exceptions effective
target test to pass.)  Also verified that the exported symbols and
versions are unchanged, with the expected symbols becoming compat
symbols at the same versions, and that with --with-glibc-version=2.18
the symbols remain normal rather than compat symbols.

	* Makefile.in (libgcc.map.in): New target.
	(libgcc.map): Use libgcc.map.in.
	* config/t-softfp (softfp_compat): New variable to be set by
	users.
	[$(softfp_compat) = y] (softfp_map_dep, softfp_set_symver): New
	variables.
	[$(softfp_compat) = y] (softfp_file_list): Use files in the build
	directory.
	[$(softfp_compat) = y] ($(softfp_file_list)): Generate wrappers
	that use compat symbols and disable all code unless [SHARED].
	* config/t-softfp-compat: New file.
	* find-symver.awk: New file.
	* configure.ac (--with-glibc-version): New configure option.
	(ppc_fp_compat): New variable set for powerpc*-*-linux*.
	* configure: Regenerate.
	* config.host (powerpc*-*-linux*): Use ${ppc_fp_compat} for
	soft-float and e500.

From-SVN: r216942

Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the e500 cases.

For e500v2, use of hardfp is generally right, except that calls to
__unordsf2 and __unorddf2 are actually generated by GCC from
__builtin_isunordered and so they need to be implemented with soft-fp
to avoid recursively calling themselves.  For e500v1, hardfp is right
for SFmode (except for __unordsf2) but soft-fp for DFmode (and when
using soft-fp, as usual it's best for the conversions between DFmode
and integers all to come directly from soft-fp rather than some coming
from libgcc2.c).  Thus, new variables hardfp_exclusions and
softfp_extras are added that configurations using t-hardfp and
t-softfp can use to achieve the desired effect of selectively mixing
the two sources of functions.

Tested with no regressions for crosses to powerpc-linux-gnuspe (both
e500v1 and e500v2); also checked that the same set of symbols and
versions is exported from shared libgcc before and after the patch.

	* config/t-hardfp (hardfp_exclusions): Document new variable for
	user to define.
	(hardfp_func_list): Exclude functions from $(hardfp_exclusions).
	* config/t-softfp (softfp_extras): Document new variable for user
	to define.
	(softfp_func_list): Add functions from $(softfp_extras).
	* config/rs6000/t-e500v1-fp, config/rs6000/t-e500v2-fp: New files.
	* config.host (powerpc*-*-linux*): For e500v1, use
	rs6000/t-e500v1-fp and t-hardfp; do not use t-softfp-sfdf and
	t-softfp-excl.  For e500v2, use t-hardfp-sfdf, rs6000/t-e500v2-fp
	and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl.

From-SVN: r216835

	* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
	(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
	memory read accesses are ok.

From-SVN: r216716

Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the 32-bit
classic hard-float and soft-float cases.  (e500 will be dealt with in
a separate patch which will need to add new features to t-hardfp and
t-softfp; this patch keeps the status quo for e500.)

For hard-float, while the functions in question are part of the libgcc
ABI there is no need for them to contain software floating point code:
no newly built code should use them, and if anything does use them
it's most efficient (space and speed) for them to pass straight
through to floating-point hardware instructions; this case is made to
use t-hardfp to achieve that.  For soft-float, direct use of soft-fp
functions for operations involving DImode or unsigned integers is more
efficient than using the libgcc2.c versions of those operations to
convert to operations on other types (which then end up calling
soft-fp functions for those other types, possibly more than once);
this case is thus stopped from using t-softfp-excl.  (A future patch
will stop the e500 cases from using t-softfp-excl as well.)

Tested with no regressions for crosses to powerpc-linux-gnu (soft
float and classic hard float); also checked that the same set of
symbols and versions is exported from shared libgcc before and after
the patch.

	* configure.ac (ppc_fp_type): Set variable on powerpc*-*-linux*.
	* configure: Regenerate.
	* config.host (powerpc*-*-linux*): Use $ppc_fp_type to determine
	additions to tmake_file.  Use t-hardfp-sfdf and t-hardfp instead
	of soft-fp for 32-bit classic hard float.  Do not use
	t-softfp-excl for soft float.

From-SVN: r216687

When I added support for using soft-fp in libgcc
<https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00689.html>, libgcc
configuration was still done in the gcc/ directory, meaning that the
variables set in makefile fragments could not depend on the multilib
being built.  Thus, building the soft-fp code for powerpc64-linux-gnu
was disabled in the same way as had been done with fp-bit: the code
was built, but with #ifndef __powerpc64__ wrappers around it so that
the resulting objects were empty.

Now that libgcc configuration is done in the toplevel libgcc
directory, such uses of softfp_wrap_start / softfp_wrap_end are better
replaced by configure-time conditionals that determine whether to use
soft-fp for a given multilib.  This patch does so for
powerpc*-*-linux*.  The same would appear to apply to
powerpc*-*-freebsd* (using rs6000/t-freebsd64), but I have not made
any changes there.  t-ppc64-fp is also used by AIX targets, but they
don't use soft-fp anyway so the changes are of no consequence to them.

The same principle of replacing softfp_wrap_start / softfp_wrap_end
with configure-time conditionals also applies to
softfp_exclude_libgcc2, which was intended for cases where soft-fp is
being used on hard-float multilibs and so it is desirable on those
multilibs for a few functions to come from libgcc2.c rather than
soft-fp (but the soft-fp versions would be more efficient on
soft-float multilibs).  Now we have hardfp.c and t-hardfp, those are
better to use in that case, to minimize the size of the bulk of the
functions that are only present for ABI compatibility and should never
be called by newly compiled code.

I intend followup patches to switch 32-bit hard-float multilibs to use
t-hardfp as far as possible (for all non-libgcc2.c operations for
classic hard float; for all except __unord* for e500v2; for all SFmode
operations except __unordsf2 for e500v1).  After that will come making
the soft-fp operations, in the remaining cases for which they are
built because they are actually needed for code compiled by current
GCC, into compat symbols when building for glibc 2.19 or later, so
that the glibc versions (with exception and rounding mode support) get
used instead (2.19 or later is needed for all the functions to be
exported from glibc as non-compat symbols).  In turn, that is required
before implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float
and e500, as that can only be properly effective when GCC-compiled
code is actually interoperating correctly with the exception and
rounding mode state used by <fenv.h> functions.

Tested with no regressions with cross to powerpc64-linux-gnu (in
addition, verified that stripped libgcc_s.so.1 is identical before and
after the patch).

	* config.host (powerpc*-*-linux*): Only use soft-fp for 32-bit
	configurations.
	* config/rs6000/t-ppc64-fp (softfp_wrap_start, softfp_wrap_end):
	Remove variables.

From-SVN: r216564

	* config/avr/lib1funcs.S (__do_global_dtors): Fix wrong code
	introduced with 2014-10-21 trunk r216525.

From-SVN: r216550

gcc:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>
	    Vidya Praveen <vidya.praveen@atmel.com>
	    Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
	    Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
	    Pitchumani Sivanupandi <Pitchumani.S@atmel.com>

	* config/avr/avr-c.c (avr_cpu_cpp_builtins): Don't define
	__MEMX for avrtiny.
	* config/avr/avr.c (avr_insert_attributes): Reject __memx for avrtiny.
	(avr_nonconst_pointer_addrspace): Likewise.
	* config/avr/avr.h (AVR_HAVE_LPM): Define.

	Added AVRTINY architecture to avr target.
	* config/avr/avr-arch.h (avr_arch): Added AVRTINY architecture.
	(base_arch_s): member added for AVRTINY architecture.
	* config/avr/avr.c: Added TINY_ADIW, TINY_SBIW macros as AVRTINY
	alternate for adiw/sbiw instructions. Added AVR_TMP_REGNO and
	AVR_ZERO_REGNO macros for tmp and zero registers. Replaced TMP_REGNO
	and ZERO_REGNO occurrences by AVR_TMP_REGNO and AVR_ZERO_REGNO
	respectively. LAST_CALLEE_SAVED_REG macro added for the last register
	in callee saved register list.
	(avr_option_override): CCP address updated for AVRTINY.
	(avr_init_expanders): tmp and zero rtx initialized as per arch.
	Reset avr_have_dimode if AVRTINY.
	(sequent_regs_live): Use LAST_CALLEE_SAVED_REG instead magic number.
	(emit_push_sfr): Use AVR_TMP_REGNO for tmp register number.
	(avr_prologue_setup_frame): Don't minimize prologue if AVRTINY.
	Use LAST_CALLEE_SAVED_REG to refer last callee saved register.
	(expand_epilogue): Likewise.
	(avr_print_operand): Print CCP address in case of AVRTINY also.
	<TBD>bad address
	(function_arg_regno_p): Check different register list for arguments
	if AVRTINY.
	(init_cumulative_args): Check for AVRTINY to update number of argument
	registers.
	(tiny_valid_direct_memory_access_range): New function. Return false if
	direct memory access range is not in accepted range for AVRTINY.
	(avr_out_movqi_r_mr_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for AVRTINY.
	(out_movqi_r_mr): Updated instruction length for AVRTINY. Call
	avr_out_movqi_r_mr_reg_disp_tiny for load from reg+displacement.
	(avr_out_movhi_r_mr_reg_no_disp_tiny): New function to handle register
	indirect load (no displacement) for AVRTINY.
	(avr_out_movhi_r_mr_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for AVRTINY.
	(avr_out_movhi_r_mr_pre_dec_tiny): New function to handle register
	indirect load for pre-decrement address.
	(out_movhi_r_mr): In case of AVRTINY, call tiny register indirect load
	functions. Update instruction length for AVRTINY.
	(avr_out_movsi_r_mr_reg_no_disp_tiny): New function. Likewise, for
	SImode.
	(avr_out_movsi_r_mr_reg_disp_tiny): New function. Likewise, for SImode.
	(out_movsi_r_mr): Likewise, for SImode.
	(avr_out_movsi_mr_r_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for AVRTINY.
	(avr_out_movsi_mr_r_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for AVRTINY.
	(out_movsi_mr_r): Emit out insn for IO address store. Update store
	instruction's size for AVRTINY. For AVRTINY, call tiny SImode indirect
	store functions.
	(avr_out_load_psi_reg_no_disp_tiny): New function to handle register
	indirect load (no displacement) for PSImode in AVRTINY.
	(avr_out_load_psi_reg_disp_tiny): New function to handle register
	indirect load (with displacement) for PSImode in AVRTINY.
	(avr_out_load_psi): Call PSImode register indirect load functions for
	AVRTINY. Update instruction length for AVRTINY.
	(avr_out_store_psi_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for PSImode in AVRTINY.
	(avr_out_store_psi_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for PSImode in AVRTINY.
	(avr_out_store_psi): Update instruction length for AVRTINY. Call tiny
	register indirect store functions for AVRTINY.
	(avr_out_movqi_mr_r_reg_disp_tiny): New function to handle QImode
	register indirect store (with displacement) for AVRTINY.
	(out_movqi_mr_r): Update instruction length for AVRTINY. Call tiny
	register indirect store function for QImode in AVRTINY.
	(avr_out_movhi_mr_r_xmega): Update instruction length for AVRTINY.
	(avr_out_movhi_mr_r_reg_no_disp_tiny): New function to handle register
	indirect store (no displacement) for HImode in AVRTINY.
	(avr_out_movhi_mr_r_reg_disp_tiny): New function to handle register
	indirect store (with displacement) for HImode in AVRTINY.
	(avr_out_movhi_mr_r_post_inc_tiny): New function to handle register
	indirect store for post-increment address in HImode.
	(out_movhi_mr_r): Update instruction length for AVRTINY. Call tiny
	register indirect store function for HImode in AVRTINY.
	(avr_out_compare): Use TINY_SBIW/ TINY_ADIW in place of sbiw/adiw
	in case of AVRTINY.
	(order_regs_for_local_alloc): Updated register allocation order for
	AVRTINY.
	(avr_conditional_register_usage): New function. It is a target hook
	(TARGET_CONDITIONAL_REGISTER_USAGE) function which updates fixed, call
	used registers list and register allocation order for AVRTINY.
	(avr_return_in_memory): Update return value size for AVRTINY.
	* config/avr/avr-c.c (avr_cpu_cpp_builtins): Added builtin macros
	for AVRTINY arch and tiny program memory base address.
	* config/avr/avr-devices.c (avr_arch_types): Added AVRTINY arch.
	(avr_texinfo): Added description for AVRTINY arch.
	* config/avr/avr.h: Added macro to identify AVRTINY arch. Updated
	STATIC_CHAIN_REGNUM for AVRTINY.
	* config/avr/avr-mcus.def: Added AVRTINY arch devices.
	* config/avr/avr.md: Added constants for tmp/ zero registers in
	AVRTINY. Attributes for AVRTINY added.
	(mov<mode>): Move src/ dest address to register if it is not in AVRTINY
	memory access range.
	(mov<mode>_insn): Avoid QImode direct load for AVRTINY if address not
	in AVRTINY memory access range.
	(*mov<mode>): Likewise for HImode and SImode.
	(*movsf): Likewise for SFmode.
	(delay_cycles_2): Updated instructions to be emitted as AVRTINY does
	not have sbiw.
	* config/avr/avr-protos.h: Added function prototype for
	tiny_valid_direct_memory_access_range.
	* config/avr/avr-tables.opt: Regenerate.
	* gcc/config/avr/t-multilib: Regenerate.
	* doc/avr-mmcu.texi: Regenerate.

gcc/testsuite:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>

	* gcc.target/avr/tiny-memx.c: New test.

	* gcc.target/avr/tiny-caller-save.c: New test.

libgcc:

2014-10-21  Joern Rennecke  <joern.rennecke@embecosm.com>
	    Vidya Praveen <vidya.praveen@atmel.com>
	    Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
	    Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
	    Pitchumani Sivanupandi <Pitchumani.S@atmel.com>

	* config/avr/lib1funcs.S (__do_global_dtors): Go back to descending
	order.

	Updated library functions for AVRTINY arch.
	* config/avr/lib1funcs.S: Updated zero/tmp regs for AVRTINY.
	Replaced occurrences of r0/r1 with tmp/zero reg macros.
	Added wsubi/ wadi macros that expands conditionally as sbiw/ adiw
	or AVRTINY equivalent. Replaced occurrences of sbiw/adiw with
	wsubi/wadi macors.
	(__mulsi3_helper): Update stack, preserve callee saved regs and
	argument from stack. Restore callee save registers.
	(__mulpsi3): Likewise.
	(__muldi3, __udivmodsi4, __divmodsi4, __negsi2, __umoddi3, __udivmod64,
	__moddi3, __adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8,
	__negdi2, __prologue_saves__, __epilogue_restores__): Excluded for 
	AVRTINY.
	(__tablejump2__): Added lpm equivalent instructions for AVRTINY.
	(__do_copy_data): Added new definition for AVRTINY.
	(__do_clear_bss): Replace r17 by r18 to preserve zero reg for AVRTINY.
	(__load_3, __load_4, __xload_1, __xload_2, __xload_3,
	__xload_4, __movmemx_qi, __movmemx_hi): Excluded for AVRTINY.
	* config/avr/lib1funcs-fixed.S: Replaced occurrences of r0/r1 with
	tmp/zero reg macros. Replaced occurrences of sbiw/adiw with wsubi/wadi
	macors.
	   * config/avr/t-avr (LIB1ASMFUNCS): Remove unsupported functions for
	AVRTINY.

	Fix broken long multiplication on tiny arch.         


Co-Authored-By: Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Co-Authored-By: Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Co-Authored-By: Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Co-Authored-By: Vidya Praveen <vidya.praveen@atmel.com>

From-SVN: r216525

This patch updates libgcc's copy of soft-fp from glibc, adding a
testcase for a bug fix this brings in.

Bootstrapped with no regressions on x86_64-unknown-linux-gnu.

libgcc:
	* soft-fp/double.h: Update from glibc.
	* soft-fp/eqdf2.c: Likewise.
	* soft-fp/eqsf2.c: Likewise.
	* soft-fp/eqtf2.c: Likewise.
	* soft-fp/extenddftf2.c: Likewise.
	* soft-fp/extended.h: Likewise.
	* soft-fp/extendsfdf2.c: Likewise.
	* soft-fp/extendsftf2.c: Likewise.
	* soft-fp/extendxftf2.c: Likewise.
	* soft-fp/gedf2.c: Likewise.
	* soft-fp/gesf2.c: Likewise.
	* soft-fp/getf2.c: Likewise.
	* soft-fp/ledf2.c: Likewise.
	* soft-fp/lesf2.c: Likewise.
	* soft-fp/letf2.c: Likewise.
	* soft-fp/op-1.h: Likewise.
	* soft-fp/op-2.h: Likewise.
	* soft-fp/op-4.h: Likewise.
	* soft-fp/op-8.h: Likewise.
	* soft-fp/op-common.h: Likewise.
	* soft-fp/quad.h: Likewise.
	* soft-fp/single.h: Likewise.
	* soft-fp/soft-fp.h: Likewise.
	* soft-fp/unorddf2.c: Likewise.
	* soft-fp/unordsf2.c: Likewise.
	* soft-fp/unordtf2.c: Likewise.
	* config/c6x/eqd.c (__c6xabi_eqd): Update call to FP_CMP_EQ_D.
	* config/c6x/eqf.c (__c6xabi_eqf): Update call to FP_CMP_EQ_S.
	* config/c6x/ged.c (__c6xabi_ged): Update call to FP_CMP_D.
	* config/c6x/gef.c (__c6xabi_gef): Update call to FP_CMP_S.
	* config/c6x/gtd.c (__c6xabi_gtd): Update call to FP_CMP_D.
	* config/c6x/gtf.c (__c6xabi_gtf): Update call to FP_CMP_S.
	* config/c6x/led.c (__c6xabi_led): Update call to FP_CMP_D.
	* config/c6x/lef.c (__c6xabi_lef): Update call to FP_CMP_S.
	* config/c6x/ltd.c (__c6xabi_ltd): Update call to FP_CMP_D.
	* config/c6x/ltf.c (__c6xabi_ltf): Update call to FP_CMP_S.

gcc/testsuite:
	* gcc.dg/torture/float128-extendxf-underflow.c: New test.

From-SVN: r216048

2014-10-08  Rong Xu  <xur@google.com>

	* gcc/gcov-tool.c (profile_overlap): New driver function
        to compute profile overlap. 
	(print_overlap_usage_message): New.
	(overlap_usage): New.
	(do_overlap): New.
	(print_usage): Add calls to overlap function.
	(main): Ditto.
	* libgcc/libgcov-util.c (read_gcda_file): Fix format.
	(find_match_gcov_info): Ditto.
	(calculate_2_entries): New.
	(compute_one_gcov): Ditto.
	(gcov_info_count_all_cold): Ditto.
	(gcov_info_count_all_zero): Ditto.
	(extract_file_basename): Ditto.
	(get_file_basename): Ditto.
	(set_flag): Ditto.
	(matched_gcov_info): Ditto.
	(calculate_overlap): Ditto.
	(gcov_profile_overlap): Ditto.
	* libgcc/libgcov-driver.c (compute_summary): Make
        it avavilable for external calls.
	* gcc/doc/gcov-tool.texi: Add documentation.

From-SVN: r216015

From-SVN: r215976

2014-10-06  Rong Xu  <xur@google.com>

	* gcc/Makefile.in: Fix dependence.
	* gcc/gcov-counter.def (GCOV_COUNTER_ICALL_TOPNV): Add
        indirect call topn profiler.
	* gcc/gcov-io.h: Ditto.
	* libgcc/Makefile.in: Ditto.
	* libgcc/libgcov-driver.c (gcov_sort_n_vals): New utility function.
	(gcov_sort_icall_topn_counter): Ditto.
	(gcov_sort_topn_counter_arrays): Ditto.
	(dump_one_gcov): Sort indirect_call topn counters.
	* libgcc/libgcov-merge.c (__gcov_merge_icall_topn): New merge
        function.
	* libgcc/libgcov-profiler.c (__gcov_topn_value_profiler_body): New
        utility function.
	(__gcov_indirect_call_topn_profiler): New profiler function.
	* libgcc/libgcov-util.c (__gcov_icall_topn_counter_op): New.
	* libgcc/libgcov.h: New decls.

From-SVN: r215962