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  1. 16 Feb, 2017 9 commits
  3. 15 Feb, 2017 17 commits
  5. 14 Feb, 2017 14 commits
    • rs6000.c: Add case statement entry to make the xvcvuxdsp built-in argument unsigned. · 8722316b 
      gcc/ChangeLog:

2017-02-14  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000.c: Add case statement entry to make the
	xvcvuxdsp built-in argument unsigned.
	* config/rs6000/vsx.md: Fix the source and return operand types so they
	match the instruction definitions from the ISA document.  Fix typo
	in the instruction generation for the (define_insn "vsx_xvcvuxdsp"
	statement.

gcc/testsuite/ChangeLog:

2017-01-14  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/vsx-builtin-3.c: Add missing test case for the
	xvcvsxdsp and xvcvuxdsp instructions.

From-SVN: r245460
      Carl Love committed
    • re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c… · 584898ee 
      re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c scan-assembler-times vshr 0)

2017-02-14  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/79282
	* lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add
	member early_clobber_alts.
	* lra-lives.c (reg_early_clobber_p): New.
	(process_bb_lives): Use it.
	* lra.c (new_insn_reg): New arg early_clobber_alts.  Use it.
	(debug_operand_data): Initialize early_clobber_alts.
	(setup_operand_alternative): Set up early_clobber_alts.
	(collect_non_operand_hard_regs): Ditto.  Pass early clobber
	alternatives to new_insn_reg.
	(add_regs_to_insn_regno_info): Add arg early_clobber_alts.  Use
	it.
	(lra_update_insn_regno_info): Pass the new arg.

From-SVN: r245459
      Vladimir Makarov committed
    • rs6000: Fix the vec-adde* testcases once more · 2932fe90 
      David found the vec-adde{,c}-int128.c testcases fail on AIX.  Those
tests should only run on targets that have int128.

This also changes the non-int128 testcases to check for the hardware
they require.


gcc/testsuite/
	* gcc.target/powerpc/vec-adde-int128.c: Only run if int128 exists.
	* gcc.target/powerpc/vec-addec-int128.c: Ditto.
	* gcc.target/powerpc/vec-adde.c: Require vsx_hw, don't require a
	64-bit default target.
	* gcc.target/powerpc/vec-addec.c: Require p8vector_hw, don't require
	a 64-bit default target.

From-SVN: r245453
      Segher Boessenkool committed
    • re PR middle-end/79505 (Memory leaks in oacc_loop_discover_walk) · 622f6b64 
      	PR middle-end/79505
	* omp-offload.c (free_oacc_loop): Release loop->ifns vector.
	(new_oacc_loop_raw): Don't clear already cleared fields.

From-SVN: r245445
      Jakub Jelinek committed
    • re PR target/79481 (AVX512PF: unmasked gather prefetch intrinsics missing) · 63d09033 
      	PR target/79481
	* config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
	_mm512_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
	_mm512_prefetch_i64gather_ps): New inline functions and macros.

	* gcc.target/i386/sse-14.c (test_2vx): Add void return type.
	(test_3vx): Change return type from int to void. 
	(_mm512_prefetch_i32gather_ps, _mm512_prefetch_i32scatter_ps,
	_mm512_prefetch_i64gather_ps, _mm512_prefetch_i64scatter_ps,
	_mm512_prefetch_i32gather_pd, _mm512_prefetch_i32scatter_pd,
	_mm512_prefetch_i64gather_pd, _mm512_prefetch_i64scatter_pd): New
	tests.
	* gcc.target/i386/sse-22.c (test_2vx): Add void return type.
	(test_3vx): Change return type from int to void.
	(_mm512_prefetch_i32gather_ps, _mm512_prefetch_i32scatter_ps,
	_mm512_prefetch_i64gather_ps, _mm512_prefetch_i64scatter_ps,
	_mm512_prefetch_i32gather_pd, _mm512_prefetch_i32scatter_pd,
	_mm512_prefetch_i64gather_pd, _mm512_prefetch_i64scatter_pd): New
	tests.
	* gcc.target/i386/avx512pf-vgatherpf0dpd-1.c: Add non-masked
	intrinsic.  Change scan-assembler-times number from 1 to 2.
	* gcc.target/i386/avx512pf-vgatherpf0dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf0qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf0qps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1dpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1qps-1.c: Likewise.

From-SVN: r245444
      Jakub Jelinek committed
    • re PR middle-end/61225 (Several new failures after r210458 on x86_64-*-* with -m32) · 8668fae0 
      	PR middle-end/61225
	* gcc.target/i386/pr49095.c: Add -fno-shrink-wrap to dg-options.
	Use dg-additional-options for ia32 target.  Remove XFAIL.

From-SVN: r245442
      Uros Bizjak committed
    • re PR target/79495 (ICE in extract_constrain_insn, at recog.c:2213) · 95d96609 
      	PR target/79495
	* config/i386/i386.md (*movxf_internal): Add (o,rC) alternative.

testsuite/ChangeLog:

2017-02-14  Uros Bizjak  <ubizjak@gmail.com>

	PR target/79495
	* gcc.target/i386/pr79495.c: New test.

From-SVN: r245441
      Uros Bizjak committed
    • re PR c++/79420 (ICE on invalid C++ code on x86_64-linux-gnu: in tsubst_copy, at cp/pt.c:14573) · 6f207d58 
      	PR c++/79420
	PR c++/79463
	* parser.c (cp_parser_postfix_dot_deref_expression): Avoid
	clobbering if the postfix expression isn't an EXPR_P.

	* g++.dg/cpp1y/pr79463.C: New.
	* g++.dg/template/incomplete10.C: New.
	* g++.dg/template/incomplete9.C: New.

From-SVN: r245440
      Marek Polacek committed
    • Properly store 128-bit constant in large model · ee139af5 
      When converting TI store with CONST_INT to V1TI store with CONST_VECTOR
in large model, an extra instruction may be needed to load CONST_VECTOR
into a register.  Insert the extra instruction to the right place.

gcc/

	PR target/79498
	* config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
	the extra instruction to the right place to store 128-bit constant
	when needed.

gcc/testsuite/

	PR target/79498
	* gcc.target/i386/pr79498.c: New test.

From-SVN: r245438
      H.J. Lu committed
    • PR middle-end/79448 - unhelpful -Wformat-truncation=2 warning · bf00c9e0 
      gcc/testsuite/ChangeLog:

	PR middle-end/79448
	* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: New test.
	* gcc.dg/tree-ssa/pr79448-2.c: New test.
	* gcc.dg/tree-ssa/pr79448.c: New test.

gcc/ChangeLog:

	PR middle-end/79448
	* gimple-ssa-sprintf.c (format_directive): Avoid issuing INT_MAX
	  warning for strings of unknown length.

From-SVN: r245437
      Martin Sebor committed
    • re PR target/79404 (h8300: ICE at gcc/ira.c:5541 whilst building libgcc) · 355930ab 
      	PR target/79404
	* ira-costs.c (scan_one_insn): Initialize register move costs
	for pseudos seen in USE/CLOBBER insns.

From-SVN: r245436
      Jeff Law committed
    • rs6000: Synchronize the --with-cpu list in config.gcc with reality · 6fa3b207 
      power, power2, rios, rios1, rios2, rsc, rsc2 support was removed.
rs64a never was a supported option; it's spelled rs64.
power5+ and powerpc64le are supported options but could not be set as
default.


	* config.gcc (supported_defaults) [powerpc*-*-*]: Update.

From-SVN: r245435
      Segher Boessenkool committed
    • re PR tree-optimization/79095 (spurious stringop-overflow warning) · 6c022f73 
      	PR tree-optimization/79095
	* tree-vrp.c (extract_range_from_binary_expr_1): For EXACT_DIV_EXPR,
	if the numerator has the range ~[0,0] make the resultant range ~[0,0].
	(extract_range_from_binary_expr): For MINUS_EXPR with no derived range,
	if the operands are known to be not equal, then the resulting range
	is ~[0,0].
	(intersect_ranges): If the new range is ~[0,0] and the old range is
	wide, then prefer ~[0,0].
	* tree-vrp.c (overflow_comparison_p_1): New function.
	(overflow_comparison_p): New function.
	* tree-vrp.c (register_edge_assert_for_2): Register additional asserts
	if NAME is used in an overflow test.
	(vrp_evaluate_conditional_warnv_with_ops): If the ops represent an
	overflow check that can be expressed as an equality test, then adjust
	ops to be that equality test.

	PR tree-optimization/79095
	* g++.dg/pr79095-1.C: New test
	* g++.dg/pr79095-2.C: New test
	* g++.dg/pr79095-3.C: New test
	* g++.dg/pr79095-4.C: New test
	* g++.dg/pr79095-5.C: New test
	* gcc.c-torture/execute/arith-1.c: Update with more cases.
	* gcc.dg/tree-ssa/pr79095-1.c: New test.

From-SVN: r245434
      Jeff Law committed
    • S/390: Cleanup: Remove builtin type flags. · c145a510 
      With the target attribute stuff the only user of the builtin types
flags value has been removed.  So drop that value from the builtin
types list entirely.

gcc/ChangeLog:

2017-02-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390-builtin-types.def: Remove flags argument.
	* config/s390/s390.c (s390_init_builtins): Likewise.

From-SVN: r245432
      Andreas Krebbel committed