1. 03 Nov, 2017 10 commits
    • rs6000: Improve *lt0 patterns · 187bd6cd
      The rs6000 port currently has an *lt0_disi define_insn, setting the DI
      result to whether the SI argument is negative or not.  It turns out the
      generic optimisers cannot always figure out in the other cases either
      that this is just a shift for us.  This patch adds patterns for all
      four SI/DI combinations.
      
      
      	* config/rs6000/rs6000.md (*lt0_disi): Delete.
      	(*lt0_<mode>di, *lt0_<mode>si): New.
      
      From-SVN: r254374
      Segher Boessenkool committed
    • rs6000: move_from_CR_ov_bit is TARGET_PAIRED_FLOAT, not TARGET_ISEL · b15a4bc9
      
      	* config/rs6000/rs6000.md (move_from_CR_ov_bit): Change condition to
      	TARGET_PAIRED_FLOAT.
      
      From-SVN: r254373
      Segher Boessenkool committed
    • [aarch64] Add Qualcomm saphira CPU support. · 52ee8191
      This patch adds an mcpu option for the Qualcomm saphira server part.
      Tested on aarch64 and did not find any regressions resulting from this
      patch.
      
      2017-11-03  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
      	    Jim Wilson  <jim.wilson@linaro.org>
      
      	* config/aarch64/aarch64-cores.def (saphira): New CPU.
      	* config/aarch64/aarch64-tune.md: Regenerated.
      	* doc/invoke.texi (AArch64 Options/-mtune): Add "saphira".
      	* gcc/config/aarch64/aarch64.c (saphira_tunings): New tuning table.
      
      
      Co-Authored-By: Jim Wilson <jim.wilson@linaro.org>
      
      From-SVN: r254372
      Siddhesh Poyarekar committed
    • [PR c++/82710] false positive paren warning · a93ee058
      https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00186.html
      	PR c++/82710
      	* decl.c (grokdeclarator): Protect MAYBE_CLASS things from paren
      	warning too.
      
      	PR c++/82710
      	* g++.dg/warn/pr82710.C: More cases.
      
      From-SVN: r254371
      Nathan Sidwell committed
    • Remove _Node_insert_return::get() member functions (P0508R0) · 97695d99
      	* include/bits/node_handle.h (_Node_insert_return::get): Remove, as
      	per P0508R0.
      
      From-SVN: r254368
      Jonathan Wakely committed
    • [ARC] Fix to unwinding. · b0c7ddf8
      gcc/ChangeLog:
      2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>
      
              * config/arc/arc.c (arc_save_restore): Corrected CFA note.
              (arc_expand_prologue): Restore blink for millicode.
              * config/arc/linux.h (LINK_EH_SPEC): Defined.
      
      libgcc/ChangeLog:
      2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>
                  Vineet Gupta <vgupta@synopsys.com>
      
              * config.host (arc*-*-linux*): Set md_unwind_header variable.
              * config/arc/linux-unwind-reg.def: New file.
              * config/arc/linux-unwind.h: Likewise.
      
      Co-Authored-By: Vineet Gupta <vgupta@synopsys.com>
      
      From-SVN: r254367
      Cupertino Miranda committed
    • PR82809: register handling in ix86_vector_duplicate_value · a34a16ab
      When adding the call to gen_vec_duplicate, I failed to notice that
      code further down modified the VEC_DUPLICATE in place.  That isn't
      safe if gen_vec_duplicate returned a const_vector.
      
      2017-11-02  Richard Sandiford  <richard.sandiford@linaro.org>
      
      gcc/
      	PR target/82809
      	* config/i386/i386.c (ix86_vector_duplicate_value): Use
      	gen_vec_duplicate after forcing the scalar into a register.
      
      gcc/testsuite/
      	* gcc.dg/pr82809.c: New test.
      
      From-SVN: r254366
      Richard Sandiford committed
    • combine: Print insns we try to combine · f53bd856
      This adds some extra debug info to the dump file for combine: print
      the insns that are input to try_combine.  I was worried printing more
      will make the dump file only harder to read, but especially the info
      from the REG_DEAD notes is invaluable.
      
      
      	* combine (try_combine): Print the insns input to try_combine to the
      	dump file.
      
      From-SVN: r254365
      Segher Boessenkool committed
    • Daily bump. · 89513a1c
      From-SVN: r254364
      GCC Administrator committed
    • re PR c++/81957 (ICE decltype) · d5f0b3f0
      /cp
      2017-11-02  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/81957
      	* pt.c (make_pack_expansion): Add tsubst_flags_t parameter.
      	(expand_integer_pack, convert_template_argument, coerce_template_parms,
      	gen_elem_of_pack_expansion_instantiation, tsubst_pack_expansion,
      	unify): Adjust calls.
      	* tree.c (cp_build_qualified_type_real): Likewise.
      	* cp-tree.h (make_pack_expansion): Adjust declaration.
      
      /testsuite
      2017-11-02  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/81957
      	* g++.dg/cpp0x/variadic-crash5.C: New.
      
      From-SVN: r254361
      Paolo Carlini committed
  2. 02 Nov, 2017 19 commits
  3. 01 Nov, 2017 11 commits
    • RISC-V: Use "@minus{}2 GB" instead of "-2 GB" in invoke.texi · 42fc5a70
      gcc/ChangeLog
      
      2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
      
      	* doc/invoke.texi (RISC-V Options): Use "@minus{}2 GB", not "-2 GB".
      
      From-SVN: r254331
      Palmer Dabbelt committed
    • tree-ssa-ccp.c (ccp_folder): New class derived from substitute_and_fold_engine. · e10a635c
      	* tree-ssa-ccp.c (ccp_folder): New class derived from
      	substitute_and_fold_engine.
      	(ccp_folder::get_value): New member function.
      	(ccp_folder::fold_stmt): Renamed from ccp_fold_stmt.
      	(ccp_fold_stmt): Remove prototype.
      	(ccp_finalize): Call substitute_and_fold from the ccp_class.
      	* tree-ssa-copy.c (copy_folder): New class derived from
      	substitute_and_fold_engine.
      	(copy_folder::get_value): Renamed from get_value.
      	(fini_copy_prop): Call substitute_and_fold from copy_folder class.
      	* tree-vrp.c (vrp_folder): New class derived from
      	substitute_and_fold_engine.
      	(vrp_folder::fold_stmt): Renamed from vrp_fold_stmt.
      	(vrp_folder::get_value): New member function.
      	(vrp_finalize): Call substitute_and_fold from vrp_folder class.
      	(evrp_dom_walker::before_dom_children): Similarly for replace_uses_in.
      	* tree-ssa-propagate.h (substitute_and_fold_engine): New class to
      	provide a class interface to folder/substitute routines.
      	(ssa_prop_fold_stmt_fn): Remove typedef.
      	(ssa_prop_get_value_fn): Likewise.
      	(subsitute_and_fold): Remove prototype.
      	(replace_uses_in): Likewise.
      	* tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
      	Renamed from replace_uses_in.  Call the virtual member function
      	(substitute_and_fold_engine::replace_phi_args_in): Similarly.
      	(substitute_and_fold_dom_walker): Remove initialization of
      	data member entries for calbacks.  Add substitute_and_fold_engine
      	member and initialize it.
      	(substitute_and_fold_dom_walker::before_dom_children0: Use the
      	member functions for get_value, replace_phi_args_in c
      	replace_uses_in, and fold_stmt calls.
      	(substitute_and_fold_engine::substitute_and_fold): Renamed from
      	substitute_and_fold.  Remove assert.   Update ctor call.
      
      From-SVN: r254330
      Jeff Law committed
    • tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove typedef. · d9a3704a
      	* tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove typedef.
      	(ssa_prop_visit_phi_fn): Likewise.
      	(class ssa_propagation_engine): New class to provide an interface
      	into ssa_propagate.
      	* tree-ssa-propagate.c (ssa_prop_visit_stmt): Remove file scoped
      	variable.
      	(ssa_prop_visit_phi): Likewise.
      	(ssa_propagation_engine::simulate_stmt): Moved into class.
      	Call visit_phi/visit_stmt from the class rather than via
      	file scoped static variables.
      	(ssa_propagation_engine::simulate_block): Moved into class.
      	(ssa_propagation_engine::process_ssa_edge_worklist): Similarly.
      	(ssa_propagation_engine::ssa_propagate): Similarly.  No longer
      	set file scoped statics for the visit_stmt/visit_phi callbacks.
      	* tree-complex.c (complex_propagate): New class derived from
      	ssa_propagation_engine.
      	(complex_propagate::visit_stmt): Renamed from complex_visit_stmt.
      	(complex_propagate::visit_phi): Renamed from complex_visit_phi.
      	(tree_lower_complex): Call ssa_propagate via the complex_propagate
      	class.
      	* tree-ssa-ccp.c: (ccp_propagate): New class derived from
      	ssa_propagation_engine.
      	(ccp_propagate::visit_phi): Renamed from ccp_visit_phi_node.
      	(ccp_propagate::visit_stmt): Renamed from ccp_visit_stmt.
      	(do_ssa_ccp): Call ssa_propagate from the ccp_propagate class.
      	* tree-ssa-copy.c (copy_prop): New class derived from
      	ssa_propagation_engine.
      	(copy_prop::visit_stmt): Renamed from copy_prop_visit_stmt.
      	(copy_prop::visit_phi): Renamed from copy_prop_visit_phi_node.
      	(execute_copy_prop): Call ssa_propagate from the copy_prop class.
      	* tree-vrp.c (vrp_prop): New class derived from ssa_propagation_engine.
      	(vrp_prop::visit_stmt): Renamed from vrp_visit_stmt.
      	(vrp_prop::visit_phi): Renamed from vrp_visit_phi_node.
      	(execute_vrp): Call ssa_propagate from the vrp_prop class.
      
      From-SVN: r254329
      Jeff Law committed
    • re PR rtl-optimization/82778 (crash: insn does not satisfy its constraints) · efc04f78
      	PR rtl-optimization/82778
      	PR rtl-optimization/82597
      	* compare-elim.c (struct comparison): Add in_a_setter field.
      	(find_comparison_dom_walker::before_dom_children): Remove killed
      	bitmap and df_simulate_find_defs call, instead walk the defs.
      	Compute last_setter and initialize in_a_setter.  Merge definitions
      	with first initialization for a few variables.
      	(try_validate_parallel): Use insn_invalid_p instead of
      	recog_memoized.  Return insn rather than just the pattern.
      	(try_merge_compare): Fix up comment.  Don't uselessly test if
      	in_a is a REG_P.  Use cmp->in_a_setter instead of walking UD
      	chains.
      	(execute_compare_elim_after_reload): Remove df_chain_add_problem
      	call.
      
      	* g++.dg/opt/pr82778.C: New test.
      
      2017-11-01  Michael Collison  <michael.collison@arm.com>
      
      	PR rtl-optimization/82597
      	* gcc.dg/pr82597.c: New test.
      
      From-SVN: r254328
      Jakub Jelinek committed
    • [AArch64] Minor rtx costs tweak · fe1447a1
      aarch64_rtx_costs uses the number of registers in a mode as the basis
      of SET costs.  This patch makes it get the number of registers from
      aarch64_hard_regno_nregs rather than repeating the calcalation inline.
      Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
      the correct SET cost as well.
      
      2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
      	    Alan Hayward  <alan.hayward@arm.com>
      	    David Sherwood  <david.sherwood@arm.com>
      
      gcc/
      	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
      	aarch64_hard_regno_nregs to get the number of registers
      	in a mode.
      
      Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>
      
      Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
      Co-Authored-By: David Sherwood <david.sherwood@arm.com>
      
      From-SVN: r254327
      Richard Sandiford committed
    • [AArch64] Rename the internal "Upl" constraint · ff1335e2
      The SVE port uses the public constraints "Upl" and "Upa" to mean
      "low predicate register" and "any predicate register" respectively.
      "Upl" was already used as an internal-only constraint by the
      addition patterns, so this patch renames it to "Uaa" ("two adds
      needed").
      
      2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
      	    Alan Hayward  <alan.hayward@arm.com>
      	    David Sherwood  <david.sherwood@arm.com>
      
      gcc/
      	* config/aarch64/constraints.md (Upl): Rename to...
      	(Uaa): ...this.
      	* config/aarch64/aarch64.md
      	(*zero_extend<SHORT:mode><GPI:mode>2_aarch64, *addsi3_aarch64_uxtw):
      	Update accordingly.
      
      Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>
      
      Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
      Co-Authored-By: David Sherwood <david.sherwood@arm.com>
      
      From-SVN: r254326
      Richard Sandiford committed
    • [AArch64] Move code around · 0100c5f9
      This patch simply moves code around, in order to make the later
      patches easier to read, and to avoid forward declarations.
      It doesn't add the missing function comments because the interfaces
      will change in a later patch.
      
      2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
      	    Alan Hayward  <alan.hayward@arm.com>
      	    David Sherwood  <david.sherwood@arm.com>
      
      gcc/
      	* config/aarch64/aarch64.c (aarch64_add_constant_internal)
      	(aarch64_add_constant, aarch64_add_sp, aarch64_sub_sp): Move
      	earlier in file.
      
      Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
      
      Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
      Co-Authored-By: David Sherwood <david.sherwood@arm.com>
      
      From-SVN: r254325
      Richard Sandiford committed
    • [AArch64] Generate permute patterns using rtx builders · 3f8334a5
      This patch replaces switch statements that call specific generator
      functions with code that constructs the rtl pattern directly.
      This seemed to scale better to SVE and also seems less error-prone.
      
      As a side-effect, the patch fixes the REV handling for diff==1,
      vmode==E_V4HFmode and adds missing support for diff==3,
      vmode==E_V4HFmode.
      
      To compensate for the lack of switches that check for specific modes,
      the patch makes aarch64_expand_vec_perm_const_1 reject permutes on
      single-element vectors (specifically V1DImode).
      
      2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
      	    Alan Hayward  <alan.hayward@arm.com>
      	    David Sherwood  <david.sherwood@arm.com>
      
      gcc/
      	* config/aarch64/aarch64.c (aarch64_evpc_trn, aarch64_evpc_uzp)
      	(aarch64_evpc_zip, aarch64_evpc_ext, aarch64_evpc_rev)
      	(aarch64_evpc_dup): Generate rtl direcly, rather than using
      	named expanders.
      	(aarch64_expand_vec_perm_const_1): Explicitly check for permutes
      	of a single element.
      	* config/aarch64/iterators.md: Add a comment above the permute
      	unspecs to say that they are generated directly by
      	aarch64_expand_vec_perm_const.
      	* config/aarch64/aarch64-simd.md: Likewise the permute instructions.
      
      Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
      
      Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
      Co-Authored-By: David Sherwood <david.sherwood@arm.com>
      
      From-SVN: r254324
      Richard Sandiford committed
    • [PATCH] fix fdump-lang-raw ICE · c6108cbd
      https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00037.html
      	* tree-dump.c (dequeue_and_dump): Use HAS_DECL_ASSEMBLER_NAME_P.
      
      From-SVN: r254323
      Nathan Sidwell committed
    • [C++ PATCH] overloaded operator fns [8/N] · 183e687a
      https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00031.html
      	* cp-tree.h (enum cp_identifier_kind): Delete cik_newdel_op.
      	Renumber and reserve udlit value.
      	(IDENTIFIER_NEWDEL_OP): Delete.
      	(IDENTIFIER_OVL_OP): New.
      	(IDENTIFIER_ASSIGN_OP): Adjust.
      	(IDENTIFIER_CONV_OP): Adjust.
      	(IDENTIFIER_OVL_OP_INFO): Adjust.
      	(IDENTIFIER_OVL_OP_FLAGS): New.
      	* decl.c (grokdeclarator): Use IDENTIFIER_OVL_OP_FLAGS.
      	* lex.c (get_identifier_kind_name): Adjust.
      	(init_operators): Don't special case new/delete ops.
      	* mangle.c (write_unqualified_id): Use IDENTIFIER_OVL_OP.
      	* pt.c (push_template_decl_real): Use IDENTIFIER_OVL_OP_FLAGS.
      	* typeck.c (check_return_expr): Likewise.
      
      From-SVN: r254322
      Nathan Sidwell committed
    • RISC-V: Document the medlow and medany code models · d4b51b8b
      This documentation is patterned off the aarch64 -mcmodel documentation.
      
      gcc/ChangeLog:
      
      2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
      
              * doc/invoke.texi (RISC-V Options): Explicitly name the medlow
              and medany code models, and describe what they do.
      
      From-SVN: r254321
      Palmer Dabbelt committed