1. 20 Nov, 2019 15 commits
    • tree-vect-slp.c (vect_analyze_slp_instance): Dump constructors we are actually analyzing. · 140ee00a
      2019-11-20  Richard Biener  <rguenther@suse.de>
      
      	* tree-vect-slp.c (vect_analyze_slp_instance): Dump
      	constructors we are actually analyzing.
      	(vect_slp_check_for_constructors): Do not vectorize uniform
      	constuctors, do not dump here.
      
      	* gcc.dg/vect/bb-slp-42.c: Adjust.
      	* gcc.dg/vect/bb-slp-40.c: Likewise.
      
      From-SVN: r278495
      Richard Biener committed
    • re PR tree-optimization/92537 (ICE in vect_slp_analyze_node_operations, at tree-vect-slp.c:2775) · 2439d584
      2019-11-20  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/92537
      	* tree-vect-slp.c (vect_analyze_slp_instance): Move CTOR
      	vectorization validity check...
      	(vect_slp_analyze_operations): ... here.
      
      	* gfortran.dg/pr92537.f90: New testcase.
      
      From-SVN: r278494
      Richard Biener committed
    • [testsuite][arm] Fix asm-flag-[45].c tests · 8d8ae265
      In asm-flag-4.c, we need to use dg-message instead of dg-error because
      we have to match "sorry, unimplemented:" rather than "error:".  In
      asm-flag-5.c, fix the dg-error syntax.
      
      2019-11-20  Christophe Lyon  <christophe.lyon@linaro.org>
      
      	* gcc.target/arm/asm-flag-4.c: Replace dg-error with dg-message.
      	* gcc.target/arm/asm-flag-5.c: Add quotes around dg-error
      	messages.
      
      From-SVN: r278487
      Christophe Lyon committed
    • Remove my name from AArch64 port maintainers · 267d7432
      	* MAINTAINERS (aarch64 port): Remove my name, move to...
      	(Write After Approval): ...Here.
      
      From-SVN: r278486
      James Greenhalgh committed
    • [ARC] Register ARC specific passes with a .def file. · f60689fa
      New arc-passes.def to register ARC specific passes.
      
      gcc/
      xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/arc-protos.h (make_pass_arc_ifcvt): Declare.
      	(make_pass_arc_predicate_delay_insns): Likewise.
      	* config/arc/arc.c (class pass_arc_ifcvt): Reformat text, add gate
      	method, remove clone.
      	(class pass_arc_predicate_delay_insns): Likewise.
      	(arc_init): Remove registering of ARC specific passes.
      	* config/arc/t-arc (PASSES_EXTRA): Add arc-passes.def.
      	* config/arc/arc-passes.def: New file.
      
      From-SVN: r278485
      Claudiu Zissulescu committed
    • re PR c++/90767 (jumbled error message with this and const) · ee686729
      	PR c++/90767
      	* call.c (complain_about_no_candidates_for_method_call): If
      	conv->from is not a type, pass to complain_about_bad_argument
      	lvalue_type of conv->from.
      
      	* g++.dg/diagnostic/pr90767-1.C: New test.
      	* g++.dg/diagnostic/pr90767-2.C: New test.
      
      From-SVN: r278484
      Jakub Jelinek committed
    • re PR middle-end/90840 (ICE in simplify_subreg, at simplify-rtx.c:6441) · d742b0c1
      	PR middle-end/90840
      	* expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM
      	and has a mode that doesn't have corresponding integral type.
      
      	* gcc.c-torture/compile/pr90840.c: New test.
      
      From-SVN: r278483
      Jakub Jelinek committed
    • re PR target/90867 (Multiplication or typecast of integer and double always zero when...) · 94cdd3b7
      	PR target/90867
      	* config/i386/i386-options.c (ix86_valid_target_attribute_tree): Don't
      	clear opts->x_ix86_isa_flags{,2} here...
      	(ix86_valid_target_attribute_inner_p): ... but here when seeing
      	arch=.  Also clear opts->x_ix86_isa_flags{,2}_explicit.
      
      	* gcc.target/i386/pr90867.c: New test.
      
      From-SVN: r278482
      Jakub Jelinek committed
    • re PR c/90898 (ICE in insert_clobber_before_stack_restore, at tree-ssa-ccp.c:2112) · 7313f6cf
      	PR c/90898
      	* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove
      	assertion.
      	(insert_clobbers_for_var): Fix a typo in function comment.
      
      	* gcc.dg/pr90898.c: New test.
      
      From-SVN: r278481
      Jakub Jelinek committed
    • re PR middle-end/91195 (incorrect may be used uninitialized smw (272711, 273474]) · 06e8db10
      	PR middle-end/91195
      	* tree-ssa-phiopt.c (cond_store_replacement): Move lhs unsharing
      	earlier.  Set TREE_NO_WARNING on the rhs1 of the artificially added
      	load.
      
      	* gcc.dg/pr91195.c: New test.
      
      From-SVN: r278479
      Jakub Jelinek committed
    • Make 0-series device specs work with older versions of avr-gcc. · c04341ec
      	PR target/92545
      	* config/avr/specs.h (LINK_SPEC) <%(link_pm_base_address)>: Remove.
      	* config/avr/gen-avr-mmcu-specs.c (print_mcu)
      	<*link_pm_base_address>: Don't write spec.
      	<*link_arch>: Add --defsym=__RODATA_PM_OFFSET__= as needed.
      
      From-SVN: r278478
      Georg-Johann Lay committed
    • re PR c/92088 (aggregates with VLAs and nested functions are broken) · 3e00ba47
      2019-11-20  Richard Biener  <rguenther@suse.de>
      
      	PR c/92088
      	c/
      	* c-decl.c (grokdeclarator): Prevent inlining of nested
      	function with VLA arguments.
      
      	* builtins.c (compute_objsize): Deal with VLAs.
      
      	* gcc.dg/torture/pr92088-1.c: New testcase.
      	* gcc.dg/torture/pr92088-2.c: Likewise.
      
      From-SVN: r278477
      Richard Biener committed
    • cvt.c (ocp_convert): Use additional warning sentinel. · 54bf2539
      /cp
      2019-11-20  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* cvt.c (ocp_convert): Use additional warning sentinel.
      
      /testsuite
      2019-11-20  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	* g++.dg/warn/multiple-sign-compare-warn-1.C: New.
      
      From-SVN: r278475
      Paolo Carlini committed
    • Daily bump. · 56d475ca
      From-SVN: r278474
      GCC Administrator committed
    • Add more pedwarns for [[]] C attributes on types. · 8c5b727a
      The standard [[]] attributes currently defined in C2x are all not
      valid on types not being defined at the time.
      
      Use on such types results in a warning from attribs.c about attributes
      appertaining to types (the warning that I think is bogus in general
      for both C and C++, applying as it does to all [[]] attributes
      including gnu:: ones that are perfectly meaningful on types not being
      defined and work fine when __attribute__ syntax is used instead).  If
      that warning is removed (as I intend to do in a subsequent patch),
      warnings may or may not result from the attribute handlers, depending
      on whether those particular attribute handlers consider the attributes
      meaningful in such a context.  In C, however, the rules about where
      each [[]] attribute is valid are constraints, so a pedwarn, not a
      warning, is required.
      
      Because some handlers are shared between standard and gnu::
      attributes, there can be cases that are valid for the GNU attribute
      variant but not for the standard one.  So in general it is not correct
      to rely on the attribute handlers to give all required pedwarns
      (although in some cases, a pedwarn in the attribute handler is in
      appropriate way of diagnosing an invalid use); they not have the
      information about whether the attribute was a gnu:: one and can
      legitimately accept a wider range of uses for the gnu:: attributes.
      
      This patch ensures appropriate diagnostics for invalid uses of C2x
      standard attributes on types, and so helps pave the way for the
      subsequent removal of the bogus check in attribs.c, by adding a check
      run in the front end before calling decl_attributes; this check
      removes the attributes from the list after calling pedwarn to avoid
      subsequent duplicate warnings.
      
      Bootstrapped with no regressions for x86_64-pc-linux-gnu.
      
      gcc/c:
      	* c-decl.c (c_warn_type_attributes): New function.
      	(groktypename, grokdeclarator, finish_declspecs): Call
      	c_warn_type_attributes before applying attributes to types.
      	* c-tree.h (c_warn_type_attributes): Declare.
      
      gcc/testsuite:
      	* gcc.dg/c2x-attr-deprecated-2.c, gcc.dg/c2x-attr-fallthrough-2.c,
      	gcc.dg/c2x-attr-maybe_unused-2.c: Expect errors for invalid uses
      	of standard attributes on types.  Add more tests of invalid uses
      	on types.
      
      From-SVN: r278471
      Joseph Myers committed
  2. 19 Nov, 2019 25 commits
    • libgo: better cmd/cgo handling for '.' in pkgpath · 0c6ce0ae
          
          Updates cgo's gccgoPkgpathToSymbolNew() to bring it into
          conformance with the way that gccgo now handles package
          paths with embedded dots (see CL 200838). See also
          https://gcc.gnu.org/PR61880, a related bug. This CL is a
          copy of CL 207957 in the main Go repo.
          
          Updates golang/go#35623.
          
          Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/207977
      
      From-SVN: r278470
      Ian Lance Taylor committed
    • re PR c++/92414 (internal compiler error: tree check: expected constructor, have… · fce6467b
      re PR c++/92414 (internal compiler error: tree check: expected constructor, have error_mark in cxx_eval_store_expression, at cp/constexpr.c:4009)
      
      	PR c++/92414
      	* constexpr.c (cxx_eval_outermost_constant_expr): If DECL_INITIAL
      	on object is erroneous, return t without trying to evaluate
      	a constexpr dtor.
      
      	* g++.dg/cpp2a/constexpr-dtor4.C: New test.
      
      From-SVN: r278468
      Jakub Jelinek committed
    • Consider parm types equivalence for operator rewrite tiebreaker. · 8d5d9087
      The C++ committee continues to discuss how best to avoid breaking existing
      code with the new rules for reversed operators.  A recent suggestion was to
      base the tie-breaker on the parameter types of the candidates, which made a
      lot of sense to me, so this patch implements that.
      
      This patch also mentions that a candidate was reversed or rewritten when
      printing the list of candidates, and warns about a comparison that becomes
      recursive under the new rules.  There is no flag for this warning; people
      can silence it by swapping the operands.
      
      	* call.c (same_fn_or_template): Change to cand_parms_match.
      	(joust): Adjust.
      	(print_z_candidate): Mark rewritten/reversed candidates.
      	(build_new_op_1): Warn about recursive call with reversed arguments.
      
      From-SVN: r278465
      Jason Merrill committed
    • rs6000.c (move_to_end_of_ready): New, factored out from common code. · 9a8819b8
      	* config/rs6000/rs6000.c (move_to_end_of_ready): New, factored out
      	from common code.
      	(power6_sched_reorder2): Factored out from rs6000_sched_reorder2,
      	call new function.
      	(power9_sched_reorder2): Call new function.
      	(rs6000_sched_reorder2): Likewise.
      
      From-SVN: r278463
      Pat Haugen committed
    • Move ChangeLog entry to correct file · dd46a542
      From-SVN: r278461
      Richard Sandiford committed
    • Remove unused parameter PROB in ipa-fnsummary.c · 98450d19
              * ipa-fnsummary.c (estimate_edge_size_and_time): Drop parameter PROB.
      	(estimate_calls_size_and_time): Update.
      
      From-SVN: r278460
      Jan Hubicka committed
    • Avoid redundant computations in edge_badness. · ea8dd3b6
              * ipa-inline.c (inlining_speedup): New function.
      	(edge_badness): Use it.
      
      From-SVN: r278459
      Jan Hubicka committed
    • [MIPS] Prevent MSA branches from being put into delay slots · 4aa5fd8a
       This patch tightens the instruction definitions to make sure
       that MSA branch instructions cannot be put into delay slots and have their
       delay slots eligible for being filled. Also, MSA *div*3 patterns use MSA
       branches for zero checks but are not marked as being multi instruction and
       thus could be put into delay slots. This patch fixes that.
      
      gcc/ChangeLog:
      
      2019-11-19  Zoran Jovanovic <zoran.jovanovic@mips.com>
      		Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
      
      	* config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>):
      	Mark as not having "likely" version.
      	* config/mips/mips.md (insn_count): The simd_div instruction with
      	TARGET_CHECK_ZERO_DIV consists of 3 instructions.
      	(can_delay): Exclude simd_branch.
      	(defile_delay *): Add simd_branch instructions.
      	They have one regular delay slot.
      
      gcc/testsuite/ChangeLog:
      
      2019-11-19  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
      
      	* gcc.target/mips/msa-ds.c: New test.
      
      From-SVN: r278458
      Dragan Mladjenovic committed
    • Revert r278441 · aa535578
      To restore powerpc bootstrap.
      
      2019-11-19  Richard Sandiford  <richard.sandiford@arm.com>
      gcc/
      	Revert:
      	2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
      
      	* cse.c (cse_insn): Delete no-op register moves too.
      	* simplify-rtx.c (comparison_to_mask): Handle unsigned comparisons.
      	Take a second comparison to control the value for NE.
      	(mask_to_comparison): Handle unsigned comparisons.
      	(simplify_logical_relational_operation): Likewise.  Update call
      	to comparison_to_mask.  Handle AND if !HONOR_NANs.
      	(simplify_binary_operation_1): Call the above for AND too.
      
      gcc/testsuite/
      	Revert:
      	2019-11-18  Richard Sandiford  <richard.sandiford@arm.com>
      
      	* gcc.target/aarch64/sve/acle/asm/ptest_pmore.c: New test.
      
      From-SVN: r278455
      Richard Sandiford committed
    • [AArch64] PR79262: Adjust vector cost · 4bf29d15
      PR79262 has been fixed for almost all AArch64 cpus, however the example is still
      vectorized in a few cases, resulting in lower performance.  Adjust the vector
      cost slightly so that so that -mcpu=cortex-a53 now has identical performance as
      -mcpu=cortex-a57 on libquantum.
      
          gcc/
      	PR target/79262
      	* config/aarch64/aarch64.c (generic_vector_cost): Adjust
      	vec_to_scalar_cost.
      
      From-SVN: r278452
      Wilco Dijkstra committed
    • re PR c++/89913 (ICE with invalid using declaration) · c286fb4e
      PR c++/89913
      
      gcc/cp/
      	* pt.c (get_underlying_template): Exit loop if the original type
      	of the alias is null.
      
      gcc/testsuite/
      	* g++.dg/cpp2a/pr89913.C: New test.
      
      From-SVN: r278451
      Andrew Sutton committed
    • re PR c++/92078 (error: 'struct std::ptr<Iter>' redeclared with different access) · cce3c9db
      PR c++/92078
      
      gcc/cp/
      	* pt.c (maybe_new_partial_specialization): Apply access to newly
      	created partial specializations. Update comment style.
      
      gcc/testsuite/
      	* g++.dg/cpp2a/concepts-pr92078.C: New.
        * g++.dg/cpp2a/concepts-requires18.C: Update diagnostics.
      
      From-SVN: r278450
      Andrew Sutton committed
    • Suppress diagnostics substituting into a requires-expression (PR c++/92403). · 7aabd67f
      gcc/cp/
      	* pt.c (tsubst_copy_and_build): Perform the first substitution without
      	diagnostics and a second only if tsubst_requries_expr returns an error.
      
      From-SVN: r278449
      Andrew Sutton committed
    • Restore init_ggc_heuristics. · 8b24d594
      2019-11-19  Martin Liska  <mliska@suse.cz>
      
      	* toplev.c (general_init): Move the call...
      	(toplev::main): ... here as we need init_options_struct
      	being called.
      
      From-SVN: r278448
      Martin Liska committed
    • [Arm] Set Armv7-A tune to Cortex-A53 · 24851701
      By default Armv7-A tunes for Cortex-A8. This is an ancient core
      today and the settings are no longer useful for newer cores. So
      switch to Cortex-A53 tuning since it works well across a wide range
      of modern cores.
      
      On SPECINT2006 the performance gain is 0.7% compared to Cortex-A8 tuning,
      and codesize reduces by 0.2%.
      
          gcc/
      	* config/arm/arm-cpus.in (armv7): Set tune to Cortex-A53.
      	(armv7-a): Likewise.
      	(armv7ve): Likewise.
      
      From-SVN: r278447
      Wilco Dijkstra committed
    • Update loop-1.c test for amdgcn · 89842a51
      2019-11-19  Andrew Stubbs  <ams@codesourcery.com>
      
      	gcc/testsuite/
      	* gcc.dg/tree-ssa/loop-1.c: Change amdgcn assembler scan.
      
      From-SVN: r278446
      Andrew Stubbs committed
    • re PR tree-optimization/92581 (condition chains vectorized wrongly) · ef8777c1
      2019-11-19  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/92581
      	* tree-vect-loop.c (vect_create_epilog_for_reduction): For
      	condition reduction chains gather all conditions involved
      	for computing the index reduction vector.
      
      	* gcc.dg/vect/vect-cond-reduc-5.c: New testcase.
      
      From-SVN: r278445
      Richard Biener committed
    • [AArch64] Implement Armv8.5-A memory tagging (MTE) intrinsics · ef01e6bb
      2019-11-19  Dennis Zhang  <dennis.zhang@arm.com>
      
      	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add
      	AARCH64_MEMTAG_BUILTIN_START, AARCH64_MEMTAG_BUILTIN_IRG,
      	AARCH64_MEMTAG_BUILTIN_GMI, AARCH64_MEMTAG_BUILTIN_SUBP,
      	AARCH64_MEMTAG_BUILTIN_INC_TAG, AARCH64_MEMTAG_BUILTIN_SET_TAG,
      	AARCH64_MEMTAG_BUILTIN_GET_TAG, and AARCH64_MEMTAG_BUILTIN_END.
      	(aarch64_init_memtag_builtins): New.
      	(AARCH64_INIT_MEMTAG_BUILTINS_DECL): New macro.
      	(aarch64_general_init_builtins): Call aarch64_init_memtag_builtins.
      	(aarch64_expand_builtin_memtag): New.
      	(aarch64_general_expand_builtin): Call aarch64_expand_builtin_memtag.
      	(AARCH64_BUILTIN_SUBCODE): New macro.
      	(aarch64_resolve_overloaded_memtag): New.
      	(aarch64_resolve_overloaded_builtin_general): New. Call
      	aarch64_resolve_overloaded_memtag to handle overloaded MTE builtins.
      	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
      	__ARM_FEATURE_MEMORY_TAGGING when enabled.
      	(aarch64_resolve_overloaded_builtin): Call
      	aarch64_resolve_overloaded_builtin_general.
      	* config/aarch64/aarch64-protos.h
      	(aarch64_resolve_overloaded_builtin_general): New declaration.
      	* config/aarch64/aarch64.h (AARCH64_ISA_MEMTAG): New macro.
      	(TARGET_MEMTAG): Likewise.
      	* config/aarch64/aarch64.md (UNSPEC_GEN_TAG): New unspec.
      	(UNSPEC_GEN_TAG_RND, and UNSPEC_TAG_SPACE): Likewise.
      	(irg, gmi, subp, addg, ldg, stg): New instructions.
      	* config/aarch64/arm_acle.h (__arm_mte_create_random_tag): New macro.
      	(__arm_mte_exclude_tag, __arm_mte_ptrdiff): Likewise.
      	(__arm_mte_increment_tag, __arm_mte_set_tag): Likewise.
      	(__arm_mte_get_tag): Likewise.
      	* config/aarch64/predicates.md (aarch64_memtag_tag_offset): New.
      	(aarch64_granule16_uimm6, aarch64_granule16_simm9): New.
      	* config/arm/types.md (memtag): New.
      	* doc/invoke.texi (-memtag): Update description.
      
      2019-11-19  Dennis Zhang  <dennis.zhang@arm.com>
      
      	* gcc.target/aarch64/acle/memtag_1.c: New test.
      	* gcc.target/aarch64/acle/memtag_2.c: New test.
      	* gcc.target/aarch64/acle/memtag_3.c: New test.
      
      From-SVN: r278444
      Dennis Zhang committed
    • arm: Fixes for asm-flags vs thumb1 and ilp32 · 35ba842f
      Thumb1 cannot support asm-flags currently, because we don't expose the
      flags register to the compiler.  Disable the support for that case.
      
      Adjust the asm-flag-6 test for aarch64 ilp32 correctness.
      
      gcc/
      	* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
      	to define __GCC_ASM_FLAG_OUTPUTS__.
      	* config/arm/arm.c (thumb1_md_asm_adjust): New function.
      	(arm_option_params_internal): Swap out targetm.md_asm_adjust
      	depending on TARGET_THUMB1.
      	* doc/extend.texi (FlagOutputOperands): Document thumb1 restriction.
      
      gcc/testsuite/
      	* testsuite/gcc.target/arm/asm-flag-3.c: Skip for thumb1.
      	* testsuite/gcc.target/arm/asm-flag-5.c: Likewise.
      	* testsuite/gcc.target/arm/asm-flag-6.c: Likewise.
      	* testsuite/gcc.target/arm/asm-flag-4.c: New test.
      
      	* testsuite/gcc.target/aarch64/asm-flag-6.c: Use %w for
      	asm inputs to cmp instruction for ILP32.
      
      From-SVN: r278443
      Richard Henderson committed
    • libstdc++: Fix declarations of variable templates · 5ecaaf98
      This code is invalid and rejected by other compilers (see PR 92576).
      
      	* include/bits/regex.h (ranges::__detail::__enable_view_impl): Fix
      	declaration.
      	* include/bits/stl_multiset.h (ranges::__detail::__enable_view_impl):
      	Likewise.
      	* include/bits/stl_set.h (ranges::__detail::__enable_view_impl):
      	Likewise.
      	* include/bits/unordered_set.h (ranges::__detail::__enable_view_impl):
      	Likewise.
      	* include/debug/multiset.h (ranges::__detail::__enable_view_impl):
      	Likewise.
      	* include/debug/set.h (ranges::__detail::__enable_view_impl): Likewise.
      	* include/debug/unordered_set (ranges::__detail::__enable_view_impl):
      	Likewise.
      
      From-SVN: r278440
      Jonathan Wakely committed
    • re PR target/92549 (Use x86 xchg instruction more) · 63b88711
      	PR target/92549
      	* config/i386/i386.md (peephole2 for *swap<mode>): New peephole2.
      
      	* gcc.target/i386/pr92549.c: New test.
      
      From-SVN: r278439
      Jakub Jelinek committed
    • re PR middle-end/91450 (__builtin_mul_overflow(A,B,R) wrong code if product < 0,… · beeac4c2
      re PR middle-end/91450 (__builtin_mul_overflow(A,B,R) wrong code if product < 0, *R is unsigned, and !(A&B))
      
      	PR middle-end/91450
      	* internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one
      	operand is negative and one non-negative, compare the non-negative
      	one against 0 rather than comparing s1 & s2 against 0.  Otherwise,
      	don't compare (s1 & s2) == 0, but compare separately both s1 == 0
      	and s2 == 0, unless one of them is known to be negative.  Remove
      	tem2 variable, use tem where tem2 has been used before.
      
      	* gcc.c-torture/execute/pr91450-1.c: New test.
      	* gcc.c-torture/execute/pr91450-2.c: New test.
      
      From-SVN: r278437
      Jakub Jelinek committed
    • re PR c++/92504 (ICE on gcc-9 -fopenmp: internal compiler error: tree check:… · 863bbe2b
      re PR c++/92504 (ICE on gcc-9 -fopenmp: internal compiler error: tree check: expected tree that contains 'decl common' structure, have 'baselink' in get_inner_reference, at expr.c:7238)
      
      	PR c++/92504
      	* semantics.c (handle_omp_for_class_iterator): Don't call
      	cp_fully_fold on cond.
      
      	* g++.dg/gomp/pr92504.C: New test.
      
      From-SVN: r278433
      Jakub Jelinek committed
    • re PR tree-optimization/92557 (ICE in omp_clause_aligned_alignment, at omp-low.c:4090) · b51d4ebc
      	PR tree-optimization/92557
      	* omp-low.c (omp_clause_aligned_alignment): Punt if TYPE_MODE is not
      	vmode rather than asserting it always is.
      
      	* gcc.dg/gomp/pr92557.c: New test.
      
      From-SVN: r278432
      Jakub Jelinek committed