2016-07-07  Yannick Moy  <moy@adacore.com>

	* sem_ch6.adb (Process_Formals): Set ghost flag
	on formal entities of ghost subprograms.
	* ghost.adb (Check_Ghost_Context.Is_OK_Ghost_Context): Accept ghost
	entities in use type clauses.

From-SVN: r238106

	* file-find.c (remove_prefix): New function.
	* file-find.h (remove_prefix): Declare the function.
	* gcc-ar.c (main): Skip a folder of the wrapper if
	a wrapped binary would point to the same file.

From-SVN: r238089

	* tree-scalar-evolution.c (iv_can_overflow_p): export.
	* tree-scalar-evolution.h (iv_can_overflow_p): Declare.
	* tree-ssa-loop-ivopts.c (alloc_iv): Use it.

From-SVN: r238088

gcc/

	PR ipa/71624
	* ipa-inline-analysis.c (compute_inline_parameters): Set
	local.can_change_signature to false for intrumentation
	thunk callees.

gcc/testsuite/

	PR ipa/71624
	* g++.dg/pr71624.C: New test.

From-SVN: r238086

2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
    with TARGET_HAVE_MOVT.
    (TARGET_HAVE_MOVT): Define.
    * config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW
    availability with TARGET_HAVE_MOVT.
    * config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT
    availability.
    (addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than
    TARGET_THUMB2.
    (symbol_refs movsi splitter): Remove TARGET_32BIT check.
    (arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability.
    * config/arm/constraints.md (define_constraint "j"): Use
    TARGET_HAVE_MOVT to check MOVT availability.

From-SVN: r238083

2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.

From-SVN: r238082

2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-arches.def (armv8-m.base): Define new architecture.
    (armv8-m.main): Likewise.
    (armv8-m.main+dsp): Likewise.
    * config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
    (FL_FOR_ARCH8M_MAIN): Likewise.
    * config/arm/arm-tables.opt: Regenerate.
    * config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
    armv8-m.main+dsp to BE8_LINK_SPEC.
    * config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
    (enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
    * config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
    Baseline and Mainline.
    (arm_option_override_internal): Also disable arm_restrict_it when
    !arm_arch_notm.  Update comment for -munaligned-access to also cover
    ARMv8-M Baseline.
    (arm_file_start): Increase buffer size for printing architecture name.
    * doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
    and armv8-m.main+dsp.
    (mno-unaligned-access): Clarify that this is disabled by default for
    ARMv8-M Baseline architectures as well.

    gcc/testsuite/
    * lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
    check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
    ARMv8-M Mainline architectures.

    libgcc/
    * config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.

From-SVN: r238081

lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later and ARMv5t* rather than for a fixed list of...

2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    libgcc/
    * config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
    and ARMv5t* rather than for a fixed list of architectures.

From-SVN: r238080

2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
    decide whether to prevent some libgcc routines being included for some
    multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
    link between this condition and the one in
    libgcc/config/arm/lib1func.S.

    gcc/testsuite/
    * lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
    __ARM_ARCH_ISA_ARM to test for Cortex-M devices.

    libgcc/
    * config/arm/bpabi-v6m.S: Clarify what architectures is the
    implementation suitable for.
    * config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
    for all Thumb-1 only targets.
    (NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
    (THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
    __ARM_ARCH_6M__.
    (EQUIV): Likewise.
    (ARM_FUNC_ALIAS): Likewise.
    (umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
    version.
    (modsi3): Likewise.
    (clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
    (clzdi2): Likewise.
    (ctzsi2): Likewise.
    (L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
    __ARM_ARCH_6M__ in guard for checking whether it is defined.
    (final includes): Test for NOT_ISA_TARGET_32BIT rather than
    __ARM_ARCH_6M__ and add comment to indicate the connection between
    this condition and the one in gcc/config/arm/elf.h.
    * config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
    __ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
    * config/arm/t-softfp: Likewise.

From-SVN: r238079

2016-07-07  Richard Biener  <rguenther@suse.de>

	* tree-ssa-pre.c: Include alias.h.
	(compute_avail): If we have multiple VN_REFERENCEs with the
	same hashtable entry adjust that to make it a valid replacement
	for all of them with respect to alignment and aliasing
	when doing insertion.
	* tree-ssa-sccvn.h (vn_reference_operands_for_lookup): Declare.
	* tree-ssa-sccvn.c (vn_reference_operands_for_lookup): New function.

From-SVN: r238078

Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers.  So, this patch solves it
in the same way.  This only works for targets with direct move.

To recap: register allocation can decide to put an integer mode value in
a floating point or vector register.  If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE.  Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.


	PR target/70098
	PR target/71763
	* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
	*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
	constraint.

gcc/testsuite/
	PR target/70098
	PR target/71763
	* gcc.target/powerpc/pr71763.c: New file.

From-SVN: r238076

From-SVN: r238073

The last target to use this was i386-interix, so since that is gone we
don't need this anymore.

libgcc/ChangeLog:

2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* libgcc2.c (SYMBOL__MAIN): Remove checks for
	CTOR_LISTS_DEFINED_EXTERNALLY.

From-SVN: r238067

gcc/ChangeLog:

2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* var-tracking.c (struct adjust_mem_data): Make side_effects a vector.
	(adjust_mems): Adjust.
	(adjust_insn): Likewise.
	(prepare_call_arguments): Likewise.

From-SVN: r238066

gcc/ChangeLog:

2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* gcse.c (struct ls_expr): Make stores field a vector.
	(ldst_entry): Adjust.
	(free_ldst_entry): Likewise.
	(print_ldst_list): Likewise.
	(compute_ld_motion_mems): Likewise.
	(update_ld_motion_stores): Likewise.

From-SVN: r238065

gcc/ChangeLog:

2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* gcse.c (struct ls_expr): Remove loads field.
	(ldst_entry): Adjust.
	(free_ldst_entry): Likewise.
	(print_ldst_list): Likewise.
	(compute_ld_motion_mems): Likewise.

From-SVN: r238064

gcc/ChangeLog:

2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* store-motion.c (struct st_expr): Make antic_stores a vector.
	(st_expr_entry): Adjust.
	(free_st_expr_entry): Likewise.
	(print_store_motion_mems): Likewise.
	(find_moveable_store): Likewise.
	(compute_store_table): Likewise.
	(remove_reachable_equiv_notes): Likewise.
	(replace_store_insn): Likewise.
	(build_store_vectors): Likewise.

From-SVN: r238063

	* include/Makefile.am: Add any and c++17_warning.h to exported headers.
	* include/Makefile.in: Likewise.
	* include/std/any: New.
	* testsuite/20_util/any/assign/1.cc: Likewise.
	* testsuite/20_util/any/assign/2.cc: Likewise.
	* testsuite/20_util/any/assign/self.cc: Likewise.
	* testsuite/20_util/any/cons/1.cc: Likewise.
	* testsuite/20_util/any/cons/2.cc: Likewise.
	* testsuite/20_util/any/cons/aligned.cc: Likewise.
	* testsuite/20_util/any/cons/nontrivial.cc: Likewise.
	* testsuite/20_util/any/misc/any_cast.cc: Likewise.
	* testsuite/20_util/any/misc/any_cast_neg.cc: Likewise.
	* testsuite/20_util/any/misc/any_cast_no_rtti.cc: Likewise.
	* testsuite/20_util/any/misc/swap.cc: Likewise.
	* testsuite/20_util/any/modifiers/1.cc: Likewise.
	* testsuite/20_util/any/observers/type.cc: Likewise.
	* testsuite/20_util/any/typedefs.cc: Likewise.

From-SVN: r238061

From-SVN: r238058

    
    Adds notes to function parameters which summarize the escape of that
    parameter with respect to the function's scope.
    
    Reviewed-on: https://go-review.googlesource.com/18443

From-SVN: r238057

	* config/arm/driver-arm.c (arm_cpu_table): Add entries for cortex-a32,
	cortex-a35, cortex-a53, cortex-a57, cortex-a72, cortex-a73.

From-SVN: r238056

re PR tree-optimization/71518 (wrong code at -O3 on x86_64-linux-gnu in 64-bit mode (not in 32-bit mode))

gcc/

2016-07-06  Yuri Rumyantsev  <ysrumyan@gmail.com>

	PR tree-optimization/71518
	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Adjust
	misalign also for outer loops with negative step.

gcc/testsuite/

2016-07-06  Yuri Rumyantsev  <ysrumyan@gmail.com>

	PR tree-optimization/71518
        * gcc.dg/pr71518.c: New test.

From-SVN: r238055

sem_ch6.adb (Check_Inline_Pragma): if the subprogram has no spec then move its aspects to the internally built...

2016-07-06  Javier Miranda  <miranda@adacore.com>

	* sem_ch6.adb (Check_Inline_Pragma): if the subprogram has no spec
	then move its aspects to the internally built subprogram spec.

From-SVN: r238052

sem_ch6.adb (Analyze_Expression_Function): Mark body of expression function as ghost if needed when created.

2016-07-06  Yannick Moy  <moy@adacore.com>

	* sem_ch6.adb (Analyze_Expression_Function): Mark body of
	expression function as ghost if needed when created.
	* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
	Remove special case.

From-SVN: r238051

2016-07-06  Arnaud Charlet  <charlet@adacore.com>

	* lib.adb (Check_Same_Extended_Unit): Complete previous change.
	* sem_intr.adb (Errint): New parameter Relaxed. Refine previous
	change to only disable errors selectively.
	* sem_util.adb: minor style fix in object declaration

2016-07-06  Yannick Moy  <moy@adacore.com>

	* sem_warn.adb (Check_Infinite_Loop_Warning.Find_Var): Special case a
	call to a volatile function, so that it does not lead to a warning in
	that case.

2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>

	* sem_ch12.adb, sem_ch4.adb, sem_ch6.adb: Minor reformatting.

2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>

	* gnat1drv.adb: Code clean up. Do not emit any
	code generation errors when the unit is ignored Ghost.

2016-07-06  Ed Schonberg  <schonberg@adacore.com>

	* sem_eval.adb (Check_Non_Static_Context): If the expression
	is a real literal of a floating point type that is part of a
	larger expression and is not a static expression, transform it
	into a machine number now so that the rest of the computation,
	even if other components are static, is not evaluated with
	extra precision.

2016-07-06  Javier Miranda  <miranda@adacore.com>

	* sem_ch13.adb (Freeze_Entity_Checks): Undo previous patch and move the
	needed functionality to Analyze_Freeze_Generic_Entity.
	(Analyze_Freeze_Generic_Entity): If the entity is not already frozen
	and has delayed aspects then analyze them.

2016-07-06  Yannick Moy  <moy@adacore.com>

	* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
	Special case for unanalyzed body entity of ghost expression function.

From-SVN: r238050

	Implement LWG 2451, optional<T> should 'forward' T's
	implicit conversions.
	* include/experimental/optional (__is_optional_impl, __is_optional):
	New.
	(optional()): Make constexpr and default.
	(optional(_Up&&), optional(const optional<_Up>&),
	optional(optional<_Up>&& __t): New.
	(operator=(_Up&&)): Constrain.
	(operator=(const optional<_Up>&), operator=(optional<_Up>&&)): New.
	* testsuite/experimental/optional/cons/value.cc:
	Add tests for the functionality added by LWG 2451.
	* testsuite/experimental/optional/cons/value_neg.cc: New.

From-SVN: r238049

This patch improves the accuracy of the Cortex-A53 integer scheduler, 
resulting in performance gains across a wide range of benchmarks.

    gcc/
	* config/arm/cortex-a53.md: Use final_presence_set for in-order.
	(cortex_a53_shift): Add mov_shift.
	(cortex_a53_shift_reg): Add new reservation for register shifts.
	(cortex_a53_alu): Remove bfm.
	(cortex_a53_alu_shift): Add bfm, remove mov_shift.
	(cortex_a53_alu_extr): Add new reservation for EXTR.
	(bypasses): Improve bypass modelling.

From-SVN: r238048

2016-07-06  Javier Miranda  <miranda@adacore.com>

	* sem_ch7.adb (Analyze_Package_Specification): Insert its
	freezing nodes after the last declaration. Needed to ensure
	that global entities referenced in aspects of frozen types are
	properly handled.
	* freeze.adb (Freeze_Entity): Minor code reorganization to ensure
	that freezing nodes of generic packages are handled.
	* sem_ch13.adb (Freeze_Entity_Checks): Handle N_Freeze_Generic nodes.
	* sem_ch12.adb (Save_References_In_Identifier): Handle selected
	components which denote a named number that is constant folded
	in the analyzed copy of the tree.

From-SVN: r238047

    gcc/testsuite/
	* gcc.target/arm/vst1Q_laneu64-1.c (foo): Use unsigned char*.

From-SVN: r238046

2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>

	* exp_aggr.adb Remove with and use clauses for Exp_Ch11 and Inline.
	(Initialize_Array_Component): Protect the initialization
	statements in an abort defer / undefer block when the associated
	component is controlled.
	(Initialize_Record_Component): Protect the initialization statements
	in an abort defer / undefer block when the associated component is
	controlled.
	(Process_Transient_Component_Completion): Use Build_Abort_Undefer_Block
	to create an abort defer / undefer block.
	* exp_ch3.adb Remove with and use clauses for Exp_ch11 and Inline.
	(Default_Initialize_Object): Use Build_Abort_Undefer_Block to
	create an abort defer / undefer block.
	* exp_ch5.adb (Expand_N_Assignment_Statement): Mark an abort
	defer / undefer block as such.
	* exp_ch9.adb (Find_Enclosing_Context): Do not consider an abort
	defer / undefer block as a suitable context for an activation
	chain or a master.
	* exp_util.adb Add with and use clauses for Exp_Ch11.
	(Build_Abort_Undefer_Block): New routine.
	* exp_util.ads (Build_Abort_Undefer_Block): New routine.
	* sinfo.adb (Is_Abort_Block): New routine.
	(Set_Is_Abort_Block): New routine.
	* sinfo.ads New attribute Is_Abort_Block along with occurrences
	in nodes.
	(Is_Abort_Block): New routine along with pragma Inline.
	(Set_Is_Abort_Block): New routine along with pragma Inline.

2016-07-06  Justin Squirek  <squirek@adacore.com>

	* sem_ch4.adb (Analyze_One_Call): Add a conditional to handle
	disambiguation.

From-SVN: r238045

2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>

	* einfo.adb Flag252 is now used as Is_Finalized_Transient. Flag295
	is now used as Is_Ignored_Transient.
	(Is_Finalized_Transient): New routine.
	(Is_Ignored_Transient): New routine.
	(Is_Processed_Transient): Removed.
	(Set_Is_Finalized_Transient): New routine.
	(Set_Is_Ignored_Transient): New routine.
	(Set_Is_Processed_Transient): Removed.
	(Write_Entity_Flags): Output Flag252 and Flag295.
	* einfo.ads: New attributes Is_Finalized_Transient
	and Is_Ignored_Transient along with occurrences in
	entities. Remove attribute Is_Processed_Transient.
	(Is_Finalized_Transient): New routine along with pragma Inline.
	(Is_Ignored_Transient): New routine along with pragma Inline.
	(Is_Processed_Transient): Removed along with pragma Inline.
	(Set_Is_Finalized_Transient): New routine along with pragma Inline.
	(Set_Is_Ignored_Transient): New routine along with pragma Inline.
	(Set_Is_Processed_Transient): Removed along with pragma Inline.
	* exp_aggr.adb Add with and use clauses for Exp_Ch11 and Inline.
	(Build_Record_Aggr_Code): Change the handling
	of controlled record components.
	(Ctrl_Init_Expression): Removed.
	(Gen_Assign): Add new formal parameter In_Loop
	along with comment on usage.  Remove local variables Stmt and
	Stmt_Expr. Change the handling of controlled array components.
	(Gen_Loop): Update the call to Gen_Assign.
	(Gen_While): Update the call to Gen_Assign.
	(Initialize_Array_Component): New routine.
	(Initialize_Ctrl_Array_Component): New routine.
	(Initialize_Ctrl_Record_Component): New routine.
	(Initialize_Record_Component): New routine.
	(Process_Transient_Component): New routine.
	(Process_Transient_Component_Completion): New routine.
	* exp_ch4.adb (Process_Transient_In_Expression): New routine.
	(Process_Transient_Object): Removed. Replace all existing calls
	to this routine with calls to Process_Transient_In_Expression.
	* exp_ch6.adb (Expand_Ctrl_Function_Call): Remove local constant
	Is_Elem_Ref. Update the comment on ignoring transients.
	* exp_ch7.adb (Process_Declarations): Do not process ignored
	or finalized transient objects.
	(Process_Transient_In_Scope): New routine.
	(Process_Transients_In_Scope): New routine.
	(Process_Transient_Objects): Removed. Replace all existing calls
	to this routine with calls to Process_Transients_In_Scope.
	* exp_util.adb (Build_Transient_Object_Statements): New routine.
	(Is_Finalizable_Transient): Do not consider a transient object
	which has been finalized.
	(Requires_Cleanup_Actions): Do not consider ignored or finalized
	transient objects.
	* exp_util.ads (Build_Transient_Object_Statements): New routine.
	* sem_aggr.adb: Major code clean up.
	* sem_res.adb: Update documentation.

2016-07-06  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch3.adb (Analyze_Subtype_Declaration): For generated
	subtypes, such as actual subtypes of unconstrained formals,
	inherit predicate functions, if any, from the parent type rather
	than creating redundant new ones.

From-SVN: r238044

2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>

	* exp_attr.adb, sem_attr.adb, sem_ch13.adb: Minor reformatting.

2016-07-06  Arnaud Charlet  <charlet@adacore.com>

	* lib.adb (Check_Same_Extended_Unit): Prevent looping forever.
	* gnatbind.adb: Disable some consistency checks in codepeer mode,
	which are not needed.

2016-07-06  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch12.adb (Check_Fixed_Point_Actual): Add a warning when
	a formal fixed point type is instantiated with a type that has
	a user-defined arithmetic operations, but the generic has no
	corresponding formal functions. This is worth a warning because
	of the special semantics of fixed-point operators.

From-SVN: r238043

2016-07-06  Bob Duff  <duff@adacore.com>

	* sem_attr.adb (Analyze_Attribute): Allow any expression of
	discrete type.
	* exp_attr.adb (Expand_N_Attribute_Reference): Change the
	constant-folding code to correctly handle cases newly allowed
	by Analyze_Attribute.

From-SVN: r238042

Fix PR target/50739

This patch fixes a problem with fmerge-all-constants and the progmem
attribute.

gcc/

	PR target/50739	
	* config/avr/avr.c (avr_asm_select_section): Strip off
	SECTION_DECLARED from flags when calling get_section.

testsuite/

	PR target/50739	
	* gcc.target/avr/pr50739.c: New test

From-SVN: r238041

From-SVN: r238040

This patch uses the vect_memory_access_type from patch 6 to represent
the effect of a negative contiguous stride or a zero stride.  The latter
is valid only for loads.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* tree-vectorizer.h (vect_memory_access_type): Add
	VMAT_INVARIANT, VMAT_CONTIGUOUS_DOWN and VMAT_CONTIGUOUS_REVERSED.
	* tree-vect-stmts.c (compare_step_with_zero): New function.
	(perm_mask_for_reverse): Move further up file.
	(get_group_load_store_type): Stick to VMAT_ELEMENTWISE if the
	step is negative.
	(get_negative_load_store_type): New function.
	(get_load_store_type): Call it.  Add an ncopies argument.
	(vectorizable_mask_load_store): Update call accordingly and
	remove tests for negative steps.
	(vectorizable_store, vectorizable_load): Likewise.  Handle new
	memory_access_types.

From-SVN: r238039

This is the main patch in the series.  It adds a new enum and routines
for classifying a vector load or store implementation.

Originally there were three motivations:

      (1) Reduce cut-&-paste

      (2) Make the chosen vectorisation strategy more obvious.  At the
          moment this is derived implicitly from various other bits of
          state (GROUPED, STRIDED, SLP, etc.)

      (3) Decouple the vectorisation strategy from those other bits of state,
          so that there can be a choice of implementation for a given scalar
          statement.  The specific problem here is that we class:

              for (...)
                {
                  ... = a[i * x];
                  ... = a[i * x + 1];
                }

          as "strided and grouped" but:

              for (...)
                {
                  ... = a[i * 7];
                  ... = a[i * 7 + 1];
                }

          as "non-strided and grouped".  Before the patch, "strided and
          grouped" loads would always try to use separate scalar loads
          while "non-strided and grouped" loads would always try to use
          load-and-permute.  But load-and-permute is never supported for
          a group size of 7, so the effect was that the first loop was
          vectorisable and the second wasn't.  It seemed odd that not
          knowing x (but accepting it could be 7) would allow more
          optimisation opportunities than knowing x is 7.

Unfortunately, it looks like we underestimate the cost of separate
scalar accesses on at least aarch64, so I've disabled (3) for now;
see the "if" statement at the end of get_load_store_type.  I think
the patch still does (1) and (2), so that's the justification for
it in its current form.  It also means that (3) is now simply a
case of removing the FIXME code, once the cost model problems have
been sorted out.  (I did wonder about adding a --param, but that
seems overkill.  I hope to get back to this during GCC 7 stage 1.)

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* tree-vectorizer.h (vect_memory_access_type): New enum.
	(_stmt_vec_info): Add a memory_access_type field.
	(STMT_VINFO_MEMORY_ACCESS_TYPE): New macro.
	(vect_model_store_cost): Take an access type instead of a boolean.
	(vect_model_load_cost): Likewise.
	* tree-vect-slp.c (vect_analyze_slp_cost_1): Update calls to
	vect_model_store_cost and vect_model_load_cost.
	* tree-vect-stmts.c (vec_load_store_type): New enum.
	(vect_model_store_cost): Take an access type instead of a
	store_lanes_p boolean.  Simplify tests.
	(vect_model_load_cost): Likewise, but for load_lanes_p.
	(get_group_load_store_type, get_load_store_type): New functions.
	(vectorizable_store): Use get_load_store_type.  Record the access
	type in STMT_VINFO_MEMORY_ACCESS_TYPE.
	(vectorizable_load): Likewise.
	(vectorizable_mask_load_store): Likewise.  Replace is_store
	variable with vls_type.

From-SVN: r238038

This patch moves the fix for PR65518 to the code that checks whether
load-and-permute operations are supported.   If the group size is
greater than the vectorisation factor, it would still be possible
to fall back to elementwise loads (as for strided groups) rather
than fail vectorisation entirely.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* tree-vectorizer.h (vect_grouped_load_supported): Add a
	single_element_p parameter.
	* tree-vect-data-refs.c (vect_grouped_load_supported): Likewise.
	Check the PR65518 case here rather than in vectorizable_load.
	* tree-vect-loop.c (vect_analyze_loop_2): Update call accordignly.
	* tree-vect-stmts.c (vectorizable_load): Likewise.

From-SVN: r238037

This patch just refactors the gather/scatter support so that all
information is in a single structure, rather than separate variables.
This reduces the number of arguments to a function added in patch 6.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* tree-vectorizer.h (gather_scatter_info): New structure.
	(vect_check_gather_scatter): Return a bool rather than a decl.
	Replace return-by-pointer arguments with a single
	gather_scatter_info *.
	* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
	(vect_analyze_data_refs): Update call accordingly.
	* tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise.
	(vectorizable_mask_load_store): Likewise.  Also record the
	offset dt and vectype in the gather_scatter_info.
	(vectorizable_store): Likewise.
	(vectorizable_load): Likewise.

From-SVN: r238036

vect_model_store_cost had:

      /* Costs of the stores.  */
      if (STMT_VINFO_STRIDED_P (stmt_info)
          && !STMT_VINFO_GROUPED_ACCESS (stmt_info))
        {
          /* N scalar stores plus extracting the elements.  */
          inside_cost += record_stmt_cost (body_cost_vec,
				       ncopies * TYPE_VECTOR_SUBPARTS (vectype),
				       scalar_store, stmt_info, 0, vect_body);

But non-SLP strided groups also use individual scalar stores rather than
vector stores, so I think we should skip this only for SLP groups.

The same applies to vect_model_load_cost.

Tested on aarch64-linux-gnu and x86_64-linux-gnu.

gcc/
	* tree-vect-stmts.c (vect_model_store_cost): For non-SLP
	strided groups, use the cost of N scalar accesses instead
	of ncopies vector accesses.
	(vect_model_load_cost): Likewise.

From-SVN: r238035