Commit ff77f6e8 by Kito Cheng Committed by Chung-Ju Wu

[NDS32] Add new option -mvh.

gcc/
	* config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define
	__NDS32_VH__ macro.
	* config/nds32/nds32.opt (mvh): New option.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r258427
parent 72b7e5e1
2018-03-11 Kito Cheng <kito.cheng@gmail.com>
Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define
__NDS32_VH__ macro.
* config/nds32/nds32.opt (mvh): New option.
2018-03-11 Kito Cheng <kito.cheng@gmail.com>
Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32-protos.h (nds32_cpu_cpp_builtins): Declare
function.
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): New function.
......
......@@ -2788,6 +2788,8 @@ nds32_cpu_cpp_builtins(struct cpp_reader *pfile)
builtin_define ("__NDS32_16_BIT__");
if (TARGET_GP_DIRECT)
builtin_define ("__NDS32_GP_DIRECT__");
if (TARGET_VH)
builtin_define ("__NDS32_VH__");
if (TARGET_BIG_ENDIAN)
builtin_define ("__big_endian__");
......
......@@ -77,6 +77,10 @@ m16-bit
Target Report Mask(16_BIT)
Generate 16-bit instructions.
mvh
Target Report Mask(VH)
Enable Virtual Hosting support.
misr-vector-size=
Target RejectNegative Joined UInteger Var(nds32_isr_vector_size) Init(NDS32_DEFAULT_ISR_VECTOR_SIZE)
Specify the size of each interrupt vector, which must be 4 or 16.
......
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