Commit ff534e89 by H.J. Lu Committed by H.J. Lu

Revert the part of r160394 to fix bootstap with --with-arch=atom.

2010-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	PR boostrap/44470
	* config/i386/i386.md (*add<mode>_1): Revert revision 160394.
	(*addsi_1_zext) <TYPE_LEA>: Likewise.
	(add lea splitter): Likewise.
	(add_zext lea splitter): Likewise.

From-SVN: r160557
parent 9c4d7e52
2010-06-10 H.J. Lu <hongjiu.lu@intel.com>
PR boostrap/44470
* config/i386/i386.md (*add<mode>_1): Revert revision 160394.
(*addsi_1_zext) <TYPE_LEA>: Likewise.
(add lea splitter): Likewise.
(add_zext lea splitter): Likewise.
2010-06-10 Joseph Myers <joseph@codesourcery.com> 2010-06-10 Joseph Myers <joseph@codesourcery.com>
* common.opt (fshow-column): Don't mark as C ObjC C++ ObjC++. * common.opt (fshow-column): Don't mark as C ObjC C++ ObjC++.
......
...@@ -6077,17 +6077,18 @@ ...@@ -6077,17 +6077,18 @@
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*add<mode>_1" (define_insn "*add<mode>_1"
[(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r") [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
(plus:SWI48 (plus:SWI48
(match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r") (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
(match_operand:SWI48 2 "<general_operand>" "<g>,r<i>,l<i>"))) (match_operand:SWI48 2 "<general_operand>" "<g>,r<i>,0,l<i>")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (PLUS, <MODE>mode, operands)" "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
{ {
switch (get_attr_type (insn)) switch (get_attr_type (insn))
{ {
case TYPE_LEA: case TYPE_LEA:
return "#"; operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0));
return "lea{<imodesuffix>}\t{%a2, %0|%0, %a2}";
case TYPE_INCDEC: case TYPE_INCDEC:
gcc_assert (rtx_equal_p (operands[0], operands[1])); gcc_assert (rtx_equal_p (operands[0], operands[1]));
...@@ -6100,6 +6101,10 @@ ...@@ -6100,6 +6101,10 @@
} }
default: default:
/* Use add as much as possible to replace lea for AGU optimization. */
if (which_alternative == 2 && TARGET_OPT_AGU)
return "add{<imodesuffix>}\t{%1, %0|%0, %1}";
gcc_assert (rtx_equal_p (operands[0], operands[1])); gcc_assert (rtx_equal_p (operands[0], operands[1]));
if (x86_maybe_negate_const_int (&operands[2], <MODE>mode)) if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
return "sub{<imodesuffix>}\t{%2, %0|%0, %2}"; return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
...@@ -6108,8 +6113,11 @@ ...@@ -6108,8 +6113,11 @@
} }
} }
[(set (attr "type") [(set (attr "type")
(cond [(eq_attr "alternative" "2") (cond [(and (eq_attr "alternative" "2")
(eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
(const_string "lea") (const_string "lea")
(eq_attr "alternative" "3")
(const_string "lea")
(match_operand:SWI48 2 "incdec_operand" "") (match_operand:SWI48 2 "incdec_operand" "")
(const_string "incdec") (const_string "incdec")
] ]
...@@ -6138,7 +6146,8 @@ ...@@ -6138,7 +6146,8 @@
switch (get_attr_type (insn)) switch (get_attr_type (insn))
{ {
case TYPE_LEA: case TYPE_LEA:
return "#"; operands[2] = XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0);
return "lea{l}\t{%a2, %k0|%k0, %a2}";
case TYPE_INCDEC: case TYPE_INCDEC:
if (operands[2] == const1_rtx) if (operands[2] == const1_rtx)
...@@ -6389,64 +6398,6 @@ ...@@ -6389,64 +6398,6 @@
(const_string "none"))) (const_string "none")))
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "x86_64_nonmemory_operand" "")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && reload_completed
&& ix86_lea_for_add_ok (PLUS, insn, operands)"
[(set (match_dup 0)
(plus:DI (match_dup 1)
(match_dup 2)))]
"")
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand 0 "register_operand" "")
(plus (match_operand 1 "register_operand" "")
(match_operand 2 "nonmemory_operand" "")))
(clobber (reg:CC FLAGS_REG))]
"reload_completed
&& ix86_lea_for_add_ok (PLUS, insn, operands)
&& GET_MODE_SIZE (GET_MODE (operands[0])) <= 4"
[(const_int 0)]
{
rtx pat;
enum machine_mode mode = GET_MODE (operands[0]);
if (GET_MODE_SIZE (mode) < 4)
operands[0] = gen_lowpart (SImode, operands[0]);
if (mode != Pmode)
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_lowpart (Pmode, operands[2]);
}
pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
if (Pmode != SImode)
pat = gen_rtx_SUBREG (SImode, pat, 0);
emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
DONE;
})
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(zero_extend:DI
(plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" ""))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && reload_completed
&& ix86_lea_for_add_ok (PLUS, insn, operands)"
[(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_lowpart (Pmode, operands[2]);
})
(define_insn "*add<mode>_2" (define_insn "*add<mode>_2"
[(set (reg FLAGS_REG) [(set (reg FLAGS_REG)
(compare (compare
...@@ -6988,6 +6939,60 @@ ...@@ -6988,6 +6939,60 @@
} }
[(set_attr "type" "lea") [(set_attr "type" "lea")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "x86_64_nonmemory_operand" "")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && reload_completed
&& ix86_lea_for_add_ok (PLUS, insn, operands)"
[(set (match_dup 0)
(plus:DI (match_dup 1)
(match_dup 2)))]
"")
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand 0 "register_operand" "")
(plus (match_operand 1 "register_operand" "")
(match_operand 2 "nonmemory_operand" "")))
(clobber (reg:CC FLAGS_REG))]
"reload_completed && ix86_lea_for_add_ok (PLUS, insn, operands)"
[(const_int 0)]
{
rtx pat;
/* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
may confuse gen_lowpart. */
if (GET_MODE (operands[0]) != Pmode)
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_lowpart (Pmode, operands[2]);
}
operands[0] = gen_lowpart (SImode, operands[0]);
pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
if (Pmode != SImode)
pat = gen_rtx_SUBREG (SImode, pat, 0);
emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
DONE;
})
;; Convert lea to the lea pattern to avoid flags dependency.
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(zero_extend:DI
(plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" ""))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && reload_completed
&& true_regnum (operands[0]) != true_regnum (operands[1])"
[(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_lowpart (Pmode, operands[2]);
})
;; Subtract instructions ;; Subtract instructions
......
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