Commit ff24b820 by Stephane Carrez Committed by Stephane Carrez

re PR target/14457 (ICE with simple c++ source)

	PR target/14457
	* config/m68hc11/m68hc11.c (splitable_operand): New predicate.
	* config/m68hc11/m68hc11-protos.h (splitable_operand): Declare.
	* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register it.
	(inhibit_libc): Must define.
	* config/m68hc11/m68hc11.md ("movhi_const0"): Use splitable_operand.
	("*andhi3_gen", "iorhi3", "*iorhi3_gen"): Likewise.
	("xorhi3"): Likewise.

From-SVN: r82670
parent 2ddbba80
2004-06-06 Stephane Carrez <stcarrez@nerim.fr>
PR target/14457
* config/m68hc11/m68hc11.c (splitable_operand): New predicate.
* config/m68hc11/m68hc11-protos.h (splitable_operand): Declare.
* config/m68hc11/m68hc11.h (PREDICATE_CODES): Register it.
(inhibit_libc): Must define.
* config/m68hc11/m68hc11.md ("movhi_const0"): Use splitable_operand.
("*andhi3_gen", "iorhi3", "*iorhi3_gen"): Likewise.
("xorhi3"): Likewise.
2004-06-06 Eric Botcazou <ebotcazou@libertysurf.fr>
* cgraphunit.c (cgraph_decide_inlining): Adjust dump lines in
......
/* Prototypes for exported functions defined in m68hc11.c
Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GCC.
......@@ -104,6 +104,7 @@ extern int memory_reload_operand (rtx, enum machine_mode);
extern int stack_register_operand (rtx, enum machine_mode);
extern int d_register_operand (rtx, enum machine_mode);
extern int hard_addr_reg_operand (rtx, enum machine_mode);
extern int splitable_operand (rtx, enum machine_mode);
extern int arith_src_operand (rtx, enum machine_mode);
extern int m68hc11_logical_operator (rtx, enum machine_mode);
extern int m68hc11_arith_operator (rtx, enum machine_mode);
......
......@@ -1010,6 +1010,24 @@ non_push_operand (rtx operand, enum machine_mode mode)
}
int
splitable_operand (rtx operand, enum machine_mode mode)
{
if (general_operand (operand, mode) == 0)
return 0;
if (push_operand (operand, mode) == 1)
return 0;
/* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
need to split such addresses to access the low and high part but it
is not possible to express a valid address for the low part. */
if (mode != QImode && GET_CODE (operand) == MEM
&& GET_CODE (XEXP (operand, 0)) == MEM)
return 0;
return 1;
}
int
reg_or_some_mem_operand (rtx operand, enum machine_mode mode)
{
if (GET_CODE (operand) == MEM)
......
......@@ -92,7 +92,9 @@ Note:
while (0)
/* As an embedded target, we have no libc. */
#define inhibit_libc
#ifndef inhibit_libc
# define inhibit_libc
#endif
/* Forward type declaration for prototypes definitions.
rtx_ptr is equivalent to rtx. Can't use the same name. */
......@@ -1633,6 +1635,7 @@ do { \
{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
{"m68hc11_eq_compare_operator", {EQ, NE}}, \
{"non_push_operand", {SUBREG, REG, MEM}}, \
{"splitable_operand", {SUBREG, REG, MEM}}, \
{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
{"tst_operand", {SUBREG, REG, MEM}}, \
{"cmp_operand", {SUBREG, REG, MEM, SYMBOL_REF, LABEL_REF, \
......
......@@ -885,7 +885,7 @@
}")
(define_insn "movhi_const0"
[(set (match_operand:HI 0 "non_push_operand" "=d,A,um")
[(set (match_operand:HI 0 "splitable_operand" "=d,A,um")
(const_int 0))]
""
"@
......@@ -3230,8 +3230,8 @@
(define_insn "*andhi3_gen"
[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
(and:HI (match_operand:HI 1 "register_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "mi,!u*A,!um*A")))]
(and:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
(match_operand:HI 2 "splitable_operand" "mi,!u*A,!um*Ai")))]
""
"*
{
......@@ -3371,7 +3371,7 @@
(define_expand "iorhi3"
[(set (match_operand:HI 0 "register_operand" "")
(ior:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "general_operand" "")))]
(match_operand:HI 2 "splitable_operand" "")))]
""
"")
......@@ -3459,8 +3459,8 @@
(define_insn "*iorhi3_gen"
[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
(ior:HI (match_operand:HI 1 "register_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "mi,!u*A,!um*A")))]
(ior:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
(match_operand:HI 2 "splitable_operand" "mi,!u*A,!um*Ai")))]
""
"*
{
......@@ -3589,8 +3589,8 @@
(define_insn "xorhi3"
[(set (match_operand:HI 0 "register_operand" "=d,d,!*A")
(xor:HI (match_operand:HI 1 "register_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "im,!u*A,!ium*A")))]
(xor:HI (match_operand:HI 1 "splitable_operand" "%0,0,0")
(match_operand:HI 2 "splitable_operand" "im,!u*A,!ium*A")))]
""
"*
{
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment