Commit fef37404 by Vladimir Makarov Committed by Vladimir Makarov

re PR rtl-optimization/59511 (FAIL: gcc.target/i386/pr36222-1.c…

re PR rtl-optimization/59511 (FAIL: gcc.target/i386/pr36222-1.c scan-assembler-not movdqa with -mtune=corei7)

2014-01-15  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/59511
	* ira.c (ira_init_register_move_cost): Use memory costs for some
	cases of register move cost calculations.
	* lra-constraints.c (lra_constraints): Use REG_FREQ_FROM_BB
	instead of BB frequency.
	* lra-coalesce.c (move_freq_compare_func, lra_coalesce): Ditto.
	* lra-assigns.c (find_hard_regno_for): Ditto.

From-SVN: r206636
parent 348aa1da
2014-01-15 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/59511
* ira.c (ira_init_register_move_cost): Use memory costs for some
cases of register move cost calculations.
* lra-constraints.c (lra_constraints): Use REG_FREQ_FROM_BB
instead of BB frequency.
* lra-coalesce.c (move_freq_compare_func, lra_coalesce): Ditto.
* lra-assigns.c (find_hard_regno_for): Ditto.
2014-01-15 Richard Biener <rguenther@suse.de> 2014-01-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/59822 PR tree-optimization/59822
......
...@@ -1574,21 +1574,30 @@ ira_init_register_move_cost (enum machine_mode mode) ...@@ -1574,21 +1574,30 @@ ira_init_register_move_cost (enum machine_mode mode)
&& ira_may_move_out_cost[mode] == NULL); && ira_may_move_out_cost[mode] == NULL);
ira_assert (have_regs_of_mode[mode]); ira_assert (have_regs_of_mode[mode]);
for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++) for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++)
if (contains_reg_of_mode[cl1][mode]) for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++)
for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) {
{ int cost;
int cost; if (!contains_reg_of_mode[cl1][mode]
if (!contains_reg_of_mode[cl2][mode]) || !contains_reg_of_mode[cl2][mode])
cost = 65535; {
else if ((ira_reg_class_max_nregs[cl1][mode]
{ > ira_class_hard_regs_num[cl1])
cost = register_move_cost (mode, (enum reg_class) cl1, || (ira_reg_class_max_nregs[cl2][mode]
(enum reg_class) cl2); > ira_class_hard_regs_num[cl2]))
ira_assert (cost < 65535); cost = 65535;
} else
all_match &= (last_move_cost[cl1][cl2] == cost); cost = (ira_memory_move_cost[mode][cl1][0]
last_move_cost[cl1][cl2] = cost; + ira_memory_move_cost[mode][cl2][1]);
} }
else
{
cost = register_move_cost (mode, (enum reg_class) cl1,
(enum reg_class) cl2);
ira_assert (cost < 65535);
}
all_match &= (last_move_cost[cl1][cl2] == cost);
last_move_cost[cl1][cl2] = cost;
}
if (all_match && last_mode_for_init_move_cost != -1) if (all_match && last_mode_for_init_move_cost != -1)
{ {
ira_register_move_cost[mode] ira_register_move_cost[mode]
...@@ -1604,58 +1613,51 @@ ira_init_register_move_cost (enum machine_mode mode) ...@@ -1604,58 +1613,51 @@ ira_init_register_move_cost (enum machine_mode mode)
ira_may_move_in_cost[mode] = XNEWVEC (move_table, N_REG_CLASSES); ira_may_move_in_cost[mode] = XNEWVEC (move_table, N_REG_CLASSES);
ira_may_move_out_cost[mode] = XNEWVEC (move_table, N_REG_CLASSES); ira_may_move_out_cost[mode] = XNEWVEC (move_table, N_REG_CLASSES);
for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++) for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++)
if (contains_reg_of_mode[cl1][mode]) for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++)
for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) {
{ int cost;
int cost; enum reg_class *p1, *p2;
enum reg_class *p1, *p2;
if (last_move_cost[cl1][cl2] == 65535)
if (last_move_cost[cl1][cl2] == 65535) {
{ ira_register_move_cost[mode][cl1][cl2] = 65535;
ira_register_move_cost[mode][cl1][cl2] = 65535; ira_may_move_in_cost[mode][cl1][cl2] = 65535;
ira_may_move_in_cost[mode][cl1][cl2] = 65535; ira_may_move_out_cost[mode][cl1][cl2] = 65535;
ira_may_move_out_cost[mode][cl1][cl2] = 65535; }
} else
else {
{ cost = last_move_cost[cl1][cl2];
cost = last_move_cost[cl1][cl2];
for (p2 = &reg_class_subclasses[cl2][0];
for (p2 = &reg_class_subclasses[cl2][0]; *p2 != LIM_REG_CLASSES; p2++)
*p2 != LIM_REG_CLASSES; p2++) if (ira_class_hard_regs_num[*p2] > 0
if (ira_class_hard_regs_num[*p2] > 0 && (ira_reg_class_max_nregs[*p2][mode]
&& (ira_reg_class_max_nregs[*p2][mode] <= ira_class_hard_regs_num[*p2]))
<= ira_class_hard_regs_num[*p2])) cost = MAX (cost, ira_register_move_cost[mode][cl1][*p2]);
cost = MAX (cost, ira_register_move_cost[mode][cl1][*p2]);
for (p1 = &reg_class_subclasses[cl1][0];
for (p1 = &reg_class_subclasses[cl1][0]; *p1 != LIM_REG_CLASSES; p1++)
*p1 != LIM_REG_CLASSES; p1++) if (ira_class_hard_regs_num[*p1] > 0
if (ira_class_hard_regs_num[*p1] > 0 && (ira_reg_class_max_nregs[*p1][mode]
&& (ira_reg_class_max_nregs[*p1][mode] <= ira_class_hard_regs_num[*p1]))
<= ira_class_hard_regs_num[*p1])) cost = MAX (cost, ira_register_move_cost[mode][*p1][cl2]);
cost = MAX (cost, ira_register_move_cost[mode][*p1][cl2]);
ira_assert (cost <= 65535);
ira_assert (cost <= 65535); ira_register_move_cost[mode][cl1][cl2] = cost;
ira_register_move_cost[mode][cl1][cl2] = cost;
if (ira_class_subset_p[cl1][cl2])
if (ira_class_subset_p[cl1][cl2]) ira_may_move_in_cost[mode][cl1][cl2] = 0;
ira_may_move_in_cost[mode][cl1][cl2] = 0; else
else ira_may_move_in_cost[mode][cl1][cl2] = cost;
ira_may_move_in_cost[mode][cl1][cl2] = cost;
if (ira_class_subset_p[cl2][cl1])
if (ira_class_subset_p[cl2][cl1]) ira_may_move_out_cost[mode][cl1][cl2] = 0;
ira_may_move_out_cost[mode][cl1][cl2] = 0; else
else ira_may_move_out_cost[mode][cl1][cl2] = cost;
ira_may_move_out_cost[mode][cl1][cl2] = cost; }
} }
}
else
for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++)
{
ira_register_move_cost[mode][cl1][cl2] = 65535;
ira_may_move_in_cost[mode][cl1][cl2] = 65535;
ira_may_move_out_cost[mode][cl1][cl2] = 65535;
}
} }
/* This is called once during compiler work. It sets up /* This is called once during compiler work. It sets up
......
...@@ -612,7 +612,9 @@ find_hard_regno_for (int regno, int *cost, int try_only_hard_regno) ...@@ -612,7 +612,9 @@ find_hard_regno_for (int regno, int *cost, int try_only_hard_regno)
&& ! df_regs_ever_live_p (hard_regno + j)) && ! df_regs_ever_live_p (hard_regno + j))
/* It needs save restore. */ /* It needs save restore. */
hard_regno_costs[hard_regno] hard_regno_costs[hard_regno]
+= 2 * ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->frequency + 1; += (2
* REG_FREQ_FROM_BB (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb)
+ 1);
priority = targetm.register_priority (hard_regno); priority = targetm.register_priority (hard_regno);
if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost
|| (hard_regno_costs[hard_regno] == best_cost || (hard_regno_costs[hard_regno] == best_cost
......
...@@ -79,8 +79,8 @@ move_freq_compare_func (const void *v1p, const void *v2p) ...@@ -79,8 +79,8 @@ move_freq_compare_func (const void *v1p, const void *v2p)
rtx mv2 = *(const rtx *) v2p; rtx mv2 = *(const rtx *) v2p;
int pri1, pri2; int pri1, pri2;
pri1 = BLOCK_FOR_INSN (mv1)->frequency; pri1 = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv1));
pri2 = BLOCK_FOR_INSN (mv2)->frequency; pri2 = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv2));
if (pri2 - pri1) if (pri2 - pri1)
return pri2 - pri1; return pri2 - pri1;
...@@ -277,7 +277,7 @@ lra_coalesce (void) ...@@ -277,7 +277,7 @@ lra_coalesce (void)
fprintf fprintf
(lra_dump_file, " Coalescing move %i:r%d-r%d (freq=%d)\n", (lra_dump_file, " Coalescing move %i:r%d-r%d (freq=%d)\n",
INSN_UID (mv), sregno, dregno, INSN_UID (mv), sregno, dregno,
BLOCK_FOR_INSN (mv)->frequency); REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv)));
/* We updated involved_insns_bitmap when doing the merge. */ /* We updated involved_insns_bitmap when doing the merge. */
} }
else if (!(lra_intersected_live_ranges_p else if (!(lra_intersected_live_ranges_p
...@@ -291,7 +291,7 @@ lra_coalesce (void) ...@@ -291,7 +291,7 @@ lra_coalesce (void)
" Coalescing move %i:r%d(%d)-r%d(%d) (freq=%d)\n", " Coalescing move %i:r%d(%d)-r%d(%d) (freq=%d)\n",
INSN_UID (mv), sregno, ORIGINAL_REGNO (SET_SRC (set)), INSN_UID (mv), sregno, ORIGINAL_REGNO (SET_SRC (set)),
dregno, ORIGINAL_REGNO (SET_DEST (set)), dregno, ORIGINAL_REGNO (SET_DEST (set)),
BLOCK_FOR_INSN (mv)->frequency); REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv)));
bitmap_ior_into (&involved_insns_bitmap, bitmap_ior_into (&involved_insns_bitmap,
&lra_reg_info[sregno].insn_bitmap); &lra_reg_info[sregno].insn_bitmap);
bitmap_ior_into (&involved_insns_bitmap, bitmap_ior_into (&involved_insns_bitmap,
...@@ -316,7 +316,8 @@ lra_coalesce (void) ...@@ -316,7 +316,8 @@ lra_coalesce (void)
/* Coalesced move. */ /* Coalesced move. */
if (lra_dump_file != NULL) if (lra_dump_file != NULL)
fprintf (lra_dump_file, " Removing move %i (freq=%d)\n", fprintf (lra_dump_file, " Removing move %i (freq=%d)\n",
INSN_UID (insn), BLOCK_FOR_INSN (insn)->frequency); INSN_UID (insn),
REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)));
lra_set_insn_deleted (insn); lra_set_insn_deleted (insn);
} }
} }
......
...@@ -4077,7 +4077,7 @@ lra_constraints (bool first_p) ...@@ -4077,7 +4077,7 @@ lra_constraints (bool first_p)
fprintf (lra_dump_file, fprintf (lra_dump_file,
" Removing equiv init insn %i (freq=%d)\n", " Removing equiv init insn %i (freq=%d)\n",
INSN_UID (curr_insn), INSN_UID (curr_insn),
BLOCK_FOR_INSN (curr_insn)->frequency); REG_FREQ_FROM_BB (BLOCK_FOR_INSN (curr_insn)));
dump_insn_slim (lra_dump_file, curr_insn); dump_insn_slim (lra_dump_file, curr_insn);
} }
if (contains_reg_p (x, true, false)) if (contains_reg_p (x, true, false))
......
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