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Commit fe95f2f7 by Julian Brown Committed by Richard Sandiford
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200x-xx-xx Julian Brown <julian@codesourcery.com> Richard Sandiford <richard@codesourcery.com> 

gcc/
200x-xx-xx  Julian Brown  <julian@codesourcery.com>
	    Richard Sandiford  <richard@codesourcery.com>

	* config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Use TUNE_68030
	instead of TARGET_68030, TUNE_68040 instead of TARGET_68040,
	TUNE_68060 instead of TARGET_68060 and TUNE_CPU32 instead of
	TARGET_CPU32.
	(TARGET_CPU32): Rename to...
	(TUNE_CPU32): ...this.
	(TUNE_68000_10, TUNE_68030, TUNE_68040, TUNE_68060)
	(TUNE_CFV2): New macros.
	* config/m68k/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Simplify;
	remove conditions that are implied by TARGET_68020.
	* config/m68k/m68k.c (m68k_output_function_prologue): Use TUNE_68040
	instead of TARGET_68040 and TUNE_CPU32 instead of TARGET_CPU32.
	(m68k_output_function_epilogue): Likewise.
	(m68k_rtx_costs): Likewise.  Use TUNE_68060 instead of TARGET_68060
	and TUNE_CFV2 instead of TARGET_5200.  Use TUNE_68000_10 instead of
	"!TARGET_68020 && !TARGET_COLDFIRE" to choose between 68000 and
	non-68000 timings.  Refactor multiplication and division costs.
	(output_addsi3): Use TUNE_68040 instead of TARGET_68040 and
	TUNE_CPU32 instead of TARGET_CPU32.
	(standard_68881_constant_p): Use TUNE_68040 instead of TARGET_68040
	and TUNE_68060 instead of TARGET_68060.
	* config/m68k/m68k.md: Use TUNE_68040 instead of TARGET_68040,
	TUNE_68060 instead of TARGET_68060, and TUNE_CPU32 instead of
	TARGET_CPU32.
	(movsi_const0): Use TUNE_68000_10 rather than "!TARGET_68020
	&& !TARGET_COLDFIRE" to choose between moveq and clr.
	Likewise in the unnamed movsf pattern.
	(ashlsi_17_24, lshrsi_17_24): Guard with TUNE_68000_10 rather than
	"!TARGET_68020 && !TARGET_COLDFIRE".  Likewise the unnamed
	ashiftrt pattern.

Co-Authored-By: Richard Sandiford <richard@codesourcery.com>

From-SVN: r120706
parent 9c6de4a1
Showing with 71 additions and 25 deletions
gcc/ChangeLog
2007-01-12 Julian Brown <julian@codesourcery.com>
Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Use TUNE_68030
instead of TARGET_68030, TUNE_68040 instead of TARGET_68040,
TUNE_68060 instead of TARGET_68060 and TUNE_CPU32 instead of
TARGET_CPU32.
(TARGET_CPU32): Rename to...
(TUNE_CPU32): ...this.
(TUNE_68000_10, TUNE_68030, TUNE_68040, TUNE_68060)
(TUNE_CFV2): New macros.
* config/m68k/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Simplify;
remove conditions that are implied by TARGET_68020.
* config/m68k/m68k.c (m68k_output_function_prologue): Use TUNE_68040
instead of TARGET_68040 and TUNE_CPU32 instead of TARGET_CPU32.
(m68k_output_function_epilogue): Likewise.
(m68k_rtx_costs): Likewise. Use TUNE_68060 instead of TARGET_68060
and TUNE_CFV2 instead of TARGET_5200. Use TUNE_68000_10 instead of
"!TARGET_68020 && !TARGET_COLDFIRE" to choose between 68000 and
non-68000 timings. Refactor multiplication and division costs.
(output_addsi3): Use TUNE_68040 instead of TARGET_68040 and
TUNE_CPU32 instead of TARGET_CPU32.
(standard_68881_constant_p): Use TUNE_68040 instead of TARGET_68040
and TUNE_68060 instead of TARGET_68060.
* config/m68k/m68k.md: Use TUNE_68040 instead of TARGET_68040,
TUNE_68060 instead of TARGET_68060, and TUNE_CPU32 instead of
TARGET_CPU32.
(movsi_const0): Use TUNE_68000_10 rather than "!TARGET_68020
&& !TARGET_COLDFIRE" to choose between moveq and clr.
Likewise in the unnamed movsf pattern.
(ashlsi_17_24, lshrsi_17_24): Guard with TUNE_68000_10 rather than
"!TARGET_68020 && !TARGET_COLDFIRE". Likewise the unnamed
ashiftrt pattern.
2007-01-12 Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.h (TARGET_CPU_CPP_BUILTINS): Increase amount
......
gcc/config/m68k/m68k.c
......@@ -550,7 +550,7 @@ m68k_output_function_prologue (FILE *stream,
if (frame_pointer_needed)
{
if (current_frame.size == 0 && TARGET_68040)
if (current_frame.size == 0 && TUNE_68040)
/* on the 68040, pea + move is faster than link.w 0 */
fprintf (stream, (MOTOROLA
? "\tpea (%s)\n\tmove.l %s,%s\n"
......@@ -584,14 +584,14 @@ m68k_output_function_prologue (FILE *stream,
asm_fprintf (stream, "\tsubq" ASM_DOT "l %I%wd,%Rsp\n",
fsize_with_regs);
}
else if (fsize_with_regs <= 16 && TARGET_CPU32)
else if (fsize_with_regs <= 16 && TUNE_CPU32)
/* On the CPU32 it is faster to use two subqw instructions to
subtract a small integer (8 < N <= 16) to a register. */
asm_fprintf (stream,
"\tsubq" ASM_DOT "w %I8,%Rsp\n"
"\tsubq" ASM_DOT "w %I%wd,%Rsp\n",
fsize_with_regs - 8);
else if (TARGET_68040)
else if (TUNE_68040)
/* Adding negative number is faster on the 68040. */
asm_fprintf (stream, "\tadd" ASM_DOT "w %I%wd,%Rsp\n",
-fsize_with_regs);
......@@ -1054,7 +1054,7 @@ m68k_output_function_epilogue (FILE *stream,
asm_fprintf (stream, "\taddq" ASM_DOT "l %I%wd,%Rsp\n",
fsize_with_regs);
}
else if (fsize_with_regs <= 16 && TARGET_CPU32)
else if (fsize_with_regs <= 16 && TUNE_CPU32)
{
/* On the CPU32 it is faster to use two addqw instructions to
add a small integer (8 < N <= 16) to a register. */
......@@ -1065,7 +1065,7 @@ m68k_output_function_epilogue (FILE *stream,
}
else if (fsize_with_regs < 0x8000)
{
if (TARGET_68040)
if (TUNE_68040)
asm_fprintf (stream, "\tadd" ASM_DOT "w %I%wd,%Rsp\n",
fsize_with_regs);
else
......@@ -1634,12 +1634,21 @@ m68k_rtx_costs (rtx x, int code, int outer_code, int *total)
sometimes move insns are needed. */
/* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS
terms. */
#define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 \
: (TARGET_COLDFIRE && !TARGET_5200) ? 3 \
: TARGET_COLDFIRE ? 10 : 13)
#define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 \
: (TARGET_COLDFIRE && !TARGET_5200) ? 2 : 5)
#define DIVW_COST (TARGET_68020 ? 27 : TARGET_CF_HWDIV ? 11 : 12)
#define MULL_COST \
(TUNE_68060 ? 2 \
: TUNE_68040 ? 5 \
: TUNE_CFV2 ? 10 \
: TARGET_COLDFIRE ? 3 : 13)
#define MULW_COST \
(TUNE_68060 ? 2 \
: TUNE_68040 ? 3 \
: TUNE_68000_10 || TUNE_CFV2 ? 5 \
: TARGET_COLDFIRE ? 2 : 8)
#define DIVW_COST \
(TARGET_CF_HWDIV ? 11 \
: TUNE_68000_10 || TARGET_COLDFIRE ? 12 : 27)
case PLUS:
/* An lea costs about three times as much as a simple add. */
......@@ -1661,12 +1670,12 @@ m68k_rtx_costs (rtx x, int code, int outer_code, int *total)
case ASHIFT:
case ASHIFTRT:
case LSHIFTRT:
if (TARGET_68060)
if (TUNE_68060)
{
*total = COSTS_N_INSNS(1);
return true;
}
if (! TARGET_68020 && ! TARGET_COLDFIRE)
if (TUNE_68000_10)
{
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
......@@ -2560,7 +2569,7 @@ output_addsi3 (rtx *operands)
/* On the CPU32 it is faster to use two addql instructions to
add a small integer (8 < N <= 16) to a register.
Likewise for subql. */
if (TARGET_CPU32 && REG_P (operands[0]))
if (TUNE_CPU32 && REG_P (operands[0]))
{
if (INTVAL (operands[2]) > 8
&& INTVAL (operands[2]) <= 16)
......@@ -2579,7 +2588,7 @@ output_addsi3 (rtx *operands)
&& INTVAL (operands[2]) >= -0x8000
&& INTVAL (operands[2]) < 0x8000)
{
if (TARGET_68040)
if (TUNE_68040)
return "add%.w %2,%0";
else
return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0";
......@@ -2780,7 +2789,7 @@ standard_68881_constant_p (rtx x)
/* fmovecr must be emulated on the 68040 and 68060, so it shouldn't be
used at all on those chips. */
if (TARGET_68040 || TARGET_68060)
if (TUNE_68040 || TUNE_68060)
return 0;
if (! inited_68881_table)
......
gcc/config/m68k/m68k.h
......@@ -42,31 +42,31 @@ Boston, MA 02110-1301, USA. */
builtin_define_std ("mc68000"); \
if (TARGET_68040_ONLY) \
{ \
if (TARGET_68060) \
if (TUNE_68060) \
builtin_define_std ("mc68060"); \
else \
builtin_define_std ("mc68040"); \
} \
else if (TARGET_68060) /* -m68020-60 */ \
else if (TUNE_68060) /* -m68020-60 */ \
{ \
builtin_define_std ("mc68060"); \
builtin_define_std ("mc68040"); \
builtin_define_std ("mc68030"); \
builtin_define_std ("mc68020"); \
} \
else if (TARGET_68040) /* -m68020-40 */ \
else if (TUNE_68040) /* -m68020-40 */ \
{ \
builtin_define_std ("mc68040"); \
builtin_define_std ("mc68030"); \
builtin_define_std ("mc68020"); \
} \
else if (TARGET_68030) \
else if (TUNE_68030) \
builtin_define_std ("mc68030"); \
else if (TARGET_68020) \
builtin_define_std ("mc68020"); \
if (TARGET_68881) \
builtin_define ("__HAVE_68881__"); \
if (TARGET_CPU32) \
if (TUNE_CPU32) \
{ \
builtin_define_std ("mc68332"); \
builtin_define_std ("mcpu32"); \
......@@ -113,7 +113,7 @@ Boston, MA 02110-1301, USA. */
/* Compile for a CPU32. A 68020 without bitfields is a good
heuristic for a CPU32. */
#define TARGET_CPU32 (TARGET_68020 && !TARGET_BITFIELD)
#define TUNE_CPU32 (TARGET_68020 && !TARGET_BITFIELD)
/* Is the target a ColdFire? */
#define MASK_COLDFIRE \
......@@ -126,6 +126,11 @@ Boston, MA 02110-1301, USA. */
/* Size (in bytes) of FPU registers. */
#define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12)
#define TUNE_68000_10 (!TARGET_68020 && !TARGET_COLDFIRE)
#define TUNE_68030 TARGET_68030
#define TUNE_68040 TARGET_68040
#define TUNE_68060 TARGET_68060
#define TUNE_CFV2 TARGET_5200
#define OVERRIDE_OPTIONS override_options()
......
gcc/config/m68k/netbsd-elf.h
......@@ -41,9 +41,7 @@ Boston, MA 02110-1301, USA. */
/* Don't try using XFmode on the 68010. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE \
((TARGET_68020 || TARGET_68040 || TARGET_68040_ONLY || \
TARGET_68060) ? 80 : 64)
#define LONG_DOUBLE_TYPE_SIZE (TARGET_68020 ? 80 : 64)
#ifdef __mc68010__
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
......
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