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riscv-gcc-1
Commit fe7f5677 by David Edelsohn Committed by David Edelsohn
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rs6000.h (processor_type): Add PPC405. 

	* rs6000.h (processor_type): Add PPC405.
	(RTX_COSTS): Add PPC405.  Correct rs64 and ppc630 multiply costs.
	* rs6000.md: Add PPC405 information.  Utilize imul2 and imul3 for
	rios1, rs64, and ppc630 processors.

From-SVN: r47853
parent 864962bd
Showing with 78 additions and 17 deletions
gcc/ChangeLog
2001-12-10 David Edelsohn <edelsohn@gnu.org>
* rs6000.h (processor_type): Add PPC405.
(RTX_COSTS): Add PPC405. Correct rs64 and ppc630 multiply costs.
* rs6000.md: Add PPC405 information. Utilize imul2 and imul3 for
rios1, rs64, and ppc630 processors.
2001-12-10 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.md (unaligned_extendhidi): Call gen_lowpart
......
gcc/config/rs6000/rs6000.h
......@@ -382,6 +382,7 @@ enum processor_type
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
......@@ -2306,6 +2307,7 @@ do { \
switch (rs6000_cpu) \
{ \
case PROCESSOR_RIOS1: \
case PROCESSOR_PPC405: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? COSTS_N_INSNS (5) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
......@@ -2315,7 +2317,7 @@ do { \
? GET_MODE (XEXP (X, 1)) != DImode \
? COSTS_N_INSNS (20) : COSTS_N_INSNS (34) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (12) : COSTS_N_INSNS (14)); \
? COSTS_N_INSNS (8) : COSTS_N_INSNS (12)); \
case PROCESSOR_RIOS2: \
case PROCESSOR_MPCCORE: \
case PROCESSOR_PPC604e: \
......@@ -2337,7 +2339,7 @@ do { \
case PROCESSOR_PPC630: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? GET_MODE (XEXP (X, 1)) != DImode \
? COSTS_N_INSNS (4) : COSTS_N_INSNS (7) \
? COSTS_N_INSNS (5) : COSTS_N_INSNS (7) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
} \
......@@ -2363,6 +2365,8 @@ do { \
return COSTS_N_INSNS (6); \
case PROCESSOR_PPC403: \
return COSTS_N_INSNS (33); \
case PROCESSOR_PPC405: \
return COSTS_N_INSNS (35); \
case PROCESSOR_PPC601: \
return COSTS_N_INSNS (36); \
case PROCESSOR_PPC603: \
......
gcc/config/rs6000/rs6000.md
......@@ -56,7 +56,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450"
(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450"
(const (symbol_ref "rs6000_cpu_attr")))
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
......@@ -111,12 +111,12 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "load")
(eq_attr "cpu" "rios1,ppc403,ppc601"))
(eq_attr "cpu" "rios1,ppc403,ppc405,ppc601"))
2 1)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "store,fpstore")
(eq_attr "cpu" "rios1,ppc403,ppc601"))
(eq_attr "cpu" "rios1,ppc403,ppc405,ppc601"))
1 1)
(define_function_unit "fpu" 1 0
......@@ -147,12 +147,12 @@
; Integer Unit (RIOS1, PPC601, PPC603, RS64a)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "integer")
(eq_attr "cpu" "rios1,rs64a,mpccore,ppc403,ppc601,ppc603"))
(eq_attr "cpu" "rios1,rs64a,mpccore,ppc403,ppc405,ppc601,ppc603"))
1 1)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "cr_logical")
(eq_attr "cpu" "mpccore,ppc403,ppc601"))
(eq_attr "cpu" "mpccore,ppc403,ppc405,ppc601"))
1 1)
(define_function_unit "iu" 1 0
......@@ -161,14 +161,49 @@
4 4)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul,imul2,imul3")
(eq_attr "cpu" "rios1,ppc601,ppc603"))
(and (eq_attr "type" "imul")
(eq_attr "cpu" "ppc405"))
4 3)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul2,imul3")
(eq_attr "cpu" "ppc405"))
3 2)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul")
(eq_attr "cpu" "rios1"))
5 5)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul2")
(eq_attr "cpu" "rios1"))
4 4)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul3")
(eq_attr "cpu" "rios1"))
3 3)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul,imul2,imul3")
(eq_attr "cpu" "ppc601,ppc603"))
5 5)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul")
(eq_attr "cpu" "rs64a"))
20 14)
20 20)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul2")
(eq_attr "cpu" "rs64a"))
12 12)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul3")
(eq_attr "cpu" "rs64a"))
8 8)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "lmul")
......@@ -197,6 +232,11 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "idiv")
(eq_attr "cpu" "ppc405"))
35 35)
(define_function_unit "iu" 1 0
(and (eq_attr "type" "idiv")
(eq_attr "cpu" "ppc601"))
36 36)
......@@ -262,18 +302,28 @@
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul,imul2,imul3")
(eq_attr "cpu" "ppc604e"))
2 1)
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul")
(eq_attr "cpu" "ppc620,ppc630"))
5 3)
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "lmul")
(and (eq_attr "type" "imul2")
(eq_attr "cpu" "ppc620,ppc630"))
5 3)
4 3)
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "imul,imul2,imul3")
(eq_attr "cpu" "ppc604e"))
2 1)
(and (eq_attr "type" "imul3")
(eq_attr "cpu" "ppc620,ppc630"))
3 3)
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "lmul")
(eq_attr "cpu" "ppc620,ppc630"))
7 5)
(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "idiv")
......@@ -439,7 +489,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "compare,delayed_compare")
(eq_attr "cpu" "rs64a,mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630"))
(eq_attr "cpu" "rs64a,mpccore,ppc403,ppc405,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630"))
3 1)
; some extra cycles added by TARGET_SCHED_ADJUST_COST between compare
......@@ -503,7 +553,7 @@
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630"))
(eq_attr "cpu" "mpccore,ppc403,ppc405,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630"))
4 1)
(define_function_unit "sru" 1 0
......
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