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Commit fd8c65e7 by Michael Meissner Committed by Pat Haugen
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power8.md: New. 

	* config/rs6000/power8.md: New.
	* config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor
	setting for power8 entry.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md.
	* config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust
	test for Power4/Power5 only.
	(insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8
	support.
	(force_new_group): Adjust comment.
	* config/rs6000/rs6000.md: Include power8.md.


Co-Authored-By: Pat Haugen <pthaugen@us.ibm.com>
Co-Authored-By: Peter Bergner <bergner@vnet.ibm.com>

From-SVN: r200423
parent b24a2ce5
Showing with 75 additions and 6 deletions
gcc/ChangeLog
2013-06-26 Michael Meissner <meissner@linux.vnet.ibm.com>
Pat Haugen <pthaugen@us.ibm.com>
Peter Bergner <bergner@vnet.ibm.com>
* config/rs6000/power8.md: New.
* config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor
setting for power8 entry.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md.
* config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust
test for Power4/Power5 only.
(insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8
support.
(force_new_group): Adjust comment.
* config/rs6000/rs6000.md: Include power8.md.
2013-06-26 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro.
......
gcc/config/rs6000/rs6000-cpus.def
......@@ -181,7 +181,7 @@ RS6000_CPU ("power7", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */
POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
| MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
| MASK_VSX | MASK_RECIP_PRECISION | MASK_VSX_TIMODE)
RS6000_CPU ("power8", PROCESSOR_POWER7, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
gcc/config/rs6000/rs6000.c
......@@ -24196,7 +24196,8 @@ is_microcoded_insn (rtx insn)
if (rs6000_cpu_attr == CPU_CELL)
return get_attr_cell_micro (insn) == CELL_MICRO_ALWAYS;
if (rs6000_sched_groups)
if (rs6000_sched_groups
&& (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))
{
enum attr_type type = get_attr_type (insn);
if (type == TYPE_LOAD_EXT_U
......@@ -24221,7 +24222,8 @@ is_cracked_insn (rtx insn)
|| GET_CODE (PATTERN (insn)) == CLOBBER)
return false;
if (rs6000_sched_groups)
if (rs6000_sched_groups
&& (rs6000_cpu == PROCESSOR_POWER4 || rs6000_cpu == PROCESSOR_POWER5))
{
enum attr_type type = get_attr_type (insn);
if (type == TYPE_LOAD_U || type == TYPE_STORE_U
......@@ -25095,7 +25097,6 @@ insn_must_be_first_in_group (rtx insn)
}
break;
case PROCESSOR_POWER7:
case PROCESSOR_POWER8: /* FIXME */
type = get_attr_type (insn);
switch (type)
......@@ -25130,6 +25131,39 @@ insn_must_be_first_in_group (rtx insn)
break;
}
break;
case PROCESSOR_POWER8:
type = get_attr_type (insn);
switch (type)
{
case TYPE_CR_LOGICAL:
case TYPE_DELAYED_CR:
case TYPE_MFCR:
case TYPE_MFCRF:
case TYPE_MTCR:
case TYPE_COMPARE:
case TYPE_DELAYED_COMPARE:
case TYPE_VAR_DELAYED_COMPARE:
case TYPE_IMUL_COMPARE:
case TYPE_LMUL_COMPARE:
case TYPE_SYNC:
case TYPE_ISYNC:
case TYPE_LOAD_L:
case TYPE_STORE_C:
case TYPE_LOAD_U:
case TYPE_LOAD_UX:
case TYPE_LOAD_EXT:
case TYPE_LOAD_EXT_U:
case TYPE_LOAD_EXT_UX:
case TYPE_STORE_UX:
case TYPE_VECSTORE:
case TYPE_MFJMPR:
case TYPE_MTJMPR:
return true;
default:
break;
}
break;
default:
break;
}
......@@ -25192,7 +25226,6 @@ insn_must_be_last_in_group (rtx insn)
}
break;
case PROCESSOR_POWER7:
case PROCESSOR_POWER8: /* FIXME */
type = get_attr_type (insn);
switch (type)
......@@ -25209,6 +25242,25 @@ insn_must_be_last_in_group (rtx insn)
break;
}
break;
case PROCESSOR_POWER8:
type = get_attr_type (insn);
switch (type)
{
case TYPE_MFCR:
case TYPE_MTCR:
case TYPE_ISYNC:
case TYPE_SYNC:
case TYPE_LOAD_L:
case TYPE_STORE_C:
case TYPE_LOAD_EXT_U:
case TYPE_LOAD_EXT_UX:
case TYPE_STORE_UX:
return true;
default:
break;
}
break;
default:
break;
}
......@@ -25298,7 +25350,7 @@ force_new_group (int sched_verbose, FILE *dump, rtx *group_insns,
if (can_issue_more && !is_branch_slot_insn (next_insn))
can_issue_more--;
/* Power6 and Power7 have special group ending nop. */
/* Do we have a special group ending nop? */
if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7
|| rs6000_cpu_attr == CPU_POWER8)
{
......
gcc/config/rs6000/rs6000.md
......@@ -213,6 +213,7 @@
(include "power5.md")
(include "power6.md")
(include "power7.md")
(include "power8.md")
(include "cell.md")
(include "xfpu.md")
(include "a2.md")
......
gcc/config/rs6000/t-rs6000
......@@ -60,6 +60,7 @@ MD_INCLUDES = $(srcdir)/config/rs6000/rs64.md \
$(srcdir)/config/rs6000/power5.md \
$(srcdir)/config/rs6000/power6.md \
$(srcdir)/config/rs6000/power7.md \
$(srcdir)/config/rs6000/power8.md \
$(srcdir)/config/rs6000/cell.md \
$(srcdir)/config/rs6000/xfpu.md \
$(srcdir)/config/rs6000/a2.md \
......
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