re PR target/79907 (ICE in extract_constrain_insn, at recog.c:2213 on ppc64le)

	PR target/79907
	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Test
	TARGET_UPPER_REGS_DI when setting 'wi' constraint regclass.
	* gcc.target/powerpc/pr79907.c: New.

From-SVN: r246029

gcc/ChangeLog

+2017-03-10  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/79907
+	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Test
+	TARGET_UPPER_REGS_DI when setting 'wi' constraint regclass.
+
 2017-03-10  Martin Liska  <mliska@suse.cz>
 
         PR target/65705

gcc/config/rs6000/rs6000.c

@@ -3182,7 +3182,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
       else
 	rs6000_constraints[RS6000_CONSTRAINT_ws] = FLOAT_REGS;
 
-      if (TARGET_UPPER_REGS_DF)					/* DImode  */
+      if (TARGET_UPPER_REGS_DI)					/* DImode  */
 	rs6000_constraints[RS6000_CONSTRAINT_wi] = VSX_REGS;
       else
 	rs6000_constraints[RS6000_CONSTRAINT_wi] = FLOAT_REGS;

gcc/testsuite/ChangeLog

+2017-03-10  Pat Haugen  <pthaugen@us.ibm.com>
+
+	PR target/79907
+	* gcc.target/powerpc/pr79907.c: New.
+
 2017-03-10  Olivier Hainque  <hainque@adacore.com>
 
 	* gnat.dg/opt64.adb: New test.

gcc/testsuite/gcc.target/powerpc/pr79907.c

+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O3 -mno-upper-regs-df" } */
+
+int foo (short a[], int x)
+{
+  unsigned int i;
+  for (i = 0; i < 1000; i++)
+    {
+      x = a[i];
+      a[i] = (x <= 0 ? 0 : x);
+    }
+  return x;
+}