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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
fc4a0dca
Commit
fc4a0dca
authored
Sep 21, 1994
by
Jim Wilson
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(eliminate_regs): Make test in LOAD_EXTEND_OP case more precise.
From-SVN: r8114
parent
bf8b268a
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gcc/reload1.c
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gcc/reload1.c
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fc4a0dca
...
@@ -2915,7 +2915,11 @@ eliminate_regs (x, mem_mode, insn)
...
@@ -2915,7 +2915,11 @@ eliminate_regs (x, mem_mode, insn)
smaller. So leave the SUBREG then. */
smaller. So leave the SUBREG then. */
&&
!
(
GET_CODE
(
SUBREG_REG
(
x
))
==
REG
&&
!
(
GET_CODE
(
SUBREG_REG
(
x
))
==
REG
&&
GET_MODE_SIZE
(
GET_MODE
(
x
))
<=
UNITS_PER_WORD
&&
GET_MODE_SIZE
(
GET_MODE
(
x
))
<=
UNITS_PER_WORD
&&
GET_MODE_SIZE
(
GET_MODE
(
new
))
<=
UNITS_PER_WORD
)
&&
GET_MODE_SIZE
(
GET_MODE
(
new
))
<=
UNITS_PER_WORD
&&
(
GET_MODE_SIZE
(
GET_MODE
(
x
))
>
GET_MODE_SIZE
(
GET_MODE
(
new
)))
&&
INTEGRAL_MODE_P
(
GET_MODE
(
new
))
&&
LOAD_EXTEND_OP
(
GET_MODE
(
new
))
!=
NIL
)
#endif
#endif
)
)
{
{
...
...
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