Commit fbe5eb6d by Bernd Schmidt Committed by Bernd Schmidt

Initial P4 SSE2 builtin support

From-SVN: r52903
parent 3a73bffb
2002-04-29 Bernd Schmidt <bernds@redhat.com>
* c-common.c (type_for_mode): Add support for V2DFmode, V2DImode,
UV2DImode.
* tree.c (build_common_tree_nodes_2): Likewise.
* tree.h (enum tree_index): Likewise.
(V2DF_type_node, V2DI_type_node, unsigned_V2DI_type_node): Define.
* config/i386/i386.c (bdesc_comi, bdesc_2arg, bdesc_1arg): Add SSE2
entries.
(init_mmx_sse_builtins): Initialize SSE2 builtins.
(ix86_expand_builtin): Add support for SSE2 builtins.
* config/i386/i386.h (VALID_SSE2_REG_MODE): New macro.
(VALID_SSE_REG_MODE): Use it.
(VECTOR_MODE_SUPPORTED_P): Allow SSE2 modes here as well.
(enum ix86_builtins): Add SSE2 builtins.
* config/i386/i386.md (movv2df_internal, movv2df, movv8hi_internal,
movv8hi, movv16qi_internal, movv16qi, pushv2df, pushv8hi, pushv16qi,
addv2df3, vmaddv2df3, subv2df3, vmsubv2df3, mulv2df3, vmmulv2df3,
divv2df3, vmdivv2df3, smaxv2df3, vmsmaxv2df3, sminv2df3, vmsminv2df3,
sse2_anddf3, sse2_nanddf3, sse2_iordf3, sse2_xordf3, sqrtv2df2,
vmsqrtv2df2, maskcmpv2df3, maskncmpv2df3, vmmaskcmpv2df3,
vmmaskncmpv2df3, sse2_comi, sse2_ucomi, sse2_movmskpd, sse2_pmovmskb,
sse2_maskmovdqu, sse2_movntv2df, sse2_movntti, sse2_movntsi, cvtdq2ps,
cvtps2dq, cvttps2dq, cvtdq2pd, cvtpd2dq, cvttpd2dq, cvtpd2pi,
cvttpd2pi, cvtpi2pd, cvtsd2si, cvttsd2si, cvtsi2sd, cvtsd2ss,
cvtss2sd, cvtpd2ps, cvtps2pd, addv16qi3, addv8hi3, addv4si3, addv2di3,
ssaddv16qi3, ssaddv8hi3, usaddv16qi3, usaddv8hi3, subv16qi3, subv8hi3,
subv4si3, subv2di3, sssubv16qi3, sssubv8hi3, ussubv16qi3, ussubv8hi3,
mulv8hi3, smulv8hi3_highpart, umulv8hi3_highpart, sse2_umulsidi3,
sse2_umulv2siv2di3, sse2_pmaddwd, sse2_clrti, sse2_uavgv16qi3,
sse2_uavgv8hi3, sse2_psadbw, sse2_pinsrw, sse2_pextrw, sse2_pshufd,
sse2_pshuflw, sse2_pshufhw, eqv16qi3, eqv8hi3, eqv4si3, gtv16qi3,
gtv8hi3, gtv4si3, umaxv16qi3, smaxv8hi3, uminv16qi3, sminv8hi3,
ashrv8hi3, ashrv4si3, lshrv8hi3, lshrv4si3, sse2_lshrv2di3,
ashlv8hi3, ashlv4si3, sse2_ashlv2di3, sse2_ashlti3, sse2_lshrti3,
sse2_unpckhpd, sse2_unpcklpd, sse2_packsswb, sse2_packssdw,
sse2_packuswb, sse2_punpckhbw, sse2_punpckhwd, sse2_punpckhdq,
sse2_punpcklbw, sse2_punpcklwd, sse2_punpckldq, sse2_movapd,
sse2_movupd, sse2_movdqa, sse2_movdqu, sse2_movdq2q, sse2_movq2dq,
sse2_movhpd, sse2_movlpd, sse2_loadsd, sse2_movsd, sse2_storesd,
sse2_shufpd, sse2_clflush, sse2_mfence, mfence_insn, sse2_lfence,
lfence_insn): New patterns.
(sse2_andti3, sse2_nandti3, sse2_iorti3, sse2_xorti3): Renamed from
sse_andti3_sse2, sse_nandti3_sse2, sse_iorti3_sse2, sse_xorti3_sse2.
Mon Apr 29 17:03:24 CEST 2002 Jan Hubicka <jh@suse.cz>
* i386.md (sse_mov?fcc*): Revert patch of Mar 14th.
......
......@@ -1559,6 +1559,8 @@ c_common_type_for_mode (mode, unsignedp)
return unsignedp ? unsigned_V8HI_type_node : V8HI_type_node;
case V4SImode:
return unsignedp ? unsigned_V4SI_type_node : V4SI_type_node;
case V2DImode:
return unsignedp ? unsigned_V2DI_type_node : V2DI_type_node;
case V2SImode:
return unsignedp ? unsigned_V2SI_type_node : V2SI_type_node;
case V4HImode:
......@@ -1571,6 +1573,8 @@ c_common_type_for_mode (mode, unsignedp)
return V4SF_type_node;
case V2SFmode:
return V2SF_type_node;
case V2DFmode:
return V2DF_type_node;
default:
break;
}
......
......@@ -987,9 +987,15 @@ do { \
? (TARGET_64BIT ? 4 : 6) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
#define VALID_SSE2_REG_MODE(MODE) \
((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
|| (MODE) == V2DImode)
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
|| (MODE) == SFmode \
/* Always accept SSE2 modes so that xmmintrin.h compiles. */ \
|| VALID_SSE2_REG_MODE (MODE) \
|| (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
......@@ -2218,6 +2224,212 @@ enum ix86_builtins
IX86_BUILTIN_SSE_ZERO,
IX86_BUILTIN_MMX_ZERO,
/* SSE2 */
IX86_BUILTIN_ADDPD,
IX86_BUILTIN_ADDSD,
IX86_BUILTIN_DIVPD,
IX86_BUILTIN_DIVSD,
IX86_BUILTIN_MULPD,
IX86_BUILTIN_MULSD,
IX86_BUILTIN_SUBPD,
IX86_BUILTIN_SUBSD,
IX86_BUILTIN_CMPEQPD,
IX86_BUILTIN_CMPLTPD,
IX86_BUILTIN_CMPLEPD,
IX86_BUILTIN_CMPGTPD,
IX86_BUILTIN_CMPGEPD,
IX86_BUILTIN_CMPNEQPD,
IX86_BUILTIN_CMPNLTPD,
IX86_BUILTIN_CMPNLEPD,
IX86_BUILTIN_CMPNGTPD,
IX86_BUILTIN_CMPNGEPD,
IX86_BUILTIN_CMPORDPD,
IX86_BUILTIN_CMPUNORDPD,
IX86_BUILTIN_CMPNEPD,
IX86_BUILTIN_CMPEQSD,
IX86_BUILTIN_CMPLTSD,
IX86_BUILTIN_CMPLESD,
IX86_BUILTIN_CMPGTSD,
IX86_BUILTIN_CMPGESD,
IX86_BUILTIN_CMPNEQSD,
IX86_BUILTIN_CMPNLTSD,
IX86_BUILTIN_CMPNLESD,
IX86_BUILTIN_CMPNGTSD,
IX86_BUILTIN_CMPNGESD,
IX86_BUILTIN_CMPORDSD,
IX86_BUILTIN_CMPUNORDSD,
IX86_BUILTIN_CMPNESD,
IX86_BUILTIN_COMIEQSD,
IX86_BUILTIN_COMILTSD,
IX86_BUILTIN_COMILESD,
IX86_BUILTIN_COMIGTSD,
IX86_BUILTIN_COMIGESD,
IX86_BUILTIN_COMINEQSD,
IX86_BUILTIN_UCOMIEQSD,
IX86_BUILTIN_UCOMILTSD,
IX86_BUILTIN_UCOMILESD,
IX86_BUILTIN_UCOMIGTSD,
IX86_BUILTIN_UCOMIGESD,
IX86_BUILTIN_UCOMINEQSD,
IX86_BUILTIN_MAXPD,
IX86_BUILTIN_MAXSD,
IX86_BUILTIN_MINPD,
IX86_BUILTIN_MINSD,
IX86_BUILTIN_ANDPD,
IX86_BUILTIN_ANDNPD,
IX86_BUILTIN_ORPD,
IX86_BUILTIN_XORPD,
IX86_BUILTIN_SQRTPD,
IX86_BUILTIN_SQRTSD,
IX86_BUILTIN_UNPCKHPD,
IX86_BUILTIN_UNPCKLPD,
IX86_BUILTIN_SHUFPD,
IX86_BUILTIN_LOADAPD,
IX86_BUILTIN_LOADUPD,
IX86_BUILTIN_STOREAPD,
IX86_BUILTIN_STOREUPD,
IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STORESD,
IX86_BUILTIN_MOVSD,
IX86_BUILTIN_LOADHPD,
IX86_BUILTIN_LOADLPD,
IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD,
IX86_BUILTIN_CVTDQ2PD,
IX86_BUILTIN_CVTDQ2PS,
IX86_BUILTIN_CVTPD2DQ,
IX86_BUILTIN_CVTPD2PI,
IX86_BUILTIN_CVTPD2PS,
IX86_BUILTIN_CVTTPD2DQ,
IX86_BUILTIN_CVTTPD2PI,
IX86_BUILTIN_CVTPI2PD,
IX86_BUILTIN_CVTSI2SD,
IX86_BUILTIN_CVTSD2SI,
IX86_BUILTIN_CVTSD2SS,
IX86_BUILTIN_CVTSS2SD,
IX86_BUILTIN_CVTTSD2SI,
IX86_BUILTIN_CVTPS2DQ,
IX86_BUILTIN_CVTPS2PD,
IX86_BUILTIN_CVTTPS2DQ,
IX86_BUILTIN_MOVNTI,
IX86_BUILTIN_MOVNTPD,
IX86_BUILTIN_MOVNTDQ,
IX86_BUILTIN_SETPD1,
IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD,
IX86_BUILTIN_SETRPD,
IX86_BUILTIN_LOADPD1,
IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1,
IX86_BUILTIN_STORERPD,
/* SSE2 MMX */
IX86_BUILTIN_MASKMOVDQU,
IX86_BUILTIN_MOVMSKPD,
IX86_BUILTIN_PMOVMSKB128,
IX86_BUILTIN_MOVQ2DQ,
IX86_BUILTIN_PACKSSWB128,
IX86_BUILTIN_PACKSSDW128,
IX86_BUILTIN_PACKUSWB128,
IX86_BUILTIN_PADDB128,
IX86_BUILTIN_PADDW128,
IX86_BUILTIN_PADDD128,
IX86_BUILTIN_PADDQ128,
IX86_BUILTIN_PADDSB128,
IX86_BUILTIN_PADDSW128,
IX86_BUILTIN_PADDUSB128,
IX86_BUILTIN_PADDUSW128,
IX86_BUILTIN_PSUBB128,
IX86_BUILTIN_PSUBW128,
IX86_BUILTIN_PSUBD128,
IX86_BUILTIN_PSUBQ128,
IX86_BUILTIN_PSUBSB128,
IX86_BUILTIN_PSUBSW128,
IX86_BUILTIN_PSUBUSB128,
IX86_BUILTIN_PSUBUSW128,
IX86_BUILTIN_PAND128,
IX86_BUILTIN_PANDN128,
IX86_BUILTIN_POR128,
IX86_BUILTIN_PXOR128,
IX86_BUILTIN_PAVGB128,
IX86_BUILTIN_PAVGW128,
IX86_BUILTIN_PCMPEQB128,
IX86_BUILTIN_PCMPEQW128,
IX86_BUILTIN_PCMPEQD128,
IX86_BUILTIN_PCMPGTB128,
IX86_BUILTIN_PCMPGTW128,
IX86_BUILTIN_PCMPGTD128,
IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128,
IX86_BUILTIN_PMADDWD128,
IX86_BUILTIN_PMAXSW128,
IX86_BUILTIN_PMAXUB128,
IX86_BUILTIN_PMINSW128,
IX86_BUILTIN_PMINUB128,
IX86_BUILTIN_PMULUDQ,
IX86_BUILTIN_PMULUDQ128,
IX86_BUILTIN_PMULHUW128,
IX86_BUILTIN_PMULHW128,
IX86_BUILTIN_PMULLW128,
IX86_BUILTIN_PSADBW128,
IX86_BUILTIN_PSHUFHW,
IX86_BUILTIN_PSHUFLW,
IX86_BUILTIN_PSHUFD,
IX86_BUILTIN_PSLLW128,
IX86_BUILTIN_PSLLD128,
IX86_BUILTIN_PSLLQ128,
IX86_BUILTIN_PSRAW128,
IX86_BUILTIN_PSRAD128,
IX86_BUILTIN_PSRLW128,
IX86_BUILTIN_PSRLD128,
IX86_BUILTIN_PSRLQ128,
IX86_BUILTIN_PSLLWI128,
IX86_BUILTIN_PSLLDI128,
IX86_BUILTIN_PSLLQI128,
IX86_BUILTIN_PSRAWI128,
IX86_BUILTIN_PSRADI128,
IX86_BUILTIN_PSRLWI128,
IX86_BUILTIN_PSRLDI128,
IX86_BUILTIN_PSRLQI128,
IX86_BUILTIN_PUNPCKHBW128,
IX86_BUILTIN_PUNPCKHWD128,
IX86_BUILTIN_PUNPCKHDQ128,
IX86_BUILTIN_PUNPCKLBW128,
IX86_BUILTIN_PUNPCKLWD128,
IX86_BUILTIN_PUNPCKLDQ128,
IX86_BUILTIN_CLFLUSH,
IX86_BUILTIN_MFENCE,
IX86_BUILTIN_LFENCE,
IX86_BUILTIN_MAX
};
......
......@@ -4764,6 +4764,8 @@ build_common_tree_nodes_2 (short_double)
= make_vector (V4SImode, unsigned_intSI_type_node, 1);
unsigned_V2SI_type_node
= make_vector (V2SImode, unsigned_intSI_type_node, 1);
unsigned_V2DI_type_node
= make_vector (V2DImode, unsigned_intDI_type_node, 1);
unsigned_V4HI_type_node
= make_vector (V4HImode, unsigned_intHI_type_node, 1);
unsigned_V8QI_type_node
......@@ -4777,10 +4779,12 @@ build_common_tree_nodes_2 (short_double)
V4SF_type_node = make_vector (V4SFmode, float_type_node, 0);
V4SI_type_node = make_vector (V4SImode, intSI_type_node, 0);
V2SI_type_node = make_vector (V2SImode, intSI_type_node, 0);
V2DI_type_node = make_vector (V2DImode, intDI_type_node, 0);
V4HI_type_node = make_vector (V4HImode, intHI_type_node, 0);
V8QI_type_node = make_vector (V8QImode, intQI_type_node, 0);
V8HI_type_node = make_vector (V8HImode, intHI_type_node, 0);
V2SF_type_node = make_vector (V2SFmode, float_type_node, 0);
V2DF_type_node = make_vector (V2DFmode, double_type_node, 0);
V16QI_type_node = make_vector (V16QImode, intQI_type_node, 0);
}
......
......@@ -1928,6 +1928,7 @@ enum tree_index
TI_UV4HI_TYPE,
TI_UV2SI_TYPE,
TI_UV2SF_TYPE,
TI_UV2DI_TYPE,
TI_UV16QI_TYPE,
TI_V4SF_TYPE,
......@@ -1938,6 +1939,8 @@ enum tree_index
TI_V4HI_TYPE,
TI_V2SI_TYPE,
TI_V2SF_TYPE,
TI_V2DF_TYPE,
TI_V2DI_TYPE,
TI_V16QI_TYPE,
TI_MAIN_IDENTIFIER,
......@@ -2005,6 +2008,7 @@ extern tree global_trees[TI_MAX];
#define unsigned_V8HI_type_node global_trees[TI_UV8HI_TYPE]
#define unsigned_V4HI_type_node global_trees[TI_UV4HI_TYPE]
#define unsigned_V2SI_type_node global_trees[TI_UV2SI_TYPE]
#define unsigned_V2DI_type_node global_trees[TI_UV2DI_TYPE]
#define V16QI_type_node global_trees[TI_V16QI_TYPE]
#define V4SF_type_node global_trees[TI_V4SF_TYPE]
......@@ -2014,6 +2018,8 @@ extern tree global_trees[TI_MAX];
#define V4HI_type_node global_trees[TI_V4HI_TYPE]
#define V2SI_type_node global_trees[TI_V2SI_TYPE]
#define V2SF_type_node global_trees[TI_V2SF_TYPE]
#define V2DI_type_node global_trees[TI_V2DI_TYPE]
#define V2DF_type_node global_trees[TI_V2DF_TYPE]
#define V16SF_type_node global_trees[TI_V16SF_TYPE]
/* An enumeration of the standard C integer types. These must be
......
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