[AArch64] Enable TBL for big-endian.

gcc/ChangeLog:
2014-04-11  Alan Lawrence  <alan.lawrence@arm.com>

	* config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.

gcc/testsuite/ChangeLog:
2014-04-11  Alan Lawrence  <alan.lawrence@arm.com>

	* lib/target-supports.exp (check_effective_target_vect_perm): Return
	true for aarch64_be.

From-SVN: r209749

gcc/ChangeLog

+2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
+
+	* config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
+
 2014-04-24  Radovan Obradovic  <robradovic@mips.com>
             Tom de Vries  <tom@codesourcery.com>
 

gcc/config/aarch64/aarch64.c

@@ -8143,11 +8143,6 @@ aarch64_evpc_tbl (struct expand_vec_perm_d *d)
   enum machine_mode vmode = d->vmode;
   unsigned int i, nelt = d->nelt;
 
-  /* TODO: ARM's TBL indexing is little-endian.  In order to handle GCC's
-     numbering of elements for big-endian, we must reverse the order.  */
-  if (BYTES_BIG_ENDIAN)
-    return false;
-
   if (d->testing_p)
     return true;
 

gcc/testsuite/ChangeLog

+i2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
+
+	* lib/target-supports.exp (check_effective_target_vect_perm): Return
+	true for aarch64_be.
+
 2014-04-24  Radovan Obradovic  <robradovic@mips.com>
             Tom de Vries  <tom@codesourcery.com>
 

gcc/testsuite/lib/target-supports.exp

@@ -3487,8 +3487,7 @@ proc check_effective_target_vect_perm { } {
     } else {
         set et_vect_perm_saved 0
         if { [is-effective-target arm_neon_ok]
-	     || ([istarget aarch64*-*-*]
-		 && [is-effective-target aarch64_little_endian])
+	     || [istarget aarch64*-*-*]
 	     || [istarget powerpc*-*-*]
              || [istarget spu-*-*]
 	     || [istarget i?86-*-*]