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riscv-gcc-1
Commit fb3821f7 by Charles Hannum
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*** empty log message *** 

From-SVN: r1474
parent 906c4e36
Showing with 144 additions and 110 deletions
gcc/reload1.c
......@@ -348,7 +348,7 @@ init_reload ()
= gen_rtx (MEM, Pmode,
gen_rtx (PLUS, Pmode,
gen_rtx (REG, Pmode, LAST_VIRTUAL_REGISTER + 1),
gen_rtx (CONST_INT, VOIDmode, 4)));
GEN_INT (4)));
spill_indirect_levels = 0;
while (memory_address_p (QImode, tem))
......@@ -536,7 +536,7 @@ reload (first, global, dumpfile)
/* Make sure that the last insn in the chain
is not something that needs reloading. */
emit_note (0, NOTE_INSN_DELETED);
emit_note (NULL_PTR, NOTE_INSN_DELETED);
/* Find all the pseudo registers that didn't get hard regs
but do have known equivalent constants or memory slots.
......@@ -571,7 +571,7 @@ reload (first, global, dumpfile)
if (set != 0 && GET_CODE (SET_DEST (set)) == REG)
{
rtx note = find_reg_note (insn, REG_EQUIV, 0);
rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
if (note
#ifdef LEGITIMATE_PIC_OPERAND_P
&& (! CONSTANT_P (XEXP (note, 0)) || ! flag_pic
......@@ -836,7 +836,7 @@ reload (first, global, dumpfile)
for (x = forced_labels; x; x = XEXP (x, 1))
if (XEXP (x, 0))
set_label_offsets (XEXP (x, 0), 0, 1);
set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
/* For each pseudo register that has an equivalent location defined,
try to eliminate any eliminable registers (such as the frame pointer)
......@@ -864,7 +864,7 @@ reload (first, global, dumpfile)
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
if (reg_renumber[i] < 0 && reg_equiv_memory_loc[i])
{
rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, 0);
rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, NULL_RTX);
if (strict_memory_address_p (GET_MODE (regno_reg_rtx[i]),
XEXP (x, 0)))
......@@ -1596,7 +1596,7 @@ reload (first, global, dumpfile)
}
else
something_changed
|= new_spill_reg (i, class, max_needs, 0,
|= new_spill_reg (i, class, max_needs, NULL_PTR,
global, dumpfile);
}
else
......@@ -1637,7 +1637,8 @@ reload (first, global, dumpfile)
}
else
something_changed
|= new_spill_reg (idx, class, max_needs, 0,
|= new_spill_reg (idx, class,
max_needs, NULL_PTR,
global, dumpfile);
}
......@@ -2452,7 +2453,8 @@ eliminate_regs (x, mem_mode, insn)
elimination) and ignore the fact that this is actually a
reference to the pseudo. Ensure we make a copy of the
address in case it is shared. */
new = eliminate_regs (reg_equiv_memory_loc[regno], mem_mode, 0);
new = eliminate_regs (reg_equiv_memory_loc[regno],
mem_mode, NULL_RTX);
if (new != reg_equiv_memory_loc[regno])
return copy_rtx (new);
}
......@@ -2508,8 +2510,8 @@ eliminate_regs (x, mem_mode, insn)
reload. This is the desired action. */
{
rtx new0 = eliminate_regs (XEXP (x, 0), mem_mode, 0);
rtx new1 = eliminate_regs (XEXP (x, 1), mem_mode, 0);
rtx new0 = eliminate_regs (XEXP (x, 0), mem_mode, NULL_RTX);
rtx new1 = eliminate_regs (XEXP (x, 1), mem_mode, NULL_RTX);
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
{
......@@ -2546,7 +2548,7 @@ eliminate_regs (x, mem_mode, insn)
/* If we have something in XEXP (x, 0), the usual case, eliminate it. */
if (XEXP (x, 0))
{
new = eliminate_regs (XEXP (x, 0), mem_mode, 0);
new = eliminate_regs (XEXP (x, 0), mem_mode, NULL_RTX);
if (new != XEXP (x, 0))
x = gen_rtx (EXPR_LIST, REG_NOTE_KIND (x), new, XEXP (x, 1));
}
......@@ -2559,7 +2561,7 @@ eliminate_regs (x, mem_mode, insn)
strictly needed, but it simplifies the code. */
if (XEXP (x, 1))
{
new = eliminate_regs (XEXP (x, 1), mem_mode, 0);
new = eliminate_regs (XEXP (x, 1), mem_mode, NULL_RTX);
if (new != XEXP (x, 1))
return gen_rtx (INSN_LIST, GET_MODE (x), XEXP (x, 0), new);
}
......@@ -2578,8 +2580,9 @@ eliminate_regs (x, mem_mode, insn)
case GE: case GT: case GEU: case GTU:
case LE: case LT: case LEU: case LTU:
{
rtx new0 = eliminate_regs (XEXP (x, 0), mem_mode, 0);
rtx new1 = XEXP (x, 1) ? eliminate_regs (XEXP (x, 1), mem_mode, 0) : 0;
rtx new0 = eliminate_regs (XEXP (x, 0), mem_mode, NULL_RTX);
rtx new1
= XEXP (x, 1) ? eliminate_regs (XEXP (x, 1), mem_mode, NULL_RTX) : 0;
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
return gen_rtx (code, GET_MODE (x), new0, new1);
......@@ -2610,7 +2613,7 @@ eliminate_regs (x, mem_mode, insn)
case ABS:
case SQRT:
case FFS:
new = eliminate_regs (XEXP (x, 0), mem_mode, 0);
new = eliminate_regs (XEXP (x, 0), mem_mode, NULL_RTX);
if (new != XEXP (x, 0))
return gen_rtx (code, GET_MODE (x), new);
return x;
......@@ -2629,7 +2632,7 @@ eliminate_regs (x, mem_mode, insn)
&& reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0)
{
new = eliminate_regs (reg_equiv_memory_loc[REGNO (SUBREG_REG (x))],
mem_mode, 0);
mem_mode, NULL_RTX);
/* If we didn't change anything, we must retain the pseudo. */
if (new == reg_equiv_memory_loc[REGNO (SUBREG_REG (x))])
......@@ -2640,7 +2643,7 @@ eliminate_regs (x, mem_mode, insn)
new = copy_rtx (new);
}
else
new = eliminate_regs (SUBREG_REG (x), mem_mode, 0);
new = eliminate_regs (SUBREG_REG (x), mem_mode, NULL_RTX);
if (new != XEXP (x, 0))
{
......@@ -2690,7 +2693,7 @@ eliminate_regs (x, mem_mode, insn)
temp_vec = (rtx *) alloca (XVECLEN (x, 3) * sizeof (rtx));
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
temp_vec[i] = eliminate_regs (ASM_OPERANDS_INPUT (x, i),
mem_mode, 0);
mem_mode, NULL_RTX);
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
if (temp_vec[i] != ASM_OPERANDS_INPUT (x, i))
......@@ -2760,8 +2763,8 @@ eliminate_regs (x, mem_mode, insn)
/* Now avoid the loop below in this common case. */
{
rtx new0 = eliminate_regs (SET_DEST (x), 0, 0);
rtx new1 = eliminate_regs (SET_SRC (x), 0, 0);
rtx new0 = eliminate_regs (SET_DEST (x), 0, NULL_RTX);
rtx new1 = eliminate_regs (SET_SRC (x), 0, NULL_RTX);
/* If SET_DEST changed from a REG to a MEM and INSN is non-zero,
write a CLOBBER insn. */
......@@ -2779,7 +2782,7 @@ eliminate_regs (x, mem_mode, insn)
/* Our only special processing is to pass the mode of the MEM to our
recursive call and copy the flags. While we are here, handle this
case more efficiently. */
new = eliminate_regs (XEXP (x, 0), GET_MODE (x), 0);
new = eliminate_regs (XEXP (x, 0), GET_MODE (x), NULL_RTX);
if (new != XEXP (x, 0))
{
new = gen_rtx (MEM, GET_MODE (x), new);
......@@ -2799,7 +2802,7 @@ eliminate_regs (x, mem_mode, insn)
{
if (*fmt == 'e')
{
new = eliminate_regs (XEXP (x, i), mem_mode, 0);
new = eliminate_regs (XEXP (x, i), mem_mode, NULL_RTX);
if (new != XEXP (x, i) && ! copied)
{
rtx new_x = rtx_alloc (code);
......@@ -2921,7 +2924,7 @@ eliminate_regs_in_insn (insn, replace)
but now can do this as a load-address. This saves an insn in this
common case. */
new_body = eliminate_regs (old_body, 0, replace ? insn : 0);
new_body = eliminate_regs (old_body, 0, replace ? insn : NULL_RTX);
if (new_body != old_body)
{
if (GET_CODE (old_body) != SET || GET_CODE (SET_SRC (old_body)) != PLUS
......@@ -2929,7 +2932,7 @@ eliminate_regs_in_insn (insn, replace)
PATTERN (insn) = new_body;
if (replace && REG_NOTES (insn))
REG_NOTES (insn) = eliminate_regs (REG_NOTES (insn), 0, 0);
REG_NOTES (insn) = eliminate_regs (REG_NOTES (insn), 0, NULL_RTX);
val = 1;
}
......@@ -3376,7 +3379,7 @@ reload_as_needed (first, live_known)
&& GET_CODE (XEXP (PATTERN (insn), 0)) == MEM)
XEXP (XEXP (PATTERN (insn), 0), 0)
= eliminate_regs (XEXP (XEXP (PATTERN (insn), 0), 0),
GET_MODE (XEXP (PATTERN (insn), 0)), 0);
GET_MODE (XEXP (PATTERN (insn), 0)), NULL_RTX);
/* If we need to do register elimination processing, do so.
This might delete the insn, in which case we are done. */
......@@ -4347,7 +4350,7 @@ choose_reload_regs (insn, avoid_return_reg)
{
register rtx equiv
= find_equiv_reg (reload_in[r], insn, reload_reg_class[r],
-1, 0, 0, reload_mode[r]);
-1, NULL_PTR, 0, reload_mode[r]);
int regno;
if (equiv != 0)
......@@ -4677,7 +4680,7 @@ emit_reload_insns (insn)
oldequiv
= find_equiv_reg (old, insn,
reload_reg_class[reload_secondary_reload[j]],
-1, 0, 0, mode);
-1, NULL_PTR, 0, mode);
#endif
/* If reloading from memory, see if there is a register
......@@ -4694,7 +4697,7 @@ emit_reload_insns (insn)
&& REGNO (old) >= FIRST_PSEUDO_REGISTER
&& reg_renumber[REGNO (old)] < 0)))
oldequiv = find_equiv_reg (old, insn, GENERAL_REGS,
-1, 0, 0, mode);
-1, NULL_PTR, 0, mode);
if (oldequiv)
{
......@@ -5759,7 +5762,7 @@ inc_for_reload (reloadreg, value, inc_amount, insn)
if (GET_CODE (value) == PRE_DEC || GET_CODE (value) == POST_DEC)
inc_amount = - inc_amount;
inc = gen_rtx (CONST_INT, VOIDmode, inc_amount);
inc = GEN_INT (inc_amount);
/* If this is post-increment, first copy the location to the reload reg. */
if (post)
......@@ -5817,9 +5820,7 @@ inc_for_reload (reloadreg, value, inc_amount, insn)
emit_insn_before (gen_add2_insn (reloadreg, inc), insn);
emit_insn_before (gen_move_insn (incloc, reloadreg), insn);
emit_insn_before (gen_add2_insn (reloadreg,
gen_rtx (CONST_INT, VOIDmode,
-inc_amount)),
emit_insn_before (gen_add2_insn (reloadreg, GEN_INT (-inc_amount)),
insn);
}
......
gcc/reorg.c
......@@ -766,7 +766,7 @@ add_to_delay_list (insn, delay_list)
{
/* If we have an empty list, just make a new list element. */
if (delay_list == 0)
return gen_rtx (INSN_LIST, VOIDmode, insn, 0);
return gen_rtx (INSN_LIST, VOIDmode, insn, NULL_RTX);
/* Otherwise this must be an INSN_LIST. Add INSN to the end of the
list. */
......@@ -845,14 +845,14 @@ delete_scheduled_jump (insn)
#ifdef HAVE_cc0
if (reg_mentioned_p (cc0_rtx, insn))
{
rtx note = find_reg_note (insn, REG_CC_SETTER, 0);
rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
/* If a reg-note was found, it points to an insn to set CC0. This
insn is in the delay list of some other insn. So delete it from
the delay list it was in. */
if (note)
{
if (! FIND_REG_INC_NOTE (XEXP (note, 0), 0)
if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
&& sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
delete_from_delay_slot (XEXP (note, 0));
}
......@@ -972,7 +972,7 @@ optimize_skip (insn)
return 0;
}
delay_list = add_to_delay_list (trial, 0);
delay_list = add_to_delay_list (trial, NULL_RTX);
next_trial = next_active_insn (trial);
update_block (trial, trial);
delete_insn (trial);
......@@ -1201,7 +1201,7 @@ steal_delay_list_from_target (insn, condition, seq, delay_list,
#ifdef HAVE_cc0
/* If TRIAL sets CC0, we can't copy it, so we can't steal this
delay list. */
|| find_reg_note (trial, REG_CC_USER, 0)
|| find_reg_note (trial, REG_CC_USER, NULL_RTX)
#endif
/* If TRIAL is from the fallthrough code of an annulled branch insn
in SEQ, we cannot use it. */
......@@ -1942,7 +1942,8 @@ mark_target_live_regs (target, res)
if (b != -1)
{
regset regs_live = basic_block_live_at_start[b];
int offset, bit, j;
int offset, j;
REGSET_ELT_TYPE bit;
int regno;
rtx start_insn, stop_insn;
......@@ -1959,7 +1960,7 @@ mark_target_live_regs (target, res)
for (offset = 0, i = 0; offset < regset_size; offset++)
{
if (regs_live[offset] == 0)
i += HOST_BITS_PER_INT;
i += REGSET_ELT_BITS;
else
for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
if ((regs_live[offset] & bit)
......@@ -2901,7 +2902,7 @@ fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
if (thread_if_true)
INSN_FROM_TARGET_P (ninsn) = 1;
delay_list = add_to_delay_list (ninsn, 0);
delay_list = add_to_delay_list (ninsn, NULL_RTX);
(*pslots_filled)++;
}
}
......@@ -2998,7 +2999,7 @@ fill_eager_delay_slots (first)
else
{
fallthrough_insn = next_active_insn (insn);
own_fallthrough = own_thread_p (NEXT_INSN (insn), 0, 1);
own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
prediction = mostly_true_jump (insn, condition);
}
......@@ -3248,7 +3249,7 @@ relax_delay_slots (first)
put it back where it belonged and delete the register notes,
but it doesn't seem worthwhile in this uncommon case. */
&& ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
REG_CC_USER, 0)
REG_CC_USER, NULL_RTX)
#endif
)
{
......@@ -3369,7 +3370,7 @@ make_return_insns (first)
/* If we can't make the jump into a RETURN, redirect it to the best
RETURN and go on to the next insn. */
if (! redirect_jump (jump_insn, 0))
if (! redirect_jump (jump_insn, NULL_RTX))
{
redirect_jump (jump_insn, real_return_label);
continue;
......
gcc/sched.c
......@@ -284,7 +284,7 @@ init_alias_analysis ()
&& REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
&& (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
&& reg_n_sets[REGNO (SET_DEST (set))] == 1)
|| (note = find_reg_note (insn, REG_EQUIV, 0)) != 0)
|| (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
&& GET_CODE (XEXP (note, 0)) != EXPR_LIST)
reg_known_value[REGNO (SET_DEST (set))] = XEXP (note, 0);
......@@ -346,6 +346,11 @@ rtx_equal_for_memref_p (x, y)
{
switch (fmt[i])
{
case 'w':
if (XWINT (x, i) != XWINT (y, i))
return 0;
break;
case 'n':
case 'i':
if (XINT (x, i) != XINT (y, i))
......@@ -449,7 +454,7 @@ static int
memrefs_conflict_p (xsize, x, ysize, y, c)
rtx x, y;
int xsize, ysize;
int c;
HOST_WIDE_INT c;
{
if (GET_CODE (x) == HIGH)
x = XEXP (x, 0);
......@@ -1670,7 +1675,8 @@ sched_note_set (b, x, death)
if (regno >= FIRST_PSEUDO_REGISTER || ! global_regs[regno])
{
register int offset = regno / REGSET_ELT_BITS;
register int bit = 1 << (regno % REGSET_ELT_BITS);
register REGSET_ELT_TYPE bit
= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
if (death)
{
......@@ -1686,7 +1692,7 @@ sched_note_set (b, x, death)
while (--j >= 0)
{
offset = (regno + j) / REGSET_ELT_BITS;
bit = 1 << ((regno + j) % REGSET_ELT_BITS);
bit = (REGSET_ELT_TYPE) 1 << ((regno + j) % REGSET_ELT_BITS);
bb_live_regs[offset] &= ~bit;
bb_dead_regs[offset] |= bit;
......@@ -1707,7 +1713,7 @@ sched_note_set (b, x, death)
while (--j >= 0)
{
offset = (regno + j) / REGSET_ELT_BITS;
bit = 1 << ((regno + j) % REGSET_ELT_BITS);
bit = (REGSET_ELT_TYPE) 1 << ((regno + j) % REGSET_ELT_BITS);
bb_live_regs[offset] |= bit;
bb_dead_regs[offset] &= ~bit;
......@@ -1835,7 +1841,7 @@ birthing_insn_p (pat)
rtx dest = SET_DEST (pat);
int i = REGNO (dest);
int offset = i / REGSET_ELT_BITS;
int bit = 1 << (i % REGSET_ELT_BITS);
REGSET_ELT_TYPE bit = (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
/* It would be more accurate to use refers_to_regno_p or
reg_mentioned_p to determine when the dest is not live before this
......@@ -2015,9 +2021,10 @@ attach_deaths (x, insn, set_p)
register int regno = REGNO (x);
register int offset = regno / REGSET_ELT_BITS;
register int bit = 1 << (regno % REGSET_ELT_BITS);
int all_needed = (old_live_regs[offset] & bit);
int some_needed = (old_live_regs[offset] & bit);
register REGSET_ELT_TYPE bit
= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
REGSET_ELT_TYPE all_needed = (old_live_regs[offset] & bit);
REGSET_ELT_TYPE some_needed = (old_live_regs[offset] & bit);
if (set_p)
return;
......@@ -2030,9 +2037,11 @@ attach_deaths (x, insn, set_p)
while (--n > 0)
{
some_needed |= (old_live_regs[(regno + n) / REGSET_ELT_BITS]
& 1 << ((regno + n) % REGSET_ELT_BITS));
& ((REGSET_ELT_TYPE) 1
<< ((regno + n) % REGSET_ELT_BITS)));
all_needed &= (old_live_regs[(regno + n) / REGSET_ELT_BITS]
& 1 << ((regno + n) % REGSET_ELT_BITS));
& ((REGSET_ELT_TYPE) 1
<< ((regno + n) % REGSET_ELT_BITS)));
}
}
......@@ -2077,7 +2086,8 @@ attach_deaths (x, insn, set_p)
for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
i >= 0; i--)
if ((old_live_regs[(regno + i) / REGSET_ELT_BITS]
& 1 << ((regno +i) % REGSET_ELT_BITS)) == 0
& ((REGSET_ELT_TYPE) 1
<< ((regno +i) % REGSET_ELT_BITS))) == 0
&& ! dead_or_set_regno_p (insn, regno + i))
create_reg_dead_note (gen_rtx (REG, word_mode,
regno + i),
......@@ -2092,7 +2102,8 @@ attach_deaths (x, insn, set_p)
while (--j >= 0)
{
offset = (regno + j) / REGSET_ELT_BITS;
bit = 1 << ((regno + j) % REGSET_ELT_BITS);
bit
= (REGSET_ELT_TYPE) 1 << ((regno + j) % REGSET_ELT_BITS);
bb_dead_regs[offset] &= ~bit;
bb_live_regs[offset] |= bit;
......@@ -2623,7 +2634,8 @@ schedule_block (b, file)
{
register int regno = REGNO (XEXP (link, 0));
register int offset = regno / REGSET_ELT_BITS;
register int bit = 1 << (regno % REGSET_ELT_BITS);
register REGSET_ELT_TYPE bit
= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
if (regno < FIRST_PSEUDO_REGISTER)
{
......@@ -2632,7 +2644,8 @@ schedule_block (b, file)
while (--j >= 0)
{
offset = (regno + j) / REGSET_ELT_BITS;
bit = 1 << ((regno + j) % REGSET_ELT_BITS);
bit = ((REGSET_ELT_TYPE) 1
<< ((regno + j) % REGSET_ELT_BITS));
bb_live_regs[offset] &= ~bit;
bb_dead_regs[offset] |= bit;
......@@ -2726,7 +2739,8 @@ schedule_block (b, file)
{
register int regno = REGNO (XEXP (link, 0));
register int offset = regno / REGSET_ELT_BITS;
register int bit = 1 << (regno % REGSET_ELT_BITS);
register REGSET_ELT_TYPE bit
= (REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS);
/* Only unlink REG_DEAD notes; leave REG_UNUSED notes
alone. */
......@@ -2749,7 +2763,8 @@ schedule_block (b, file)
while (--j >= 0)
{
offset = (regno + j) / REGSET_ELT_BITS;
bit = 1 << ((regno + j) % REGSET_ELT_BITS);
bit = ((REGSET_ELT_TYPE) 1
<< ((regno + j) % REGSET_ELT_BITS));
bb_live_regs[offset] &= ~bit;
bb_dead_regs[offset] |= bit;
......@@ -2778,13 +2793,13 @@ schedule_block (b, file)
/* Start with registers live at end. */
for (j = 0; j < regset_size; j++)
{
int live = bb_live_regs[j];
REGSET_ELT_TYPE live = bb_live_regs[j];
old_live_regs[j] = live;
if (live)
{
register int bit;
register REGSET_ELT_TYPE bit;
for (bit = 0; bit < REGSET_ELT_BITS; bit++)
if (live & (1 << bit))
if (live & ((REGSET_ELT_TYPE) 1 << bit))
sometimes_max = new_sometimes_live (regs_sometimes_live, j,
bit, sometimes_max);
}
......@@ -2926,7 +2941,8 @@ schedule_block (b, file)
if (call_used_regs[i] || global_regs[i])
{
register int offset = i / REGSET_ELT_BITS;
register int bit = 1 << (i % REGSET_ELT_BITS);
register REGSET_ELT_TYPE bit
= (REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS);
bb_live_regs[offset] &= ~bit;
bb_dead_regs[offset] |= bit;
......@@ -2940,7 +2956,8 @@ schedule_block (b, file)
(below). */
p = regs_sometimes_live;
for (i = 0; i < sometimes_max; i++, p++)
if (bb_live_regs[p->offset] & (1 << p->bit))
if (bb_live_regs[p->offset]
& ((REGSET_ELT_TYPE) 1 << p->bit))
p->calls_crossed += 1;
}
......@@ -2951,13 +2968,13 @@ schedule_block (b, file)
/* Find registers now made live by that instruction. */
for (i = 0; i < regset_size; i++)
{
int diff = bb_live_regs[i] & ~old_live_regs[i];
REGSET_ELT_TYPE diff = bb_live_regs[i] & ~old_live_regs[i];
if (diff)
{
register int bit;
old_live_regs[i] |= diff;
for (bit = 0; bit < REGSET_ELT_BITS; bit++)
if (diff & (1 << bit))
if (diff & ((REGSET_ELT_TYPE) 1 << bit))
sometimes_max
= new_sometimes_live (regs_sometimes_live, i, bit,
sometimes_max);
......@@ -2974,14 +2991,16 @@ schedule_block (b, file)
p->live_length += 1;
if ((bb_live_regs[p->offset] & (1 << p->bit)) == 0)
if ((bb_live_regs[p->offset]
& ((REGSET_ELT_TYPE) 1 << p->bit)) == 0)
{
/* This is the end of one of this register's lifetime
segments. Save the lifetime info collected so far,
and clear its bit in the old_live_regs entry. */
sched_reg_live_length[regno] += p->live_length;
sched_reg_n_calls_crossed[regno] += p->calls_crossed;
old_live_regs[p->offset] &= ~(1 << p->bit);
old_live_regs[p->offset]
&= ~((REGSET_ELT_TYPE) 1 << p->bit);
/* Delete the reg_sometimes_live entry for this reg by
copying the last entry over top of it. */
......@@ -3517,7 +3536,7 @@ update_flow_info (notes, first, last, orig_insn)
REG_NOTES (first) = note;
insn = XEXP (note, 0);
note = find_reg_note (insn, REG_RETVAL, 0);
note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
if (note)
XEXP (note, 0) = first;
break;
......@@ -3529,7 +3548,7 @@ update_flow_info (notes, first, last, orig_insn)
REG_NOTES (last) = note;
insn = XEXP (note, 0);
note = find_reg_note (insn, REG_LIBCALL, 0);
note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
if (note)
XEXP (note, 0) = last;
break;
......@@ -3783,7 +3802,9 @@ schedule_insns (dump_file)
return;
/* Create an insn here so that we can hang dependencies off of it later. */
sched_before_next_call = gen_rtx (INSN, VOIDmode, 0, 0, 0, 0, 0, 0, 0);
sched_before_next_call
= gen_rtx (INSN, VOIDmode, 0, NULL_RTX, NULL_RTX,
NULL_RTX, 0, NULL_RTX, 0);
/* Initialize the unused_*_lists. We can't use the ones left over from
the previous function, because gcc has freed that memory. We can use
......
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