[ARC] Add code density instructions.

gcc/
2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_output_addsi): Emit code density adds.
	* config/arc/arc.md (cpu_facility): Add cd variant.
	(*movqi_insn): Add code density variant.
	(*movhi_insn): Likewise.
	(*movqi_insn): Likewise.
	(*addsi3_mixed): Likewise.
	(subsi3_insn): Likewise.

From-SVN: r246089

gcc/ChangeLog

 2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>
 
+	* config/arc/arc.c (arc_output_addsi): Emit code density adds.
+	* config/arc/arc.md (cpu_facility): Add cd variant.
+	(*movqi_insn): Add code density variant.
+	(*movhi_insn): Likewise.
+	(*movqi_insn): Likewise.
+	(*addsi3_mixed): Likewise.
+	(subsi3_insn): Likewise.
+
+2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>
+
 	* config/arc/arc.md (movsi_cond_exec): Update constraint.
 
 2017-03-13  Claudiu Zissulescu  <claziss@synopsys.com>

gcc/config/arc/arc.c

@@ -7336,6 +7336,17 @@ arc_output_addsi (rtx *operands, bool cond_p, bool output_p)
 	  || (REGNO (operands[0]) == STACK_POINTER_REGNUM
 	      && match && !(neg_intval & ~124)))
 	ADDSI_OUTPUT1 ("sub%? %0,%1,%n2");
+
+      if (REG_P(operands[0]) && REG_P(operands[1])
+	  && (REGNO(operands[0]) <= 31) && (REGNO(operands[0]) == REGNO(operands[1]))
+	  && CONST_INT_P (operands[2]) && ( (intval>= -1) && (intval <= 6)))
+	ADDSI_OUTPUT1 ("add%? %0,%1,%2");
+
+      if (TARGET_CODE_DENSITY && REG_P(operands[0]) && REG_P(operands[1])
+	  && ((REGNO(operands[0]) == 0) || (REGNO(operands[0]) == 1))
+	  && satisfies_constraint_Rcq (operands[1])
+	  && satisfies_constraint_L (operands[2]))
+	ADDSI_OUTPUT1 ("add%? %0,%1,%2 ;3");
     }
 
   /* Now try to emit a 32 bit insn without long immediate.  */