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lvzhengyang
riscv-gcc-1
Commits
f9f27ee5
Commit
f9f27ee5
authored
Jun 24, 2000
by
Bernd Schmidt
Committed by
Bernd Schmidt
Jun 24, 2000
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Vector support: rtx and mode definitions
From-SVN: r34677
parent
e4e3ab5a
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5 changed files
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186 additions
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3 deletions
+186
-3
gcc/ChangeLog
+15
-0
gcc/machmode.def
+28
-0
gcc/machmode.h
+12
-3
gcc/rtl.def
+46
-0
gcc/rtl.texi
+85
-0
No files found.
gcc/ChangeLog
View file @
f9f27ee5
2000-06-24 Bernd Schmidt <bernds@cygnus.co.uk>
* rtl.texi (Vector Operations): New node.
(Arithmetic): Add ss_plus, us_plus, ss_minus, us_minus.
(Conversions): Add ss_truncate, us_truncate.
* rtl.def (VEC_MERGE, VEC_SELECT, VEC_CONCAT, VEC_REORDER,
VEC_CONST, VEC_DUPLICATE, SS_PLUS, SS_MINUS, SS_TRUNCATE,
US_TRUNCATE): New rtx codes.
* machmode.def: Add vector modes.
* machmode.h (enum mode_class): Add MODE_VECTOR_INT and
MODE_VECTOR_FLOAT.
(INTEGER_MODE_P): Check for MODE_VECTOR_INT.
(FLOAT_MODE_P): Check for MODE_VECTOR_FLOAT.
(VECTOR_MODE_P): New.
2000-06-24 Nathan Sidwell <nathan@codesourcery.com>
* cpp.texi: Clarify #pragma GCC namespace.
...
...
gcc/machmode.def
View file @
f9f27ee5
...
...
@@ -45,6 +45,7 @@ Boston, MA 02111-1307, USA. */
MODE_PARTIAL_INT - PQImode, PHImode, PSImode and PDImode
MODE_CC - modes used for representing the condition code in a register
MODE_COMPLEX_INT, MODE_COMPLEX_FLOAT - complex number
MODE_VECTOR_INT, MODE_VECTOR_FLOAT - vector
MODE_RANDOM - anything else
Fourth argument is the relative size of the object, in bytes.
...
...
@@ -100,6 +101,33 @@ DEF_MACHMODE (CDImode, "CDI", MODE_COMPLEX_INT, 16, 8, CTImode)
DEF_MACHMODE (CTImode, "CTI", MODE_COMPLEX_INT, 32, 16, COImode)
DEF_MACHMODE (COImode, "COI", MODE_COMPLEX_INT, 64, 32, VOIDmode)
/* Vector modes. */
/* There are no V1xx vector modes. These are equivalent to normal non-vector
modes. */
DEF_MACHMODE (V2QImode, "V2QI", MODE_VECTOR_INT, 2, 1, VOIDmode)
DEF_MACHMODE (V2HImode, "V2HI", MODE_VECTOR_INT, 4, 2, VOIDmode)
DEF_MACHMODE (V2SImode, "V2SI", MODE_VECTOR_INT, 8, 4, VOIDmode)
DEF_MACHMODE (V2DImode, "V2DI", MODE_VECTOR_INT, 16, 8, VOIDmode)
DEF_MACHMODE (V4QImode, "V4QI", MODE_VECTOR_INT, 4, 1, VOIDmode)
DEF_MACHMODE (V4HImode, "V4HI", MODE_VECTOR_INT, 8, 2, VOIDmode)
DEF_MACHMODE (V4SImode, "V4SI", MODE_VECTOR_INT, 16, 4, VOIDmode)
DEF_MACHMODE (V4DImode, "V4DI", MODE_VECTOR_INT, 32, 8, VOIDmode)
DEF_MACHMODE (V8QImode, "V8QI", MODE_VECTOR_INT, 8, 1, VOIDmode)
DEF_MACHMODE (V8HImode, "V8HI", MODE_VECTOR_INT, 16, 2, VOIDmode)
DEF_MACHMODE (V8SImode, "V8SI", MODE_VECTOR_INT, 32, 4, VOIDmode)
DEF_MACHMODE (V8DImode, "V8DI", MODE_VECTOR_INT, 64, 8, VOIDmode)
DEF_MACHMODE (V2SFmode, "V2SF", MODE_VECTOR_FLOAT, 8, 4, VOIDmode)
DEF_MACHMODE (V2DFmode, "V2DF", MODE_VECTOR_FLOAT, 16, 8, VOIDmode)
DEF_MACHMODE (V4SFmode, "V4SF", MODE_VECTOR_FLOAT, 16, 4, VOIDmode)
DEF_MACHMODE (V4DFmode, "V4DF", MODE_VECTOR_FLOAT, 32, 8, VOIDmode)
DEF_MACHMODE (V8SFmode, "V8SF", MODE_VECTOR_FLOAT, 32, 4, VOIDmode)
DEF_MACHMODE (V8DFmode, "V8DF", MODE_VECTOR_FLOAT, 64, 8, VOIDmode)
/* BLKmode is used for structures, arrays, etc.
that fit no more specific mode. */
DEF_MACHMODE (BLKmode, "BLK", MODE_RANDOM, 0, 0, VOIDmode)
...
...
gcc/machmode.h
View file @
f9f27ee5
...
...
@@ -42,7 +42,9 @@ extern const char * const mode_name[];
#define GET_MODE_NAME(MODE) (mode_name[(int) (MODE)])
enum
mode_class
{
MODE_RANDOM
,
MODE_INT
,
MODE_FLOAT
,
MODE_PARTIAL_INT
,
MODE_CC
,
MODE_COMPLEX_INT
,
MODE_COMPLEX_FLOAT
,
MAX_MODE_CLASS
};
MODE_COMPLEX_INT
,
MODE_COMPLEX_FLOAT
,
MODE_VECTOR_INT
,
MODE_VECTOR_FLOAT
,
MAX_MODE_CLASS
};
/* Get the general kind of object that mode MODE represents
(integer, floating, complex, etc.) */
...
...
@@ -54,18 +56,25 @@ extern const enum mode_class mode_class[];
#define INTEGRAL_MODE_P(MODE) \
(GET_MODE_CLASS (MODE) == MODE_INT \
|| GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT)
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \
|| GET_MODE_CLASS (MODE) == MODE_VECTOR_INT)
/* Nonzero if MODE is a floating-point mode. */
#define FLOAT_MODE_P(MODE) \
(GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT)
/* Nonzero if MODE is a complex mode. */
#define COMPLEX_MODE_P(MODE) \
(GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
/* Nonzero if MODE is a vector mode. */
#define VECTOR_MODE_P(MODE) \
(GET_MODE_CLASS (MODE) == MODE_VECTOR_INT \
|| GET_MODE_CLASS (MODE) == MODE_VECTOR_FLOAT)
/* Get the size in bytes of an object of mode MODE. */
extern
const
unsigned
int
mode_size
[];
...
...
gcc/rtl.def
View file @
f9f27ee5
...
...
@@ -928,6 +928,52 @@ DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
tree-based optimizations once front-end conversions are complete. */
DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
/* Describes a merge operation between two vector values.
Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask
that specifies where the parts of the result are taken from. Set bits
indicate operand 0, clear bits indicate operand 1. The parts are defined
by the mode of the vectors. */
DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", 'x')
/* Describes an operation that selects parts of a vector.
Operands 0 is the source vector, operand 1 is a PARALLEL that contains
a CONST_INT for each of the subparts of the result vector, giving the
number of the source subpart that should be stored into it. */
DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", 'x')
/* Describes a vector concat operation. Operands 0 and 1 are the source
vectors, the result is a vector that is as long as operands 0 and 1
combined and is the concatenation of the two source vectors. */
DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", 'x')
/* Describes a vector constant. Each part of the PARALLEL that is operand 0
describes a constant for one of the subparts. */
DEF_RTL_EXPR(VEC_CONST, "vec_const", "e", 'x')
/* Describes an operation that converts a small vector into a larger one by
duplicating the input values. The output vector mode must have the same
submodes as the input vector mode, and the number of output parts must be
an integer multiple of the number of input parts. */
DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", 'x')
/* Addition with signed saturation */
DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", 'c')
/* Addition with unsigned saturation */
DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", 'c')
/* Operand 0 minus operand 1, with signed saturation. */
DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", '2')
/* Operand 0 minus operand 1, with unsigned saturation. */
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", '2')
/* Signed saturating truncate. */
DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", '1')
/* Unsigned saturating truncate. */
DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", '1')
/* The SSA phi operator.
The argument is a vector of 2N rtxes. Element 2N+1 is a CONST_INT
...
...
gcc/rtl.texi
View file @
f9f27ee5
...
...
@@ -29,6 +29,7 @@ form uses nested parentheses to indicate the pointers in the internal form.
*
Arithmetic
::
Expressions
representing
arithmetic
on
other
expressions
.
*
Comparisons
::
Expressions
representing
comparison
of
expressions
.
*
Bit
Fields
::
Expressions
representing
bitfields
in
memory
or
reg
.
*
Vector
Operations
::
Expressions
involving
vector
datatypes
.
*
Conversions
::
Extending
,
truncating
,
floating
or
fixing
.
*
RTL
Declarations
::
Declaring
volatility
,
constancy
,
etc
.
*
Side
Effects
::
Expressions
for
storing
in
registers
,
etc
.
...
...
@@ -1347,6 +1348,30 @@ item minus the number of bits set by the @code{high} code
@item
(
minus
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
Like
@code
{
plus
}
but
represents
subtraction
.
@findex
ss_plus
@cindex
RTL
addition
with
signed
saturation
@item
(
ss_plus
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
Like
@code
{
plus
},
but
using
signed
saturation
in
case
of
an
overflow
.
@findex
us_plus
@cindex
RTL
addition
with
unsigned
saturation
@item
(
us_plus
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
Like
@code
{
plus
},
but
using
unsigned
saturation
in
case
of
an
overflow
.
@findex
ss_minus
@cindex
RTL
addition
with
signed
saturation
@item
(
ss_minus
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
Like
@code
{
minus
},
but
using
signed
saturation
in
case
of
an
overflow
.
@findex
us_minus
@cindex
RTL
addition
with
unsigned
saturation
@item
(
us_minus
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
Like
@code
{
minus
},
but
using
unsigned
saturation
in
case
of
an
overflow
.
@findex
compare
@cindex
RTL
comparison
@item
(
compare
:
@var
{
m
}
@var
{
x
}
@var
{
y
})
...
...
@@ -1695,6 +1720,52 @@ bit field. The same sequence of bits are extracted, but they
are
filled
to
an
entire
word
with
zeros
instead
of
by
sign
-
extension
.
@end
table
@node
Vector
Operations
@section
Vector
Operations
@cindex
vector
operations
All
normal
rtl
expressions
can
be
used
with
vector
modes
;
they
are
interpreted
as
operating
on
each
part
of
the
vector
independently
.
Additionally
,
there
are
a
few
new
expressions
to
describe
specific
vector
operations
.
@table
@code
@findex
vec_merge
@item
(
vec_merge
:
@var
{
m
}
@var
{
vec1
}
@var
{
vec2
}
@var
{
items
})
This
describes
a
merge
operation
between
two
vectors
.
The
result
is
a
vector
of
mode
@var
{
m
};
its
elements
are
selected
from
either
@var
{
vec1
}
or
@var
{
vec2
}.
Which
elements
are
selected
is
described
by
@var
{
items
},
which
is
a
bit
mask
represented
by
a
@code
{
const_int
};
a
zero
bit
indicates
the
corresponding
element
in
the
result
vector
is
taken
from
@var
{
vec2
}
while
a
set
bit
indicates
it
is
taken
from
@var
{
vec1
}.
@findex
vec_select
@item
(
vec_select
:
@var
{
m
}
@var
{
vec1
}
@var
{
selection
})
This
describes
an
operation
that
selects
parts
of
a
vector
.
@var
{
vec1
}
is
the
source
vector
,
@var
{
selection
}
is
a
@code
{
parallel
}
that
contains
a
@code
{
const_int
}
for
each
of
the
subparts
of
the
result
vector
,
giving
the
number
of
the
source
subpart
that
should
be
stored
into
it
.
@findex
vec_concat
@item
(
vec_concat
:
@var
{
m
}
@var
{
vec1
}
@var
{
vec2
})
Describes
a
vector
concat
operation
.
The
result
is
a
concatenation
of
the
vectors
@var
{
vec1
}
and
@var
{
vec2
};
its
length
is
the
sum
of
the
lengths
of
the
two
inputs
.
@findex
vec_const
@item
(
vec_const
:
@var
{
m
}
@var
{
subparts
})
This
describes
a
constant
vector
.
@var
{
subparts
}
is
a
@code
{
parallel
}
that
contains
a
constant
for
each
of
the
subparts
of
the
vector
.
@findex
vec_duplicate
@item
(
vec_duplicate
:
@var
{
m
}
@var
{
vec
})
This
operation
converts
a
small
vector
into
a
larger
one
by
duplicating
the
input
values
.
The
output
vector
mode
must
have
the
same
submodes
as
the
input
vector
mode
,
and
the
number
of
output
parts
must
be
an
integer
multiple
of
the
number
of
input
parts
.
@end
table
@node
Conversions
@section
Conversions
@cindex
conversions
...
...
@@ -1747,6 +1818,20 @@ Represents the result of truncating the value @var{x}
to
machine
mode
@var
{
m
}.
@var
{
m
}
must
be
a
fixed
-
point
mode
and
@var
{
x
}
a
fixed
-
point
value
of
a
mode
wider
than
@var
{
m
}.
@findex
ss_truncate
@item
(
ss_truncate
:
@var
{
m
}
@var
{
x
})
Represents
the
result
of
truncating
the
value
@var
{
x
}
to
machine
mode
@var
{
m
},
using
signed
saturation
in
the
case
of
overflow
.
Both
@var{
m
}
and
the
mode
of
@var{
x
}
must
be
fixed
-
point
modes
.
@findex
us_truncate
@item
(
us_truncate
:
@var
{
m
}
@var
{
x
})
Represents
the
result
of
truncating
the
value
@var
{
x
}
to
machine
mode
@var
{
m
},
using
unsigned
saturation
in
the
case
of
overflow
.
Both
@var{
m
}
and
the
mode
of
@var{
x
}
must
be
fixed
-
point
modes
.
@findex
float_truncate
@item
(
float_truncate
:
@var
{
m
}
@var
{
x
})
Represents
the
result
of
truncating
the
value
@var
{
x
}
...
...
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