Commit f9d4ecd4 by Richard Sandiford Committed by Richard Sandiford

lra-constraints.c (process_address): Tighten arguments to base_reg_class.

gcc/
	* lra-constraints.c (process_address): Tighten arguments to
	base_reg_class.  Use simplify_gen_binary to generate PLUS rtxes.

From-SVN: r192836
parent 02ea4bf4
2012-10-26 Richard Sandiford <rdsandiford@googlemail.com> 2012-10-26 Richard Sandiford <rdsandiford@googlemail.com>
* lra-constraints.c (process_address): Tighten arguments to
base_reg_class. Use simplify_gen_binary to generate PLUS rtxes.
2012-10-26 Richard Sandiford <rdsandiford@googlemail.com>
* lra-constraints.c (get_index_scale, can_add_disp_p): New functions. * lra-constraints.c (get_index_scale, can_add_disp_p): New functions.
(equiv_address_substitution): Use them. (equiv_address_substitution): Use them.
...@@ -2722,15 +2722,14 @@ process_address (int nop, rtx *before, rtx *after) ...@@ -2722,15 +2722,14 @@ process_address (int nop, rtx *before, rtx *after)
{ {
/* index * scale + disp => new base + index * scale, /* index * scale + disp => new base + index * scale,
case (1) above. */ case (1) above. */
enum reg_class cl = base_reg_class (mode, as, SCRATCH, SCRATCH); enum reg_class cl = base_reg_class (mode, as, PLUS,
GET_CODE (*ad.index_loc));
lra_assert (INDEX_REG_CLASS != NO_REGS); lra_assert (INDEX_REG_CLASS != NO_REGS);
new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "disp"); new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "disp");
lra_assert (GET_CODE (*addr_loc) == PLUS);
lra_emit_move (new_reg, *ad.disp_loc); lra_emit_move (new_reg, *ad.disp_loc);
if (CONSTANT_P (XEXP (*addr_loc, 1))) *addr_loc = simplify_gen_binary (PLUS, GET_MODE (new_reg),
XEXP (*addr_loc, 1) = XEXP (*addr_loc, 0); new_reg, *ad.index_loc);
XEXP (*addr_loc, 0) = new_reg;
} }
} }
else if (ad.index_reg_loc == NULL) else if (ad.index_reg_loc == NULL)
...@@ -2749,7 +2748,8 @@ process_address (int nop, rtx *before, rtx *after) ...@@ -2749,7 +2748,8 @@ process_address (int nop, rtx *before, rtx *after)
/* base + scale * index + disp => new base + scale * index, /* base + scale * index + disp => new base + scale * index,
case (1) above. */ case (1) above. */
new_reg = base_plus_disp_to_reg (mode, as, &ad); new_reg = base_plus_disp_to_reg (mode, as, &ad);
*addr_loc = gen_rtx_PLUS (Pmode, new_reg, *ad.index_loc); *addr_loc = simplify_gen_binary (PLUS, GET_MODE (new_reg),
new_reg, *ad.index_loc);
} }
*before = get_insns (); *before = get_insns ();
end_sequence (); end_sequence ();
......
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