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riscv-gcc-1
Commit f9610d20 by Uros Bizjak
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i386.c (ix86_trampoline_init): Switch arms of if expr. 

	* config/i386/i386.c (ix86_trampoline_init): Switch arms of if expr.
	Use offset everywhere.  Always assert that offset <= TRAMPOLINE_SIZE.

From-SVN: r176173
parent 4d4a9b72
Showing with 91 additions and 99 deletions
gcc/ChangeLog
2011-07-11 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_trampoline_init): Switch arms of if expr.
Use offset everywhere. Always assert that offset <= TRAMPOLINE_SIZE.
2011-07-11 Jakub Jelinek <jakub@redhat.com> 2011-07-11 Jakub Jelinek <jakub@redhat.com>
PR debug/49676 PR debug/49676
...@@ -191,8 +196,7 @@ ...@@ -191,8 +196,7 @@
PR debug/49676 PR debug/49676
* dwarf2out.c (size_of_int_loc_descriptor): New function. * dwarf2out.c (size_of_int_loc_descriptor): New function.
(address_of_int_loc_descriptor): Use it. (address_of_int_loc_descriptor): Use it.
(scompare_loc_descriptor): Optimize EQ/NE comparison with (scompare_loc_descriptor): Optimize EQ/NE comparison with constant.
constant.
2011-07-09 Richard Henderson <rth@redhat.com> 2011-07-09 Richard Henderson <rth@redhat.com>
...@@ -249,8 +253,7 @@ ...@@ -249,8 +253,7 @@
PR target/49621 PR target/49621
* config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use
CONST0_RTX (dest_mode) instead of const0_rtx as second operand CONST0_RTX (dest_mode) instead of const0_rtx as second operand of NE.
of NE.
* config/rs6000/vector.md (vector_select_<mode>, * config/rs6000/vector.md (vector_select_<mode>,
vector_select_<mode>_uns): Change second operand of NE to vector_select_<mode>_uns): Change second operand of NE to
CONST0_RTX (<MODE>mode) instead of const0_rtx. CONST0_RTX (<MODE>mode) instead of const0_rtx.
...@@ -347,8 +350,7 @@ ...@@ -347,8 +350,7 @@
* optabs.c (expand_binop): Tighten conditions for doubleword * optabs.c (expand_binop): Tighten conditions for doubleword
expansions. expansions.
(widen_bswap): Assert that mode bitsize and precision are the (widen_bswap): Assert that mode bitsize and precision are the same.
same.
* stor-layout.c (get_best_mode): Skip modes that have lower * stor-layout.c (get_best_mode): Skip modes that have lower
precision than bitsize. precision than bitsize.
* recog.c (simplify_while_replacing): Assert that bitsize and * recog.c (simplify_while_replacing): Assert that bitsize and
...@@ -545,8 +547,7 @@ ...@@ -545,8 +547,7 @@
2011-07-07 Joseph Myers <joseph@codesourcery.com> 2011-07-07 Joseph Myers <joseph@codesourcery.com>
* config/i386/t-crtpic, config/i386/t-svr3dbx, config/pa/t-pa: * config/i386/t-crtpic, config/i386/t-svr3dbx, config/pa/t-pa: Remove.
Remove.
2011-07-07 Bernd Schmidt <bernds@codesourcery.com> 2011-07-07 Bernd Schmidt <bernds@codesourcery.com>
...@@ -574,8 +575,7 @@ ...@@ -574,8 +575,7 @@
2011-07-07 H.J. Lu <hongjiu.lu@intel.com> 2011-07-07 H.J. Lu <hongjiu.lu@intel.com>
* config.gcc: Support --with-multilib-list for x86 Linux * config.gcc: Support --with-multilib-list for x86 Linux targets.
targets.
* configure.ac: Mention x86-64 for --with-multilib-list. * configure.ac: Mention x86-64 for --with-multilib-list.
* configure: Regenerated. * configure: Regenerated.
...@@ -609,8 +609,7 @@ ...@@ -609,8 +609,7 @@
* config/i386/t-linux64: Support TM_MULTILIB_CONFIG. * config/i386/t-linux64: Support TM_MULTILIB_CONFIG.
* doc/install.texi: Document --with-multilib-list for * doc/install.texi: Document --with-multilib-list for Linux/x86-64.
Linux/x86-64.
* doc/invoke.texi: Document -mx32. * doc/invoke.texi: Document -mx32.
...@@ -660,24 +659,18 @@ ...@@ -660,24 +659,18 @@
(TARGET_HAVE_NAMED_SECTIONS): Don't define. (TARGET_HAVE_NAMED_SECTIONS): Don't define.
* common/config/m32c/m32c-common.c: Remove. * common/config/m32c/m32c-common.c: Remove.
* config.gcc (m32c*-*-*): Set target_has_targetm_common=no. * config.gcc (m32c*-*-*): Set target_has_targetm_common=no.
* config/alpha/osf5.h (TARGET_HAVE_NAMED_SECTIONS): Define to * config/alpha/osf5.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
false. * config/i386/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
* config/i386/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to * config/m68k/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
false.
* config/m68k/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to
false.
* config/pa/som.h (TARGET_HAVE_NAMED_SECTIONS): Define to false. * config/pa/som.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
* config/pdp11/pdp11.h (TARGET_HAVE_NAMED_SECTIONS): Define to * config/pdp11/pdp11.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
false. * config/vax/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
* config/vax/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to
false.
2011-07-07 Jakub Jelinek <jakub@redhat.com> 2011-07-07 Jakub Jelinek <jakub@redhat.com>
PR middle-end/49640 PR middle-end/49640
* gimplify.c (gimplify_compound_lval): For last 2 ARRAY_*REF * gimplify.c (gimplify_compound_lval): For last 2 ARRAY_*REF operands
operands and last COMPONENT_REF operand call gimplify_expr on it and last COMPONENT_REF operand call gimplify_expr on it if non-NULL.
if non-NULL.
2011-07-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 2011-07-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
...@@ -708,8 +701,7 @@ ...@@ -708,8 +701,7 @@
(ASM_SPEC): Redefine. (ASM_SPEC): Redefine.
(DEFAULT_ARCH32_P): Define using TARGET_64BIT_DEFAULT. (DEFAULT_ARCH32_P): Define using TARGET_64BIT_DEFAULT.
* config/host-solaris.c [__x86_64__] (TRY_EMPTY_VM_SPACE): Reduce. * config/host-solaris.c [__x86_64__] (TRY_EMPTY_VM_SPACE): Reduce.
* doc/install.texi (Specific, amd64-*-solaris2.1[0-9]*): * doc/install.texi (Specific, amd64-*-solaris2.1[0-9]*): Document.
Document.
(Specific, i?86-*-solaris2.10): Mention x86_64-*-solaris2.1[0-9]* (Specific, i?86-*-solaris2.10): Mention x86_64-*-solaris2.1[0-9]*
configuration. configuration.
(Specific, x86_64-*-solaris2.1[0-9]*): Document. (Specific, x86_64-*-solaris2.1[0-9]*): Document.
...@@ -787,11 +779,10 @@ ...@@ -787,11 +779,10 @@
Revert: Revert:
* simplify-rtx.c (simplify_const_binary_operation): Use the * simplify-rtx.c (simplify_const_binary_operation): Use the
shift_truncation_mask hook instead of performing modulo by shift_truncation_mask hook instead of performing modulo by width.
width. Compare against mode precision, not bitsize. Compare against mode precision, not bitsize.
* combine.c (combine_simplify_rtx, simplify_shift_const_1): * combine.c (combine_simplify_rtx, simplify_shift_const_1):
Use shift_truncation_mask instead of constructing the value Use shift_truncation_mask instead of constructing the value manually.
manually.
2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> 2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com>
...@@ -830,10 +821,8 @@ ...@@ -830,10 +821,8 @@
(AIX_FUNC_DESC_TOC_64BIT): Ditto. (AIX_FUNC_DESC_TOC_64BIT): Ditto.
(AIX_FUNC_DESC_SC_32BIT): Ditto. (AIX_FUNC_DESC_SC_32BIT): Ditto.
(AIX_FUNC_DESC_SC_64BIT): Ditto. (AIX_FUNC_DESC_SC_64BIT): Ditto.
(ptrload): New mode attribute for the appropriate load of a (ptrload): New mode attribute for the appropriate load of a pointer.
pointer. (call_indirect_aix32): Delete, rewrite AIX indirect function calls.
(call_indirect_aix32): Delete, rewrite AIX indirect function
calls.
(call_indirect_aix64): Ditto. (call_indirect_aix64): Ditto.
(call_value_indirect_aix32): Ditto. (call_value_indirect_aix32): Ditto.
(call_value_indirect_aix64): Ditto. (call_value_indirect_aix64): Ditto.
...@@ -866,8 +855,7 @@ ...@@ -866,8 +855,7 @@
2011-07-06 James Greenhalgh <james.greenhalgh@arm.com> 2011-07-06 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add __ARM_FEATURE_DSP.
__ARM_FEATURE_DSP.
2011-07-06 Basile Starynkevitch <basile@starynkevitch.net> 2011-07-06 Basile Starynkevitch <basile@starynkevitch.net>
...@@ -906,16 +894,14 @@ ...@@ -906,16 +894,14 @@
* simplify-rtx.c (mode_signbit_p): Use GET_MODE_PRECISION. * simplify-rtx.c (mode_signbit_p): Use GET_MODE_PRECISION.
(val_mode_signbit_p, val_mode_signbit_set_p): New functions. (val_mode_signbit_p, val_mode_signbit_set_p): New functions.
(simplify_const_unary_operation, simplify_binary_operation_1, (simplify_const_unary_operation, simplify_binary_operation_1,
simplify_const_binary_operation, simplify_const_binary_operation, simplify_const_relational_operation):
simplify_const_relational_operation): Use them. Use Use them. Use GET_MODE_MASK for masking and sign-extensions.
GET_MODE_MASK for masking and sign-extensions.
* combine.c (set_nonzero_bits_and_sign_copies, simplify_set, * combine.c (set_nonzero_bits_and_sign_copies, simplify_set,
combine_simplify_rtx, force_to_mode, reg_nonzero_bits_for_combine, combine_simplify_rtx, force_to_mode, reg_nonzero_bits_for_combine,
simplify_shift_const_1, simplify_comparison): Likewise. simplify_shift_const_1, simplify_comparison): Likewise.
* expr.c (convert_modes): Likewise. * expr.c (convert_modes): Likewise.
* rtlanal.c (nonzero_bits1, canonicalize_condition): Likewise. * rtlanal.c (nonzero_bits1, canonicalize_condition): Likewise.
* expmed.c (emit_cstore, emit_store_flag_1, emit_store_flag): * expmed.c (emit_cstore, emit_store_flag_1, emit_store_flag): Likewise.
Likewise.
* rtl.h (val_mode_signbit_p, val_mode_signbit_set_p): Declare. * rtl.h (val_mode_signbit_p, val_mode_signbit_set_p): Declare.
* simplify-rtx.c (simplify_ternary_operation): Remove dead code. * simplify-rtx.c (simplify_ternary_operation): Remove dead code.
...@@ -940,11 +926,10 @@ ...@@ -940,11 +926,10 @@
2011-07-06 Bernd Schmidt <bernds@codesourcery.com> 2011-07-06 Bernd Schmidt <bernds@codesourcery.com>
* simplify-rtx.c (simplify_const_binary_operation): Use the * simplify-rtx.c (simplify_const_binary_operation): Use the
shift_truncation_mask hook instead of performing modulo by shift_truncation_mask hook instead of performing modulo by width.
width. Compare against mode precision, not bitsize. Compare against mode precision, not bitsize.
* combine.c (combine_simplify_rtx, simplify_shift_const_1): * combine.c (combine_simplify_rtx, simplify_shift_const_1):
Use shift_truncation_mask instead of constructing the value Use shift_truncation_mask instead of constructing the value manually.
manually.
2011-07-06 H.J. Lu <hongjiu.lu@intel.com> 2011-07-06 H.J. Lu <hongjiu.lu@intel.com>
...@@ -1117,9 +1102,8 @@ ...@@ -1117,9 +1102,8 @@
* simplify-rtx.c (simplify_unary_operation_1) <case NEG>: When * simplify-rtx.c (simplify_unary_operation_1) <case NEG>: When
negating MULT, negate the second operand instead of first. negating MULT, negate the second operand instead of first.
(simplify_binary_operation_1) <case MULT>: If one operand is (simplify_binary_operation_1) <case MULT>: If one operand is
a NEG and the other is MULT, don't attempt to optimize by a NEG and the other is MULT, don't attempt to optimize by negation
negation of the MULT operand if it only moves the NEG operation of the MULT operand if it only moves the NEG operation around.
around.
PR debug/49602 PR debug/49602
* tree-into-ssa.c (rewrite_debug_stmt_uses): Disregard * tree-into-ssa.c (rewrite_debug_stmt_uses): Disregard
......
gcc/config/i386/i386.c
...@@ -22683,54 +22683,14 @@ static void ...@@ -22683,54 +22683,14 @@ static void
ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
{ {
rtx mem, fnaddr; rtx mem, fnaddr;
fnaddr = XEXP (DECL_RTL (fndecl), 0);
if (!TARGET_64BIT)
{
rtx disp, chain;
int opcode; int opcode;
int offset = 0;
/* Depending on the static chain location, either load a register fnaddr = XEXP (DECL_RTL (fndecl), 0);
with a constant, or push the constant to the stack. All of the
instructions are the same size. */
chain = ix86_static_chain (fndecl, true);
if (REG_P (chain))
{
if (REGNO (chain) == CX_REG)
opcode = 0xb9;
else if (REGNO (chain) == AX_REG)
opcode = 0xb8;
else
gcc_unreachable ();
}
else
opcode = 0x68;
mem = adjust_address (m_tramp, QImode, 0);
emit_move_insn (mem, gen_int_mode (opcode, QImode));
mem = adjust_address (m_tramp, SImode, 1);
emit_move_insn (mem, chain_value);
/* Compute offset from the end of the jmp to the target function.
In the case in which the trampoline stores the static chain on
the stack, we need to skip the first insn which pushes the
(call-saved) register static chain; this push is 1 byte. */
disp = expand_binop (SImode, sub_optab, fnaddr,
plus_constant (XEXP (m_tramp, 0),
MEM_P (chain) ? 9 : 10),
NULL_RTX, 1, OPTAB_DIRECT);
mem = adjust_address (m_tramp, QImode, 5);
emit_move_insn (mem, gen_int_mode (0xe9, QImode));
mem = adjust_address (m_tramp, SImode, 6); if (TARGET_64BIT)
emit_move_insn (mem, disp);
}
else
{ {
int offset = 0, size; int size;
/* Load the function address to r11. Try to load address using /* Load the function address to r11. Try to load address using
the shorter movl instead of movabs. We may want to support the shorter movl instead of movabs. We may want to support
...@@ -22757,20 +22717,22 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -22757,20 +22717,22 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
offset += 10; offset += 10;
} }
/* Load static chain using movabs to r10. */ /* Load static chain using movabs to r10. Use the
mem = adjust_address (m_tramp, HImode, offset); shorter movl instead of movabs for x32. */
/* Use the shorter movl instead of movabs for x32. */
if (TARGET_X32) if (TARGET_X32)
{ {
opcode = 0xba41;
size = 6; size = 6;
emit_move_insn (mem, gen_int_mode (0xba41, HImode));
} }
else else
{ {
opcode = 0xba49;
size = 10; size = 10;
emit_move_insn (mem, gen_int_mode (0xba49, HImode));
} }
mem = adjust_address (m_tramp, HImode, offset);
emit_move_insn (mem, gen_int_mode (opcode, HImode));
mem = adjust_address (m_tramp, ptr_mode, offset + 2); mem = adjust_address (m_tramp, ptr_mode, offset + 2);
emit_move_insn (mem, chain_value); emit_move_insn (mem, chain_value);
offset += size; offset += size;
...@@ -22780,10 +22742,56 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -22780,10 +22742,56 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
mem = adjust_address (m_tramp, SImode, offset); mem = adjust_address (m_tramp, SImode, offset);
emit_move_insn (mem, gen_int_mode (0x90e3ff49, SImode)); emit_move_insn (mem, gen_int_mode (0x90e3ff49, SImode));
offset += 4; offset += 4;
}
else
{
rtx disp, chain;
gcc_assert (offset <= TRAMPOLINE_SIZE); /* Depending on the static chain location, either load a register
with a constant, or push the constant to the stack. All of the
instructions are the same size. */
chain = ix86_static_chain (fndecl, true);
if (REG_P (chain))
{
switch (REGNO (chain))
{
case AX_REG:
opcode = 0xb8; break;
case CX_REG:
opcode = 0xb9; break;
default:
gcc_unreachable ();
}
}
else
opcode = 0x68;
mem = adjust_address (m_tramp, QImode, offset);
emit_move_insn (mem, gen_int_mode (opcode, QImode));
mem = adjust_address (m_tramp, SImode, offset + 1);
emit_move_insn (mem, chain_value);
offset += 5;
mem = adjust_address (m_tramp, QImode, offset);
emit_move_insn (mem, gen_int_mode (0xe9, QImode));
mem = adjust_address (m_tramp, SImode, offset + 1);
/* Compute offset from the end of the jmp to the target function.
In the case in which the trampoline stores the static chain on
the stack, we need to skip the first insn which pushes the
(call-saved) register static chain; this push is 1 byte. */
offset += 5;
disp = expand_binop (SImode, sub_optab, fnaddr,
plus_constant (XEXP (m_tramp, 0),
offset - (MEM_P (chain) ? 1 : 0)),
NULL_RTX, 1, OPTAB_DIRECT);
emit_move_insn (mem, disp);
} }
gcc_assert (offset <= TRAMPOLINE_SIZE);
#ifdef HAVE_ENABLE_EXECUTE_STACK #ifdef HAVE_ENABLE_EXECUTE_STACK
#ifdef CHECK_EXECUTE_STACK_ENABLED #ifdef CHECK_EXECUTE_STACK_ENABLED
if (CHECK_EXECUTE_STACK_ENABLED) if (CHECK_EXECUTE_STACK_ENABLED)
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