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lvzhengyang
riscv-gcc-1
Commits
f94bdcb6
Commit
f94bdcb6
authored
Oct 28, 1994
by
Michael Meissner
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Fix adddi3.
From-SVN: r8352
parent
46a70e45
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gcc/config/i386/i386.md
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gcc/config/i386/i386.md
View file @
f94bdcb6
...
...
@@ -2343,19 +2343,25 @@
;;- add instructions
(define_insn "adddi3"
[(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,o,o,o")
(plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,or,riF,riF,o")
(match_operand:DI 2 "general_operand" "o,riF,o,oriF,riF,o,o")))
(clobber (match_scratch:SI 3 "=X,X,&r,X,X,&r,&r"))]
[(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,
ro,o,&r,
o,o,o")
(plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,o
,riF,o,o
r,riF,riF,o")
(match_operand:DI 2 "general_operand" "o,riF,o,
0,0,0,
oriF,riF,o,o")))
(clobber (match_scratch:SI 3 "=X,X,&r,X,X,&r,
X,X,&r,
&r"))]
""
"*
{
rtx low[3], high[3], xops[7];
rtx low[3], high[3], xops[7]
, temp
;
CC_STATUS_INIT;
split_di (operands, 3, low, high);
if (rtx_equal_p (operands[0], operands[2]))
{
temp = operands[1];
operands[1] = operands[2];
operands[2] = temp;
}
split_di (operands, 3, low, high);
if (!rtx_equal_p (operands[0], operands[1]))
{
xops[0] = high[0];
...
...
@@ -2383,7 +2389,7 @@
}
}
if (GET_CODE (operands[3]) == REG)
if (GET_CODE (operands[3]) == REG
&& GET_CODE (operands[2]) != REG
)
{
xops[0] = high[0];
xops[1] = low[0];
...
...
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