Commit f94302e9 by H.J. Lu Committed by H.J. Lu

LRA: Revert "Remove useless move insns"

Useless move insn removal was added to LRA just to avoid wasting CPU
cycles on such insn processing afterwards.  Such insns are removed
anyway later in the pass pipeline.  The CPU time savings are tiny but
the removal creates too many problems including PR target/90178.
Vladimir pre-approved the patch to remove the code:

https://gcc.gnu.org/ml/gcc-patches/2019-04/msg00834.html

gcc/

	PR target/90178
	Revert:
	2018-11-21  Uros Bizjak  <ubizjak@gmail.com>

	Revert the revert:
	2013-10-26  Vladimir Makarov  <vmakarov@redhat.com>

	Revert:
	2013-10-25  Vladimir Makarov  <vmakarov@redhat.com>

	* lra-spills.c (lra_final_code_change): Remove useless move insns.

gcc/testsuite/

	PR target/90178
	* gcc.target/i386/pr90178.c: New test.

From-SVN: r270484
parent 6397d8df
2019-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/90178
Revert:
2018-11-21 Uros Bizjak <ubizjak@gmail.com>
Revert the revert:
2013-10-26 Vladimir Makarov <vmakarov@redhat.com>
Revert:
2013-10-25 Vladimir Makarov <vmakarov@redhat.com>
* lra-spills.c (lra_final_code_change): Remove useless move insns.
2019-04-21 Iain Sandoe <iain@sandoe.co.uk> 2019-04-21 Iain Sandoe <iain@sandoe.co.uk>
* config/rs6000/rs6000.md (group_end_nop): Emit insn register * config/rs6000/rs6000.md (group_end_nop): Emit insn register
......
...@@ -740,7 +740,6 @@ lra_final_code_change (void) ...@@ -740,7 +740,6 @@ lra_final_code_change (void)
int i, hard_regno; int i, hard_regno;
basic_block bb; basic_block bb;
rtx_insn *insn, *curr; rtx_insn *insn, *curr;
rtx set;
int max_regno = max_reg_num (); int max_regno = max_reg_num ();
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
...@@ -819,19 +818,5 @@ lra_final_code_change (void) ...@@ -819,19 +818,5 @@ lra_final_code_change (void)
} }
if (insn_change_p) if (insn_change_p)
lra_update_operator_dups (id); lra_update_operator_dups (id);
if ((set = single_set (insn)) != NULL
&& REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))
&& REGNO (SET_SRC (set)) == REGNO (SET_DEST (set)))
{
/* Remove an useless move insn. IRA can generate move
insns involving pseudos. It is better remove them
earlier to speed up compiler a bit. It is also
better to do it here as they might not pass final RTL
check in LRA, (e.g. insn moving a control register
into itself). */
lra_invalidate_insn_data (insn);
delete_insn (insn);
}
} }
} }
2019-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/90178
* gcc.target/i386/pr90178.c: New test.
2019-04-20 Sandra Loosemore <sandra@codesourcery.com> 2019-04-20 Sandra Loosemore <sandra@codesourcery.com>
* g++.dg/ipa/pr89009.C: Add dg-require-effective-target fpic. * g++.dg/ipa/pr89009.C: Add dg-require-effective-target fpic.
......
/* { dg-do compile } */
/* { dg-options "-O2 -mavx -mvzeroupper" } */
int*
find_ptr (int* mem, int sz, int val)
{
for (int i = 0; i < sz; i++)
if (mem[i] == val)
return &mem[i];
return 0;
}
/* { dg-final { scan-assembler-times "xorl\[\\t \]*\\\%eax,\[\\t \]*%eax" 1 } } */
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