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riscv-gcc-1
Commit f8ece000 by Eric Botcazou Committed by Eric Botcazou
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sparc.h: Remove dead code. 

	* config/sparc/sparc.h: Remove dead code.
	* config/sparc/sparc.c (sparc_compute_frame_size): Use
	FIRST_PARM_OFFSET for the size of the register window area.
	(emit_save_regs): Rename into emit_save_or_restore_regs.
	Add 'action' parameter.  Use 4095 as upper bound for the offset.
	Pass 'action' to save_or_restore_regs.
	(emit_restore_regs): Delete.
	(sparc_expand_prologue): Call emit_save_or_restore_regs.
	(sparc_expand_epilogue): Likewise.
	* config/sparc/sparc.md (mode macro P): Move.
	(movdi_insn_sp32_v9, movdi_insn_sp32): Swap.
	(mov<V32:mode> expander): Move to the top of the V32 section.
	(movdf_insn_sp32_v9_no_fpu, movdf_insn_sp32_v9): Swap.
	(movtf_insn_sp64_hq, movtf_insn_sp64): Swap.
	(sibcall_epilogue): Move.

From-SVN: r99609
parent fa2c88a0
Showing with 30 additions and 53 deletions
gcc/ChangeLog
2005-05-12 Eric Botcazou <ebotcazou@libertysurf.fr>
* config/sparc/sparc.h: Remove dead code.
* config/sparc/sparc.c (sparc_compute_frame_size): Use
FIRST_PARM_OFFSET for the size of the register window area.
(emit_save_regs): Rename into emit_save_or_restore_regs.
Add 'action' parameter. Use 4095 as upper bound for the offset.
Pass 'action' to save_or_restore_regs.
(emit_restore_regs): Delete.
(sparc_expand_prologue): Call emit_save_or_restore_regs.
(sparc_expand_epilogue): Likewise.
* config/sparc/sparc.md (mode macro P): Move.
(movdi_insn_sp32_v9, movdi_insn_sp32): Swap.
(mov<V32:mode> expander): Move to the top of the V32 section.
(movdf_insn_sp32_v9_no_fpu, movdf_insn_sp32_v9): Swap.
(movtf_insn_sp64_hq, movtf_insn_sp64): Swap.
(sibcall_epilogue): Move.
2005-05-12 Richard Earnshaw <richard.earnshaw@arm.com>
PR target/21501
......
gcc/config/sparc/sparc.c
......@@ -318,8 +318,7 @@ static int set_extends (rtx);
static void emit_pic_helper (void);
static void load_pic_register (bool);
static int save_or_restore_regs (int, int, rtx, int, int);
static void emit_save_regs (void);
static void emit_restore_regs (void);
static void emit_save_or_restore_regs (int);
static void sparc_asm_function_prologue (FILE *, HOST_WIDE_INT);
static void sparc_asm_function_epilogue (FILE *, HOST_WIDE_INT);
#ifdef OBJECT_FORMAT_ELF
......@@ -3508,10 +3507,9 @@ sparc_compute_frame_size (HOST_WIDE_INT size, int leaf_function_p)
/* Make sure nothing can clobber our register windows.
If a SAVE must be done, or there is a stack-local variable,
the register window area must be allocated.
??? For v8 we apparently need an additional 8 bytes of reserved space. */
the register window area must be allocated. */
if (! leaf_function_p || size > 0)
actual_fsize += (16 * UNITS_PER_WORD) + (TARGET_ARCH64 ? 0 : 8);
actual_fsize += FIRST_PARM_OFFSET (current_function_decl);
return SPARC_STACK_ALIGN (actual_fsize);
}
......@@ -3623,14 +3621,14 @@ save_or_restore_regs (int low, int high, rtx base, int offset, int action)
/* Emit code to save call-saved registers. */
static void
emit_save_regs (void)
emit_save_or_restore_regs (int action)
{
HOST_WIDE_INT offset;
rtx base;
offset = frame_base_offset - apparent_fsize;
if (offset < -4096 || offset + num_gfregs * 4 > 4096)
if (offset < -4096 || offset + num_gfregs * 4 > 4095)
{
/* ??? This might be optimized a little as %g1 might already have a
value close enough that a single add insn will do. */
......@@ -3648,34 +3646,8 @@ emit_save_regs (void)
else
base = frame_base_reg;
offset = save_or_restore_regs (0, 8, base, offset, SORR_SAVE);
save_or_restore_regs (32, TARGET_V9 ? 96 : 64, base, offset, SORR_SAVE);
}
/* Emit code to restore call-saved registers. */
static void
emit_restore_regs (void)
{
HOST_WIDE_INT offset;
rtx base;
offset = frame_base_offset - apparent_fsize;
if (offset < -4096 || offset + num_gfregs * 4 > 4096 - 8 /*double*/)
{
base = gen_rtx_REG (Pmode, 1);
emit_move_insn (base, GEN_INT (offset));
emit_insn (gen_rtx_SET (VOIDmode,
base,
gen_rtx_PLUS (Pmode, frame_base_reg, base)));
offset = 0;
}
else
base = frame_base_reg;
offset = save_or_restore_regs (0, 8, base, offset, SORR_RESTORE);
save_or_restore_regs (32, TARGET_V9 ? 96 : 64, base, offset, SORR_RESTORE);
offset = save_or_restore_regs (0, 8, base, offset, action);
save_or_restore_regs (32, TARGET_V9 ? 96 : 64, base, offset, action);
}
/* Generate a save_register_window insn. */
......@@ -3814,9 +3786,8 @@ sparc_expand_prologue (void)
RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, i)) = 1;
}
/* Call-saved registers are saved just above the outgoing argument area. */
if (num_gfregs)
emit_save_regs ();
emit_save_or_restore_regs (SORR_SAVE);
/* Load the PIC register if needed. */
if (flag_pic && current_function_uses_pic_offset_table)
......@@ -3824,12 +3795,7 @@ sparc_expand_prologue (void)
}
/* This function generates the assembly code for function entry, which boils
down to emitting the necessary .register directives.
??? Historical cruft: "On SPARC, move-double insns between fpu and cpu need
an 8-byte block of memory. If any fpu reg is used in the function, we
allocate such a block here, at the bottom of the frame, just in case it's
needed." Could this explain the -8 in emit_restore_regs? */
down to emitting the necessary .register directives. */
static void
sparc_asm_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
......@@ -3847,7 +3813,7 @@ void
sparc_expand_epilogue (void)
{
if (num_gfregs)
emit_restore_regs ();
emit_save_or_restore_regs (SORR_RESTORE);
if (actual_fsize == 0)
/* do nothing. */ ;
......
gcc/config/sparc/sparc.h
......@@ -906,9 +906,6 @@ extern int sparc_mode_class[];
/* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */
/* SPARC pc isn't overloaded on a register that the compiler knows about. */
/* #define PC_REGNUM */
/* Register to use for pushing function arguments. */
#define STACK_POINTER_REGNUM 14
......@@ -1375,16 +1372,12 @@ extern char leaf_reg_remap[];
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
first local allocated. Otherwise, it is the offset to the BEGINNING
of the first local allocated. */
/* This allows space for one TFmode floating point value. */
/* This allows space for one TFmode floating point value, which is used
by SECONDARY_MEMORY_NEEDED_RTX. */
#define STARTING_FRAME_OFFSET \
(TARGET_ARCH64 ? -16 \
: (-SPARC_STACK_ALIGN (LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT)))
/* If we generate an insn to push BYTES bytes,
this says how many the stack pointer really advances by.
On SPARC, don't define this because there are no push insns. */
/* #define PUSH_ROUNDING(BYTES) */
/* Offset of first parameter from the argument pointer register value.
!v9: This is 64 for the ins and locals, plus 4 for the struct-return reg
even if this function isn't going to use it.
......
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