({adddi,subdi}_sexthishl32): 'a' and 'd' versions merged and fixed; do

not generate 'add/sub a,m'.

From-SVN: r11127

gcc/config/m68k/m68k.md

@@ -2014,31 +2014,25 @@
   return \"sub%.l %2,%3\;subx%.l %2,%0\";
 }")
 
-(define_insn "adddia_sexthishl32"
-  [(set (match_operand:DI 0 "register_operand" "+a")
+(define_insn "adddi_sexthishl32"
+  [(set (match_operand:DI 0 "general_operand" "=o,d,a")
     (plus:DI (ashift:DI (sign_extend:DI
-          (match_operand:HI 1 "general_operand" "rm"))
+          (match_operand:HI 1 "general_operand" "rm,rm,rm"))
             (const_int 32))
-        (match_dup 0)))]
+        (match_operand:DI 2 "general_operand" "0,0,0")))
+   (clobber (match_scratch:SI 3 "=&d*a,a*d,X"))]
   ""
   "*
 {
   CC_STATUS_INIT;
-  return \"add%.w %1,%0\";
-} ")
-
-(define_insn "adddid_sexthishl32"
-  [(set (match_operand:DI 0 "general_operand" "+ro")
-    (plus:DI (ashift:DI (sign_extend:DI
-          (match_operand:HI 1 "general_operand" "rm"))
-            (const_int 32))
-        (match_dup 0)))
-   (clobber (match_scratch:SI 2 "=a"))]
-  ""
-  "*
-{
-  CC_STATUS_INIT;
-  return \"move%.w %1,%2\;add%.l %2,%0\";
+  if (ADDRESS_REG_P (operands[0]))
+    return \"add%.w %1,%0\";
+  else if (DATA_REG_P (operands[3]))
+    return \"move%.w %1,%3\;ext%.l %3\;add%.l %3,%0\";
+  else if (DATA_REG_P (operands[0]))
+    return \"move%.w %1,%3\;add%.l %3,%0\";
+  else
+    return \"move%.l %0,%3\;add%.w %1,%3\;mov%.l %3,%0\";
 } ")
 
 (define_insn "adddi_dilshr32"
@@ -2627,29 +2621,24 @@
 
 ;; subtract instructions
 
-(define_insn "subdia_sexthishl32"
-  [(set (match_operand:DI 0 "register_operand" "+a")
-    (minus:DI (match_dup 0)
-        (ashift:DI (sign_extend:DI (match_operand:HI 1 "general_operand" "rm"))
-            (const_int 32))))]
-  ""
-  "*
-{
-  CC_STATUS_INIT;
-  return \"sub%.w %1,%0\";
-} ")
-
-(define_insn "subdid_sexthishl32"
-  [(set (match_operand:DI 0 "general_operand" "+ro")
-    (minus:DI (match_dup 0)
-        (ashift:DI (sign_extend:DI (match_operand:HI 1 "general_operand" "rm"))
+(define_insn "subdi_sexthishl32"
+  [(set (match_operand:DI 0 "general_operand" "=o,d,a")
+    (minus:DI (match_operand:DI 1 "general_operand" "0,0,0")
+        (ashift:DI (sign_extend:DI (match_operand:HI 2 "general_operand" "rm,rm,rm"))
             (const_int 32))))
-   (clobber (match_scratch:SI 2 "=a"))]
+   (clobber (match_scratch:SI 3 "=&d*a,a*d,X"))]
   ""
   "*
 {
   CC_STATUS_INIT;
-  return \"move%.w %1,%2\;sub%.l %2,%0\";
+  if (ADDRESS_REG_P (operands[0]))
+    return \"sub%.w %2,%0\";
+  else if (DATA_REG_P (operands[3]))
+    return \"move%.w %2,%3\;ext%.l %3\;sub%.l %3,%0\";
+  else if (DATA_REG_P (operands[0]))
+    return \"move%.w %2,%3\;sub%.l %3,%0\";
+  else
+    return \"move%.l %0,%3\;sub%.w %2,%3\;mov%.l %3,%0\";
 } ")
 
 (define_insn "subdi_dishl32"