Commit f7e1d19d by Tamar Christina Committed by Tamar Christina

Limit movmem copies to TImode on AArch64

On AArch64 we have integer modes larger than TImode, and while we can generate
moves for these they're not as efficient.

So instead make sure we limit the maximum we can copy to TImode.  This means
copying a 16 byte struct will issue 1 TImode copy, which will be done using a
single STP as we expect but an CImode sized copy won't issue CImode operations.

I am also moving the residual code inside the if since smallest_mode_for_int may
trap if the mode doesn't exist.  And the only time we know the mode to exist for
sure is when the condition of the if is true.  This also saves repeated calls to
the iterator.

gcc/
2018-08-30  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64.c (aarch64_expand_movmem): Set TImode max.

gcc/testsuite/
2018-08-30  Tamar Christina  <tamar.christina@arm.com>

 	* gcc.target/aarch64/large_struct_copy_2.c: New.

From-SVN: r263974
parent c729951e
2018-08-30 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64.c (aarch64_expand_movmem): Set TImode max.
2018-08-30 Vlad Lazar <vlad.lazar@arm.com> 2018-08-30 Vlad Lazar <vlad.lazar@arm.com>
PR middle-end/86995 PR middle-end/86995
......
...@@ -15938,13 +15938,17 @@ aarch64_expand_movmem (rtx *operands) ...@@ -15938,13 +15938,17 @@ aarch64_expand_movmem (rtx *operands)
/* Convert n to bits to make the rest of the code simpler. */ /* Convert n to bits to make the rest of the code simpler. */
n = n * BITS_PER_UNIT; n = n * BITS_PER_UNIT;
/* Maximum amount to copy in one go. The AArch64 back-end has integer modes
larger than TImode, but we should not use them for loads/stores here. */
const int copy_limit = GET_MODE_BITSIZE (TImode);
while (n > 0) while (n > 0)
{ {
/* Find the largest mode in which to do the copy in without over reading /* Find the largest mode in which to do the copy in without over reading
or writing. */ or writing. */
opt_scalar_int_mode mode_iter; opt_scalar_int_mode mode_iter;
FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
if (GET_MODE_BITSIZE (mode_iter.require ()) <= n) if (GET_MODE_BITSIZE (mode_iter.require ()) <= MIN (n, copy_limit))
cur_mode = mode_iter.require (); cur_mode = mode_iter.require ();
gcc_assert (cur_mode != BLKmode); gcc_assert (cur_mode != BLKmode);
...@@ -15958,10 +15962,10 @@ aarch64_expand_movmem (rtx *operands) ...@@ -15958,10 +15962,10 @@ aarch64_expand_movmem (rtx *operands)
cheaper. i.e. less instructions to do so. For instance doing a 15 cheaper. i.e. less instructions to do so. For instance doing a 15
byte copy it's more efficient to do two overlapping 8 byte copies than byte copy it's more efficient to do two overlapping 8 byte copies than
8 + 6 + 1. */ 8 + 6 + 1. */
next_mode = smallest_mode_for_size (n, MODE_INT); if (n > 0 && n <= 8 * BITS_PER_UNIT)
int n_bits = GET_MODE_BITSIZE (next_mode).to_constant ();
if (n > 0 && n_bits > n && n_bits <= 8 * BITS_PER_UNIT)
{ {
next_mode = smallest_mode_for_size (n, MODE_INT);
int n_bits = GET_MODE_BITSIZE (next_mode).to_constant ();
src = aarch64_move_pointer (src, (n - n_bits) / BITS_PER_UNIT); src = aarch64_move_pointer (src, (n - n_bits) / BITS_PER_UNIT);
dst = aarch64_move_pointer (dst, (n - n_bits) / BITS_PER_UNIT); dst = aarch64_move_pointer (dst, (n - n_bits) / BITS_PER_UNIT);
n = n_bits; n = n_bits;
......
2018-08-30 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/large_struct_copy_2.c: New.
2018-08-29 Bernd Edlinger <bernd.edlinger@hotmail.de> 2018-08-29 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR middle-end/87053 PR middle-end/87053
......
/* { dg-do compile } */
/* { dg-options "-O2" } */
typedef unsigned __attribute__((mode(DI))) uint64_t;
struct S0 {
uint64_t f1;
uint64_t f2;
uint64_t f3;
uint64_t f4;
uint64_t f5;
} a;
struct S2 {
uint64_t f0;
uint64_t f2;
struct S0 f3;
};
void fn1 () {
struct S2 b = {0, 1, 7, 4073709551611, 4, 8, 7};
a = b.f3;
}
/* { dg-final { scan-assembler-times {ldp\s+x[0-9]+} 2 } } */
/* { dg-final { scan-assembler-times {stp\s+x[0-9]+} 2 } } */
/* { dg-final { scan-assembler-not {ld[1-3]} } } */
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