re PR target/24861 (internal compiler error when building gcc with…

re PR target/24861 (internal compiler error when building gcc with --with-cpu=ep9312 --with-fpu=maverick)

	PR target/24861
	* arm.md (split for movsf with immediate): Restrict split to insns
	that set a general register.

From-SVN: r107104

gcc/ChangeLog

+2005-11-16  Richard Earnshaw  <richard.earnshaw@arm.com>
+
+	PR target/24861
+	* arm.md (split for movsf with immediate): Restrict split to insns
+	that set a general register.
+
 2005-11-16  Daniel Jacobowitz  <dan@codesourcery.com>
 
 	* config/ia64/unwind-ia64.c (uw_advance_context): New.  Call

gcc/config/arm/arm.md

@@ -5137,11 +5137,12 @@
   "
 )
 
+;; Transform a floating-point move of a constant into a core register into
+;; an SImode operation.
 (define_split
-  [(set (match_operand:SF 0 "nonimmediate_operand" "")
+  [(set (match_operand:SF 0 "arm_general_register_operand" "")
 	(match_operand:SF 1 "immediate_operand" ""))]
   "TARGET_ARM
-   && !(TARGET_HARD_FLOAT && TARGET_FPA)
    && reload_completed
    && GET_CODE (operands[1]) == CONST_DOUBLE"
   [(set (match_dup 2) (match_dup 3))]