Commit f74fc01d by Carl Love Committed by Carl Love

vsx.md: Change word selector to prefered location.


gcc/ChangeLog:

2018-06-25  Carl Love  <cel@us.ibm.com>

	* config/rs6000/vsx.md: Change word selector to prefered location.

Signed-off-by: Carl Love <cel@us.ibm.com>
---
 gcc/config/rs6000/vsx.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index a528ef2e8..6e7a4277f 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3934,7 +3934,7 @@
 
   operands[5] = gen_rtx_REG (V4SFmode, tmp_regno);
   operands[6] = gen_rtx_REG (V4SImode, tmp_regno);
-  operands[7] = GEN_INT (BYTES_BIG_ENDIAN ? 1 : 2);
+  operands[7] = GEN_INT (BYTES_BIG_ENDIAN ? 0 : 3);
   operands[8] = gen_rtx_REG (V4SImode, reg_or_subregno (operands[0]));
 }
   [(set_attr "type" "vecperm")
-- 
2.17.1

From-SVN: r262020
parent 2817a2b6
2018-06-25 Carl Love <cel@us.ibm.com>
* config/rs6000/vsx.md: Change word selector to prefered location.
2018-06-25 Richard Biener <rguenther@suse.de> 2018-06-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/86304 PR tree-optimization/86304
......
...@@ -3934,7 +3934,7 @@ ...@@ -3934,7 +3934,7 @@
operands[5] = gen_rtx_REG (V4SFmode, tmp_regno); operands[5] = gen_rtx_REG (V4SFmode, tmp_regno);
operands[6] = gen_rtx_REG (V4SImode, tmp_regno); operands[6] = gen_rtx_REG (V4SImode, tmp_regno);
operands[7] = GEN_INT (BYTES_BIG_ENDIAN ? 1 : 2); operands[7] = GEN_INT (BYTES_BIG_ENDIAN ? 0 : 3);
operands[8] = gen_rtx_REG (V4SImode, reg_or_subregno (operands[0])); operands[8] = gen_rtx_REG (V4SImode, reg_or_subregno (operands[0]));
} }
[(set_attr "type" "vecperm") [(set_attr "type" "vecperm")
......
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