Commit f73dc006 by Wilco Dijkstra Committed by Wilco Dijkstra

[PATCH][AArch64] Fix generation of tst (PR87763)

The TST instruction no longer matches in all cases due to changes in
Combine.  The fix is simple, we now need to allow a subreg as well when
selecting the cc_mode.  This fixes the tst_5.c and tst_6.c failures.

AArch64 regress & bootstrap OK.

	PR rtl-optimization/87763
	* config/aarch64/aarch64.c (aarch64_select_cc_mode):
	Allow SUBREG when matching CC_NZmode compare.

From-SVN: r268265
parent cb1ba35f
2019-01-25 Wilco Dijkstra <wdijkstr@arm.com>
PR rtl-optimization/87763
* config/aarch64/aarch64.c (aarch64_select_cc_mode):
Allow SUBREG when matching CC_NZmode compare.
2019-01-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/89049
......
......@@ -7163,7 +7163,7 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
/* Equality comparisons of short modes against zero can be performed
using the TST instruction with the appropriate bitmask. */
if (y == const0_rtx && REG_P (x)
if (y == const0_rtx && (REG_P (x) || SUBREG_P (x))
&& (code == EQ || code == NE)
&& (mode_x == HImode || mode_x == QImode))
return CC_NZmode;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment