alpha.c (some_ni_operand): New.

        * alpha.c (some_ni_operand): New.
        * alpha-protos.h: Declare it.
        * alpha.h (PREDICATE_CODES): Update.
        * alpha.md (sXaddq reload insns): Use some_ni_operand
        for SET_DEST instead of some_operand.

From-SVN: r29959

gcc/ChangeLog

+Wed Oct 13 21:18:17 1999  Richard Henderson  <rth@cygnus.com>
+
+	* alpha.c (some_ni_operand): New.
+	* alpha-protos.h: Declare it.
+	* alpha.h (PREDICATE_CODES): Update.
+	* alpha.md (sXaddq reload insns): Use some_ni_operand 
+	for SET_DEST instead of some_operand.
+
 Wed Oct 13 21:04:45 1999  Richard Henderson  <rth@cygnus.com>
 			  Jim Wilson  <wilson@cygnus.com>
 

gcc/config/alpha/alpha-protos.h

@@ -50,6 +50,7 @@ extern int reg_or_fp0_operand PROTO ((rtx, enum machine_mode));
 extern int hard_fp_register_operand PROTO ((rtx, enum machine_mode));
 extern int reg_or_cint_operand PROTO ((rtx, enum machine_mode));
 extern int some_operand PROTO ((rtx, enum machine_mode));
+extern int some_ni_operand PROTO ((rtx, enum machine_mode));
 extern int input_operand PROTO ((rtx, enum machine_mode));
 extern int current_file_function_operand PROTO ((rtx, enum machine_mode));
 extern int call_operand PROTO ((rtx, enum machine_mode));

gcc/config/alpha/alpha.c

@@ -585,6 +585,22 @@ some_operand (op, mode)
   return 0;
 }
 
+/* Likewise, but don't accept constants.  */
+
+int
+some_ni_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  if (GET_MODE (op) != mode && mode != VOIDmode)
+    return 0;
+
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+
+  return (GET_CODE (op) == REG || GET_CODE (op) == MEM);
+}
+
 /* Return 1 if OP is a valid operand for the source of a move insn.  */
 
 int

gcc/config/alpha/alpha.h

@@ -2330,6 +2330,7 @@ do {									\
 		     SYMBOL_REF, CONST, LABEL_REF}},			\
   {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE,		\
 		    SYMBOL_REF, CONST, LABEL_REF}},			\
+  {"some_ni_operand", {SUBREG, REG, MEM}},				\
   {"aligned_memory_operand", {MEM}},					\
   {"unaligned_memory_operand", {MEM}},					\
   {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}},			\

gcc/config/alpha/alpha.md

@@ -669,7 +669,7 @@
 ;; recognize them while reloading.
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
 	(plus:DI (plus:DI (match_operand:DI 1 "some_operand" "%r,r")
 			  (match_operand:DI 2 "some_operand" "%r,r"))
 		 (match_operand:DI 3 "some_operand" "IOKL,r")))]
@@ -687,7 +687,7 @@
   "")
 					   
 (define_insn ""
-  [(set (match_operand:SI 0 "some_operand" "=r,&r")
+  [(set (match_operand:SI 0 "some_ni_operand" "=r,&r")
 	(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
 				   (match_operand:SI 2 "const48_operand" "I,I"))
 			  (match_operand:SI 3 "some_operand" "%r,r"))
@@ -708,7 +708,7 @@
   "")
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
 	(sign_extend:DI
 	 (plus:SI (plus:SI
 		   (mult:SI (match_operand:SI 1 "some_operand" "rJ,rJ")
@@ -733,7 +733,7 @@
   "operands[5] = gen_lowpart (SImode, operands[0]);")
 
 (define_insn ""
-  [(set (match_operand:DI 0 "some_operand" "=r,&r")
+  [(set (match_operand:DI 0 "some_ni_operand" "=r,&r")
 	(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ,rJ")
 				   (match_operand:DI 2 "const48_operand" "I,I"))
 			  (match_operand:DI 3 "some_operand" "%r,r"))