atomic-comp-swap-release-acquire.c: Adjust dg-options to disable LSE extensions.

	* gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adjust
	dg-options to disable LSE extensions.
	* gcc.target/aarch64/atomic-op-acq_rel.c: Likewise.
	* gcc.target/aarch64/atomic-op-acquire.c: Likewise.
	* gcc.target/aarch64/atomic-op-char.c: Likewise.
	* gcc.target/aarch64/atomic-op-consume.c: Likewise.
	* gcc.target/aarch64/atomic-op-imm.c: Likewise.
	* gcc.target/aarch64/atomic-op-int.c: Likewise.
	* gcc.target/aarch64/atomic-op-long.c: Likewise.
	* gcc.target/aarch64/atomic-op-relaxed.c: Likewise.
	* gcc.target/aarch64/atomic-op-seq_cst.c: Likewise.
	* gcc.target/aarch64/atomic-op-release.c: Likewise.
	* gcc.target/aarch64/atomic-op-short.c: Likewise.
	* gcc.target/aarch64/sync-comp-swap.c: Likewise.
	* gcc.target/aarch64/sync-op-acquire.c: Likewise.
	* gcc.target/aarch64/sync-op-full.c: Likewise.
	* gcc.target/aarch64/sync-op-release.c: Likewise.

From-SVN: r226979

gcc/testsuite/ChangeLog

+2015-08-18  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adjust
+	dg-options to disable LSE extensions.
+	* gcc.target/aarch64/atomic-op-acq_rel.c: Likewise.
+	* gcc.target/aarch64/atomic-op-acquire.c: Likewise.
+	* gcc.target/aarch64/atomic-op-char.c: Likewise.
+	* gcc.target/aarch64/atomic-op-consume.c: Likewise.
+	* gcc.target/aarch64/atomic-op-imm.c: Likewise.
+	* gcc.target/aarch64/atomic-op-int.c: Likewise.
+	* gcc.target/aarch64/atomic-op-long.c: Likewise.
+	* gcc.target/aarch64/atomic-op-relaxed.c: Likewise.
+	* gcc.target/aarch64/atomic-op-seq_cst.c: Likewise.
+	* gcc.target/aarch64/atomic-op-release.c: Likewise.
+	* gcc.target/aarch64/atomic-op-short.c: Likewise.
+	* gcc.target/aarch64/sync-comp-swap.c: Likewise.
+	* gcc.target/aarch64/sync-op-acquire.c: Likewise.
+	* gcc.target/aarch64/sync-op-full.c: Likewise.
+	* gcc.target/aarch64/sync-op-release.c: Likewise.
+
 2015-08-18  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/67160

gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c

 /* { dg-do compile } */
-/* { dg-options "-O2 -fno-ipa-icf" } */
+/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
 
 #include "atomic-comp-swap-release-acquire.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-acq_rel.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-acquire.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-char.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-char.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-consume.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 int v = 0;
 

gcc/testsuite/gcc.target/aarch64/atomic-op-int.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-int.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-long.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 long v = 0;
 

gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-relaxed.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-release.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-release.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-seq_cst.x"
 

gcc/testsuite/gcc.target/aarch64/atomic-op-short.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "atomic-op-short.x"
 

gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c

 /* { dg-do compile } */
-/* { dg-options "-O2 -fno-ipa-icf" } */
+/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
 
 #include "sync-comp-swap.x"
 

gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "sync-op-acquire.x"
 

gcc/testsuite/gcc.target/aarch64/sync-op-full.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "sync-op-full.x"
 

gcc/testsuite/gcc.target/aarch64/sync-op-release.c

 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
 
 #include "sync-op-release.x"