re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)

	PR tree-optimization/91201
	* config/i386/i386-expand.c (ix86_expand_vector_extract): For elt == 0
	V16QImode extraction without sse4.1 try to use V4SImode lowpart
	extraction.

	* gcc.target/i386/sse2-pr91201-3.c: New test.
	* gcc.target/i386/sse2-pr91201-4.c: New test.
	* gcc.target/i386/sse2-pr91201-5.c: New test.
	* gcc.target/i386/sse2-pr91201-6.c: New test.

From-SVN: r273998

gcc/ChangeLog

+2019-08-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/91201
+	* config/i386/i386-expand.c (ix86_expand_vector_extract): For elt == 0
+	V16QImode extraction without sse4.1 try to use V4SImode lowpart
+	extraction.
+
 2019-08-01  Martin Sebor  <msebor@redhat.com>
 
 	PR c++/90947

gcc/config/i386/i386-expand.c

@@ -14706,6 +14706,17 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
 
     case E_V16QImode:
       use_vec_extr = TARGET_SSE4_1;
+      if (!use_vec_extr
+	  && TARGET_SSE2
+	  && elt == 0
+	  && (optimize_insn_for_size_p () || TARGET_INTER_UNIT_MOVES_FROM_VEC))
+	{
+	  tmp = gen_reg_rtx (SImode);
+	  ix86_expand_vector_extract (false, tmp, gen_lowpart (V4SImode, vec),
+				      0);
+	  emit_insn (gen_rtx_SET (target, gen_lowpart (QImode, tmp)));
+	  return;
+	}
       break;
 
     case E_V8SFmode:

gcc/testsuite/ChangeLog

+2019-08-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/91201
+	* gcc.target/i386/sse2-pr91201-3.c: New test.
+	* gcc.target/i386/sse2-pr91201-4.c: New test.
+	* gcc.target/i386/sse2-pr91201-5.c: New test.
+	* gcc.target/i386/sse2-pr91201-6.c: New test.
+
 2019-08-02  Martin Liska  <mliska@suse.cz>
 
 	* g++.dg/cpp1y/new2.C: New test.

gcc/testsuite/gcc.target/i386/sse2-pr91201-3.c

+/* PR tree-optimization/91201 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2 -mno-sse3 -mtune=generic -masm=att" } */
+/* { dg-final { scan-assembler "\tmovd\t%xmm0, %eax" } } */
+/* { dg-final { scan-assembler-not "\\(%" } } */
+
+typedef unsigned char V __attribute__((vector_size (16)));
+
+unsigned char
+foo (V x)
+{
+  return x[0];
+}

gcc/testsuite/gcc.target/i386/sse2-pr91201-4.c

+/* PR tree-optimization/91201 */
+/* { dg-do compile } */
+/* { dg-options "-Os -msse2 -mno-sse3 -mtune=generic -masm=att" } */
+/* { dg-final { scan-assembler "\tmovd\t%xmm0, %eax" } } */
+/* { dg-final { scan-assembler-not "\\(%" } } */
+
+typedef unsigned char V __attribute__((vector_size (16)));
+
+unsigned char
+foo (V x)
+{
+  return x[0];
+}

gcc/testsuite/gcc.target/i386/sse2-pr91201-5.c

+/* PR tree-optimization/91201 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2 -mno-sse3 -mtune=k8 -masm=att" } */
+/* { dg-final { scan-assembler-not "\tmovd\t%xmm0, %eax" } } */
+/* { dg-final { scan-assembler "\tmov(zbl|b)\t\[^\n\r]*\\(%" } } */
+
+typedef unsigned char V __attribute__((vector_size (16)));
+
+unsigned char
+foo (V x)
+{
+  return x[0];
+}

gcc/testsuite/gcc.target/i386/sse2-pr91201-6.c

+/* PR tree-optimization/91201 */
+/* { dg-do compile } */
+/* { dg-options "-Os -msse2 -mno-sse3 -mtune=k8 -masm=att" } */
+/* { dg-final { scan-assembler "\tmovd\t%xmm0, %eax" } } */
+/* { dg-final { scan-assembler-not "\\(%" } } */
+
+typedef unsigned char V __attribute__((vector_size (16)));
+
+unsigned char
+foo (V x)
+{
+  return x[0];
+}