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riscv-gcc-1
Commit f5f7d171 by James A. Morrison
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sparc.c: Use gcc_assert and gcc_unreachable. 

2005-04-11  James A. Morrison  <phython@gcc.gnu.org>

        * config/sparc/sparc.c: Use gcc_assert and gcc_unreachable.
        * config/sparc/sparc.h: Likewise.
        * config/sparc/sparc.md: Likewise.

From-SVN: r97976
parent 977ec5f8
Showing with 23 additions and 27 deletions
gcc/ChangeLog
2005-04-11 James A. Morrison <phython@gcc.gnu.org>
* config/sparc/sparc.c: Use gcc_assert and gcc_unreachable.
* config/sparc/sparc.h: Likewise.
* config/sparc/sparc.md: Likewise.
2005-04-11 Kazu Hirata <kazu@cs.umass.edu>
* tree-vrp.c (maybe_add_assert_expr): Move a comment.
......
gcc/config/sparc/sparc.h
......@@ -2571,10 +2571,9 @@ extern int sparc_indent_opcode;
base = XEXP (addr, 0), index = XEXP (addr, 1); \
if (GET_CODE (base) == LO_SUM) \
{ \
if (! USE_AS_OFFSETABLE_LO10 \
|| TARGET_ARCH32 \
|| TARGET_CM_MEDMID) \
abort (); \
gcc_assert (USE_AS_OFFSETABLE_LO10 \
&& TARGET_ARCH64 \
&& ! TARGET_CM_MEDMID); \
output_operand (XEXP (base, 0), 0); \
fputs ("+%lo(", FILE); \
output_address (XEXP (base, 1)); \
......@@ -2590,7 +2589,7 @@ extern int sparc_indent_opcode;
else if (GET_CODE (index) == SYMBOL_REF \
|| GET_CODE (index) == CONST) \
fputc ('+', FILE), output_addr_const (FILE, index); \
else abort (); \
else gcc_unreachable (); \
} \
} \
else if (GET_CODE (addr) == MINUS \
......
gcc/config/sparc/sparc.md
......@@ -2083,8 +2083,7 @@
if (GET_CODE (operands[1]) == LABEL_REF)
{
if (! TARGET_ARCH64)
abort ();
gcc_assert (TARGET_ARCH64);
emit_insn (gen_movdi_pic_label_ref (operands[0], operands[1]));
DONE;
}
......@@ -2639,7 +2638,7 @@
case 8:
return "st\t%r1, %0";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "fpmove,*,*,*,*,load,fpload,fpstore,store")])
......@@ -2686,7 +2685,7 @@
case 9:
return "st\t%r1, %0";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "fpmove,fga,*,*,*,*,load,fpload,fpstore,store")])
......@@ -2731,7 +2730,7 @@
case 5:
return "st\t%r1, %0";
default:
abort();
gcc_unreachable ();
}
}
[(set_attr "type" "*,*,*,*,load,store")])
......@@ -3533,7 +3532,7 @@
dest2 = adjust_address (set_dest, DFmode, 8);
break;
default:
abort ();
gcc_unreachable ();
}
emit_insn (gen_movdf (dest1, CONST0_RTX (DFmode)));
......@@ -7358,8 +7357,7 @@
(use (label_ref (match_operand 1 "" "")))])]
""
{
if (GET_MODE (operands[0]) != CASE_VECTOR_MODE)
abort ();
gcc_assert (GET_MODE (operands[0]) == CASE_VECTOR_MODE);
/* In pic mode, our address differences are against the base of the
table. Add that base value back in; CSE ought to be able to combine
......@@ -7402,11 +7400,9 @@
{
rtx fn_rtx;
if (GET_MODE (operands[0]) != FUNCTION_MODE)
abort ();
gcc_assert (GET_MODE (operands[0]) == FUNCTION_MODE);
if (GET_CODE (operands[3]) != CONST_INT)
abort();
gcc_assert (GET_CODE (operands[3]) == CONST_INT);
if (GET_CODE (XEXP (operands[0], 0)) == LABEL_REF)
{
......@@ -7568,8 +7564,7 @@
rtx fn_rtx;
rtvec vec;
if (GET_MODE (operands[1]) != FUNCTION_MODE)
abort ();
gcc_assert (GET_MODE (operands[1]) == FUNCTION_MODE);
fn_rtx = operands[1];
......@@ -8241,10 +8236,8 @@
int read_or_write = INTVAL (operands[1]);
int locality = INTVAL (operands[2]);
if (read_or_write != 0 && read_or_write != 1)
abort ();
if (locality < 0 || locality > 3)
abort ();
gcc_assert (read_or_write == 0 || read_or_write == 1);
gcc_assert (locality >= 0 && locality < 4);
return prefetch_instr [read_or_write][locality == 0 ? 0 : 1];
}
[(set_attr "type" "load")])
......@@ -8268,10 +8261,8 @@
int read_or_write = INTVAL (operands[1]);
int locality = INTVAL (operands[2]);
if (read_or_write != 0 && read_or_write != 1)
abort ();
if (locality < 0 || locality > 3)
abort ();
gcc_assert (read_or_write == 0 || read_or_write == 1);
gcc_assert (locality >= 0 && locality < 4);
return prefetch_instr [read_or_write][locality == 0 ? 0 : 1];
}
[(set_attr "type" "load")])
......
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