Commit f5cbabc1 by Richard Sandiford Committed by Richard Sandiford

[AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half

This patch passes the number of units to aarch64_simd_vect_par_cnst_half,
which avoids a to_constant () once GET_MODE_NUNITS is variable.

2017-11-06  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_simd_vect_par_cnst_half):
	Take the number of units too.
	* config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Likewise.
	(aarch64_simd_check_vect_par_cnst_half): Update call accordingly,
	but check for a vector mode before rather than after the call.
	* config/aarch64/aarch64-simd.md (aarch64_split_simd_mov<mode>)
	(move_hi_quad_<mode>, vec_unpack<su>_hi_<mode>)
	(vec_unpack<su>_lo_<mode, vec_widen_<su>mult_lo_<mode>)
	(vec_widen_<su>mult_hi_<mode>, vec_unpacks_lo_<mode>)
	(vec_unpacks_hi_<mode>, aarch64_saddl2<mode>, aarch64_uaddl2<mode>)
	(aarch64_ssubl2<mode>, aarch64_usubl2<mode>, widen_ssum<mode>3)
	(widen_usum<mode>3, aarch64_saddw2<mode>, aarch64_uaddw2<mode>)
	(aarch64_ssubw2<mode>, aarch64_usubw2<mode>, aarch64_sqdmlal2<mode>)
	(aarch64_sqdmlsl2<mode>, aarch64_sqdmlal2_lane<mode>)
	(aarch64_sqdmlal2_laneq<mode>, aarch64_sqdmlsl2_lane<mode>)
	(aarch64_sqdmlsl2_laneq<mode>, aarch64_sqdmlal2_n<mode>)
	(aarch64_sqdmlsl2_n<mode>, aarch64_sqdmull2<mode>)
	(aarch64_sqdmull2_lane<mode>, aarch64_sqdmull2_laneq<mode>)
	(aarch64_sqdmull2_n<mode>): Update accordingly.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254468
parent 73e3da51
......@@ -2,6 +2,30 @@
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_simd_vect_par_cnst_half):
Take the number of units too.
* config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Likewise.
(aarch64_simd_check_vect_par_cnst_half): Update call accordingly,
but check for a vector mode before rather than after the call.
* config/aarch64/aarch64-simd.md (aarch64_split_simd_mov<mode>)
(move_hi_quad_<mode>, vec_unpack<su>_hi_<mode>)
(vec_unpack<su>_lo_<mode, vec_widen_<su>mult_lo_<mode>)
(vec_widen_<su>mult_hi_<mode>, vec_unpacks_lo_<mode>)
(vec_unpacks_hi_<mode>, aarch64_saddl2<mode>, aarch64_uaddl2<mode>)
(aarch64_ssubl2<mode>, aarch64_usubl2<mode>, widen_ssum<mode>3)
(widen_usum<mode>3, aarch64_saddw2<mode>, aarch64_uaddw2<mode>)
(aarch64_ssubw2<mode>, aarch64_usubw2<mode>, aarch64_sqdmlal2<mode>)
(aarch64_sqdmlsl2<mode>, aarch64_sqdmlal2_lane<mode>)
(aarch64_sqdmlal2_laneq<mode>, aarch64_sqdmlsl2_lane<mode>)
(aarch64_sqdmlsl2_laneq<mode>, aarch64_sqdmlal2_n<mode>)
(aarch64_sqdmlsl2_n<mode>, aarch64_sqdmull2<mode>)
(aarch64_sqdmull2_lane<mode>, aarch64_sqdmull2_laneq<mode>)
(aarch64_sqdmull2_n<mode>): Update accordingly.
2017-11-06 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_reverse_mask): Take
the number of units too.
* config/aarch64/aarch64.c (aarch64_reverse_mask): Likewise.
......@@ -391,7 +391,7 @@ const char *aarch64_output_move_struct (rtx *operands);
rtx aarch64_return_addr (int, rtx);
rtx aarch64_simd_gen_const_vector_dup (machine_mode, HOST_WIDE_INT);
bool aarch64_simd_mem_operand_p (rtx);
rtx aarch64_simd_vect_par_cnst_half (machine_mode, bool);
rtx aarch64_simd_vect_par_cnst_half (machine_mode, int, bool);
rtx aarch64_tls_get_addr (void);
tree aarch64_fold_builtin (tree, int, tree *, bool);
unsigned aarch64_dbx_register_number (unsigned);
......
......@@ -11757,12 +11757,12 @@ Architecture 3 2 1 0 3 2 1 0
Low Mask: { 2, 3 } { 0, 1 }
High Mask: { 0, 1 } { 2, 3 }
*/
MODE Is the mode of the vector and NUNITS is the number of units in it. */
rtx
aarch64_simd_vect_par_cnst_half (machine_mode mode, bool high)
aarch64_simd_vect_par_cnst_half (machine_mode mode, int nunits, bool high)
{
int nunits = GET_MODE_NUNITS (mode);
rtvec v = rtvec_alloc (nunits / 2);
int high_base = nunits / 2;
int low_base = 0;
......@@ -11791,14 +11791,15 @@ bool
aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode,
bool high)
{
rtx ideal = aarch64_simd_vect_par_cnst_half (mode, high);
if (!VECTOR_MODE_P (mode))
return false;
rtx ideal = aarch64_simd_vect_par_cnst_half (mode, GET_MODE_NUNITS (mode),
high);
HOST_WIDE_INT count_op = XVECLEN (op, 0);
HOST_WIDE_INT count_ideal = XVECLEN (ideal, 0);
int i = 0;
if (!VECTOR_MODE_P (mode))
return false;
if (count_op != count_ideal)
return false;
......
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