Commit f57d1446 by Peter Bergner Committed by Peter Bergner

re PR target/85755 (PowerPC Gcc's -mupdate produces inefficient code on power8/power9 machines)

gcc/
	PR target/85755
	* config/rs6000/rs6000.c (mem_operand_gpr): Enable PRE_INC and PRE_DEC
	addresses.

gcc/testsuite/
	PR target/85755
	* gcc.target/powerpc/pr85755.c: New test.

From-SVN: r261340
parent a1417556
2018-06-08 Peter Bergner <bergner@vnet.ibm.com>
PR target/85755
* config/rs6000/rs6000.c (mem_operand_gpr): Enable PRE_INC and PRE_DEC
addresses.
2018-06-08 Jan Hubicka <hubicka@ucw.cz>
* dumpfile.c (FIRST_ME_AUTO_NUMBERED_DUMP): Bump to 4.
......
......@@ -7996,6 +7996,13 @@ mem_operand_gpr (rtx op, machine_mode mode)
int extra;
rtx addr = XEXP (op, 0);
/* PR85755: Allow PRE_INC and PRE_DEC addresses. */
if (TARGET_UPDATE
&& (GET_CODE (addr) == PRE_INC || GET_CODE (addr) == PRE_DEC)
&& mode_supports_pre_incdec_p (mode)
&& legitimate_indirect_address_p (XEXP (addr, 0), false))
return true;
/* Don't allow non-offsettable addresses. See PRs 83969 and 84279. */
if (!rs6000_offsettable_memref_p (op, mode, false))
return false;
2018-06-08 Peter Bergner <bergner@vnet.ibm.com>
PR target/85755
* gcc.target/powerpc/pr85755.c: New test.
2018-06-08 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/vsx-vector-6-be.p7.c: Rename this file to
......
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-options "-O1" } */
void
preinc (long *q, long n)
{
long i;
for (i = 0; i < n; i++)
q[i] = i;
}
void
predec (long *q, long n)
{
long i;
for (i = n; i >= 0; i--)
q[i] = i;
}
/* { dg-final { scan-assembler-times {\mstwu\M} 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstdu\M} 2 { target lp64 } } } */
/* { dg-final { scan-assembler-not {\mstfdu\M} } } */
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