re PR target/84336 (ICE in extract_insn, at recog.c:2304)

	PR target/84336
	* config/i386/sse.md (<avx512>_vpermi2var<mode>3_mask): Force
	operands[2] into a REG before using gen_lowpart on it.

	* gcc.target/i386/pr84336.c: New test.

From-SVN: r257616

gcc/ChangeLog

+2018-02-13  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/84336
+	* config/i386/sse.md (<avx512>_vpermi2var<mode>3_mask): Force
+	operands[2] into a REG before using gen_lowpart on it.
+
 2018-02-12  Jeff Law  <law@redhat.com>
 
 	PR target/83760

gcc/config/i386/sse.md

@@ -18183,7 +18183,10 @@
 	  (match_dup 5)
 	  (match_operand:<avx512fmaskmode> 4 "register_operand")))]
   "TARGET_AVX512F"
-  "operands[5] = gen_lowpart (<MODE>mode, operands[2]);")
+{
+  operands[2] = force_reg (<sseintvecmode>mode, operands[2]);
+  operands[5] = gen_lowpart (<MODE>mode, operands[2]);
+})
 
 (define_insn "*<avx512>_vpermi2var<mode>3_mask"
   [(set (match_operand:VPERMI2I 0 "register_operand" "=v")

gcc/testsuite/ChangeLog

+2018-02-13  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/84336
+	* gcc.target/i386/pr84336.c: New test.
+
 2018-02-12  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c++/84341

gcc/testsuite/gcc.target/i386/pr84336.c

+/* PR target/84336 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -ftree-ter -mavx512f" } */
+
+#include <x86intrin.h>
+
+struct S { __m512i h; } b;
+
+__m512
+foo (__m512 a, __mmask16 c, __m512 d)
+{
+  return _mm512_mask2_permutex2var_ps (a, b.h, c, d);
+}