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lvzhengyang
riscv-gcc-1
Commits
f3926c48
Commit
f3926c48
authored
Mar 30, 2003
by
Kazu Hirata
Committed by
Kazu Hirata
Mar 30, 2003
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* config/h8300/h8300.md (a peephole2): Remove useless code.
From-SVN: r65039
parent
631693d5
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gcc/ChangeLog
View file @
f3926c48
2003-03-30 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (a peephole2): Remove useless code.
2003-03-29 Kazu Hirata <kazu@cs.umass.edu>
2003-03-29 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (*iorsi3_and_ashift): New.
* config/h8300/h8300.md (*iorsi3_and_ashift): New.
...
...
gcc/config/h8300/h8300.md
View file @
f3926c48
...
@@ -3934,6 +3934,9 @@
...
@@ -3934,6 +3934,9 @@
(const_int 8)))]
(const_int 8)))]
"")
"")
;; If a load of mem:SI is followed by an AND that turns off the upper
;; half, then we can load mem:HI instead.
(define_peephole2
(define_peephole2
[
(set (match_operand:SI 0 "register_operand" "")
[
(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(match_operand:SI 1 "memory_operand" ""))
...
@@ -3941,7 +3944,7 @@
...
@@ -3941,7 +3944,7 @@
(and:SI (match_dup 0)
(and:SI (match_dup 0)
(match_operand:SI 2 "const_int_operand" "")))]
(match_operand:SI 2 "const_int_operand" "")))]
"(TARGET_H8300H || TARGET_H8300S)
"(TARGET_H8300H || TARGET_H8300S)
&& !
(GET_CODE (operands
[
1
]
) == MEM && MEM_VOLATILE_P (operands
[
1
]
)
)
&& !
MEM_VOLATILE_P (operands
[
1
]
)
&& (INTVAL (operands
[
2
]
) & ~0xffff) == 0
&& (INTVAL (operands
[
2
]
) & ~0xffff) == 0
&& INTVAL (operands
[
2
]
) != 255"
&& INTVAL (operands
[
2
]
) != 255"
[
(set (match_dup 3)
[
(set (match_dup 3)
...
...
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