re PR target/50694 (SH Target: SH2A little endian does not actually work)

	PR target/50694
	* config/sh/sh.h (IS_LITTLE_ENDIAN_OPTION, UNSUPPORTED_SH2A):
	New macros.
	(DRIVER_SELF_SPECS): Use new macros to filter out
	unsupported options taking the default configuration into
	account.
	* gcc.target/sh/pr21255-2-ml.c: Skip if -mb or -m5* is
	specified.  Remove redundant runtime checks.
	* gcc.target/sh/20080410-1.c: Skip if -mb is specified.
	Allow for other than -m4.  Fix typos in comments.

From-SVN: r181340

gcc/ChangeLog

+2011-11-13  Oleg Endo  <oleg.endo@t-online.de>
+
+	PR target/50694
+	* config/sh/sh.h (IS_LITTLE_ENDIAN_OPTION, UNSUPPORTED_SH2A):
+	New macros.
+	(DRIVER_SELF_SPECS): Use new macros to filter out
+	unsupported options taking the default configuration into
+	account.
+
 2011-11-13  Jonathan Wakely  <jwakely.gcc@gmail.com>
 
 	* doc/install.texi (Specific): Fix anchor for

gcc/config/sh/sh.h

@@ -417,7 +417,23 @@ do { \
 #define SH_DIV_STR_FOR_SIZE "call"
 #endif
 
-#define DRIVER_SELF_SPECS "%{m2a:%{ml:%eSH2a does not support little-endian}}"
+/* SH2A does not support little-endian.  Catch such combinations
+   taking into account the default configuration.  */
+#if TARGET_ENDIAN_DEFAULT == MASK_BIG_ENDIAN
+#define IS_LITTLE_ENDIAN_OPTION "%{ml:"
+#else
+#define IS_LITTLE_ENDIAN_OPTION "%{!mb:"
+#endif
+ 
+#if TARGET_CPU_DEFAULT & MASK_HARD_SH2A
+#define UNSUPPORTED_SH2A IS_LITTLE_ENDIAN_OPTION \
+"%{m2a*|!m1:%{!m2*:%{!m3*:%{!m4*:{!m5*:%eSH2a does not support little-endian}}}}}}"
+#else
+#define UNSUPPORTED_SH2A IS_LITTLE_ENDIAN_OPTION \
+"%{m2a*:%eSH2a does not support little-endian}}"
+#endif
+
+#define DRIVER_SELF_SPECS UNSUPPORTED_SH2A
 
 #define ASSEMBLER_DIALECT assembler_dialect
 

gcc/testsuite/ChangeLog

+2011-11-13  Oleg Endo  <oleg.endo@t-online.de>
+
+	* gcc.target/sh/pr21255-2-ml.c: Skip if -mb or -m5* is
+	specified.  Remove redundant runtime checks.
+	* gcc.target/sh/20080410-1.c: Skip if -mb is specified.
+	Allow for other than -m4.  Fix typos in comments.
+
 2011-11-12  Jason Merrill  <jason@redhat.com>
 
 	PR c++/986

gcc/testsuite/gcc.target/sh/20080410-1.c

 /* { dg-do compile { target "sh-*-*" } } */
-/* { dg-options "-O0 -m4 -ml" } */
+/* { dg-options "-O0" } */
+/* { dg-skip-if "" { "sh*-*-*" } "-mb" "" }  */
 /* { dg-final { scan-assembler-not "add\tr0,r0" } } */
 
-/* This test checks that chain reloads conflict.  I they don't
+/* This test checks chain reloads conflicts.  If they don't
    conflict, the same hard register R0 is used for the both reloads
    but in this case the second reload needs an intermediate register
    (which is the reload register).  As the result we have the

gcc/testsuite/gcc.target/sh/pr21255-2-ml.c

 /* { dg-do compile { target "sh*-*-*" } } */
-/* { dg-options "-ml -O2 -fomit-frame-pointer" } */
+/* { dg-options "-O2 -fomit-frame-pointer" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-mb" && "-m5*"} { "" } }  */
 /* { dg-final { scan-assembler "mov @\\(4,r.\\),r.; mov @r.,r." } } */
 double d;
 
@@ -7,13 +8,6 @@ double
 f (void)
 {
   double r;
-
-/* If -mb from the target options is passed after -ml from dg-options, we
-   end up with th reverse endianness.  */
-#if TARGET_SHMEDIA || defined (__BIG_ENDIAN__)
-  asm ("mov @(4,r1),r4; mov @r1,r3");
-#else
   asm ("mov %S1,%S0; mov %R1,%R0" : "=&r" (r) : "m" (d));
-#endif
   return r;
 }