Commit f2d3c02a by Hartmut Penner Committed by Hartmut Penner

s390.md: Changed attributes for scheduling.

2001-09-21  Hartmut Penner  <hpenner@de.ibm.com>

        * s390.md: Changed attributes for scheduling.
        * s390.c: (s390_adjust_cost, s390_adjust_priority)
        Changed scheduling

From-SVN: r45725
parent 01c62aea
2001-09-21 Hartmut Penner <hpenner@de.ibm.com>
* s390.md: Changed attributes for scheduling.
* s390.c: (s390_adjust_cost, s390_adjust_priority)
Changed scheduling
2001-09-21 Joseph S. Myers <jsm28@cam.ac.uk> 2001-09-21 Joseph S. Myers <jsm28@cam.ac.uk>
Table-driven attributes. Table-driven attributes.
......
...@@ -46,6 +46,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -46,6 +46,7 @@ Boston, MA 02111-1307, USA. */
static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int)); static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int));
static int s390_adjust_priority PARAMS ((rtx, int));
#undef TARGET_ASM_FUNCTION_PROLOGUE #undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE s390_function_prologue #define TARGET_ASM_FUNCTION_PROLOGUE s390_function_prologue
...@@ -62,6 +63,9 @@ static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int)); ...@@ -62,6 +63,9 @@ static int s390_adjust_cost PARAMS ((rtx, rtx, rtx, int));
#undef TARGET_SCHED_ADJUST_COST #undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST s390_adjust_cost #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
#undef TARGET_SCHED_ADJUST_PRIORITY
#define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
struct gcc_target targetm = TARGET_INITIALIZER; struct gcc_target targetm = TARGET_INITIALIZER;
extern int reload_completed; extern int reload_completed;
...@@ -1587,7 +1591,9 @@ addr_generation_dependency_p (dep_rtx, insn) ...@@ -1587,7 +1591,9 @@ addr_generation_dependency_p (dep_rtx, insn)
Data dependencies are all handled without delay. However, if a Data dependencies are all handled without delay. However, if a
register is modified and subsequently used as base or index register is modified and subsequently used as base or index
register of a memory reference, at least 4 cycles need to pass register of a memory reference, at least 4 cycles need to pass
between setting and using the register to avoid pipeline stalls. */ between setting and using the register to avoid pipeline stalls.
A exception is the LA instruction. A address generated by LA can
be used by introducing only a one cycle stall on the pipeline. */
static int static int
s390_adjust_cost (insn, link, dep_insn, cost) s390_adjust_cost (insn, link, dep_insn, cost)
...@@ -1610,19 +1616,13 @@ s390_adjust_cost (insn, link, dep_insn, cost) ...@@ -1610,19 +1616,13 @@ s390_adjust_cost (insn, link, dep_insn, cost)
if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0) if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
return cost; return cost;
/* If cost equal 1 nothing needs to be checked. */
if (cost == 1)
{
return cost;
}
dep_rtx = PATTERN (dep_insn); dep_rtx = PATTERN (dep_insn);
if (GET_CODE (dep_rtx) == SET) if (GET_CODE (dep_rtx) == SET)
{ {
if (addr_generation_dependency_p (dep_rtx, insn)) if (addr_generation_dependency_p (dep_rtx, insn))
{ {
cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
if (DEBUG_SCHED) if (DEBUG_SCHED)
{ {
fprintf (stderr, "\n\nAddress dependency detected: cost %d\n", fprintf (stderr, "\n\nAddress dependency detected: cost %d\n",
...@@ -1630,10 +1630,8 @@ s390_adjust_cost (insn, link, dep_insn, cost) ...@@ -1630,10 +1630,8 @@ s390_adjust_cost (insn, link, dep_insn, cost)
debug_rtx (dep_insn); debug_rtx (dep_insn);
debug_rtx (insn); debug_rtx (insn);
} }
return cost;
} }
} }
else if (GET_CODE (dep_rtx) == PARALLEL) else if (GET_CODE (dep_rtx) == PARALLEL)
{ {
for (i = 0; i < XVECLEN (dep_rtx, 0); i++) for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
...@@ -1641,6 +1639,7 @@ s390_adjust_cost (insn, link, dep_insn, cost) ...@@ -1641,6 +1639,7 @@ s390_adjust_cost (insn, link, dep_insn, cost)
if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i),
insn)) insn))
{ {
cost += (get_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
if (DEBUG_SCHED) if (DEBUG_SCHED)
{ {
fprintf (stderr, "\n\nAddress dependency detected: cost %d\n" fprintf (stderr, "\n\nAddress dependency detected: cost %d\n"
...@@ -1648,15 +1647,49 @@ s390_adjust_cost (insn, link, dep_insn, cost) ...@@ -1648,15 +1647,49 @@ s390_adjust_cost (insn, link, dep_insn, cost)
debug_rtx (dep_insn); debug_rtx (dep_insn);
debug_rtx (insn); debug_rtx (insn);
} }
return cost;
} }
} }
} }
/* default cost. */ return cost;
return 1; }
/* A C statement (sans semicolon) to update the integer scheduling priority
INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
increase the priority to execute INSN later. Do not define this macro if
you do not need to adjust the scheduling priorities of insns.
A LA instruction maybe scheduled later, since the pipeline bypasses the
calculated value. */
static int
s390_adjust_priority (insn, priority)
rtx insn ATTRIBUTE_UNUSED;
int priority;
{
if (! INSN_P (insn))
return priority;
if (GET_CODE (PATTERN (insn)) == USE
|| GET_CODE (PATTERN (insn)) == CLOBBER)
return priority;
switch (get_attr_type (insn))
{
default:
break;
case TYPE_LA:
if (priority >= 0 && priority < 0x01000000)
priority <<= 3;
break;
}
return priority;
} }
/* Pool concept for Linux 390: /* Pool concept for Linux 390:
- Function prologue saves used register - Function prologue saves used register
- literal pool is dumped in prologue and jump across with bras - literal pool is dumped in prologue and jump across with bras
......
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