re PR target/42774 (ICE in get_aligned_mem, at config/alpha/alpha.c:1484)

	PR target/42774
	* config/alpha/predicates.md (aligned_memory_operand): Return 0 for
	memory references with unaligned offsets.  Remove CQImode handling.
	(unaligned_memory_operand): Return 1 for memory references with
	unaligned offsets.  Remove CQImode handling.

testsuite/ChangeLog:

	PR target/42774
	* gcc.target/alpha/pr42774.c: New test.

From-SVN: r156017

gcc/ChangeLog

+2010-01-18  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/42774
+	* config/alpha/predicates.md (aligned_memory_operand): Return 0 for
+	memory references with unaligned offsets.  Remove CQImode handling.
+	(unaligned_memory_operand): Return 1 for memory references with
+	unaligned offsets.  Remove CQImode handling.
+
 2010-01-18  Richard Guenther  <rguenther@suse.de>
 
 	PR middle-end/39954

gcc/config/alpha/predicates.md

@@ -439,13 +439,11 @@
        (match_code "mem"))
 {
   rtx base;
+  int offset;
 
   if (MEM_ALIGN (op) >= 32)
     return 1;
 
-  if (mode == CQImode)
-    return 0;
-
   op = XEXP (op, 0);
 
   /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
@@ -453,14 +451,29 @@
   if (reload_in_progress
       && GET_CODE (op) == PLUS
       && GET_CODE (XEXP (op, 0)) == PLUS)
-    base = XEXP (XEXP (op, 0), 0);
+    {
+      base = XEXP (XEXP (op, 0), 0);
+      offset = INTVAL (XEXP (op, 1));
+    }
   else
     {
       if (! memory_address_p (mode, op))
 	return 0;
-      base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+      if (GET_CODE (op) == PLUS)
+	{
+	  base = XEXP (op, 0);
+	  offset = INTVAL (XEXP (op, 1));
+	}
+      else
+	{
+	  base = op;
+	  offset = 0;
+	}
     }
 
+  if (offset % GET_MODE_SIZE (mode))
+    return 0;
+
   return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
 })
 
@@ -471,13 +484,11 @@
        (match_code "mem"))
 {
   rtx base;
+  int offset;
 
   if (MEM_ALIGN (op) >= 32)
     return 0;
 
-  if (mode == CQImode)
-    return 1;
-
   op = XEXP (op, 0);
 
   /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
@@ -485,14 +496,29 @@
   if (reload_in_progress
       && GET_CODE (op) == PLUS
       && GET_CODE (XEXP (op, 0)) == PLUS)
-    base = XEXP (XEXP (op, 0), 0);
+    {
+      base = XEXP (XEXP (op, 0), 0);
+      offset = INTVAL (XEXP (op, 1));
+    }
   else
     {
       if (! memory_address_p (mode, op))
 	return 0;
-      base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+      if (GET_CODE (op) == PLUS)
+	{
+	  base = XEXP (op, 0);
+	  offset = INTVAL (XEXP (op, 1));
+	}
+      else
+	{
+	  base = op;
+	  offset = 0;
+	}
     }
 
+  if (offset % GET_MODE_SIZE (mode))
+    return 1;
+
   return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
 })
 

gcc/testsuite/ChangeLog

+2010-01-18  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/42774
+	* gcc.target/alpha/pr42774.c: New test.
+
 2010-01-18  Richard Guenther  <rguenther@suse.de>
 
 	PR tree-optimization/42781

gcc/testsuite/gcc.target/alpha/pr42774.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ev4" } */
+
+unsigned int ntfs_getinfo(void *p)
+{
+    char bootsect[8];
+
+    __builtin_memcpy(bootsect, p, sizeof bootsect);
+    return *(unsigned short *)(bootsect + 3);
+}